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path: root/drivers/platform/x86/intel/pmc
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2022-06-27platform/x86: intel/pmc: Add Alder Lake N support to PMC core driverGayatri Kammela
Add Alder Lake N (ADL-N) to the list of the platforms that Intel's PMC core driver supports. Alder Lake N reuses all the TigerLake PCH IPs. Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Gayatri Kammela <gayatri.kammela@linux.intel.com> Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20220615002751.3371730-1-gayatri.kammela@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-06-10platform/x86/intel: pmc: Support Intel Raptorlake PGeorge D Sworo
Add Raptorlake P to the list of the platforms that intel_pmc_core driver supports for pmc_core device. Raptorlake P PCH is based on Alderlake P PCH. Signed-off-by: George D Sworo <george.d.sworo@intel.com> Reviewed-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20220602012617.20100-1-george.d.sworo@intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-04-27platform/x86/intel: pmc/core: Use kobj_to_dev()Minghao Chi
Use kobj_to_dev() instead of open-coding it. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220425105525.3515831-1-chi.minghao@zte.com.cn Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-04-27platform/x86/intel: pmc/core: change pmc_lpm_modes to staticTom Rix
Sparse reports this issue core.c: note: in included file: core.h:239:12: warning: symbol 'pmc_lpm_modes' was not declared. Should it be static? Global variables should not be defined in headers. This only works because core.h is only included by core.c. Single file use variables should be static, so change its storage-class specifier to static. Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20220423123048.591405-1-trix@redhat.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-12-23platform/x86: intel_pmc_core: fix memleak on registration failureJohan Hovold
In case device registration fails during module initialisation, the platform device structure needs to be freed using platform_device_put() to properly free all resources (e.g. the device name). Fixes: 938835aa903a ("platform/x86: intel_pmc_core: do not create a static struct device") Cc: stable@vger.kernel.org # 5.9 Signed-off-by: Johan Hovold <johan@kernel.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20211222105023.6205-1-johan@kernel.org Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-08-20platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake PCHDavid E. Box
Alder PCH uses the same Gigabit Ethernet (GBE) device as Tiger Lake PCH which cannot achieve PC10 without ignoring the PMC GBE LTR. Add this work around for Alder Lake PCH as well. Cc: Chao Qin <chao.qin@intel.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/9168e8bd687f2d0d5eb0ed116e08d0764eadf7b3.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-08-20platform/x86/intel: pmc/core: Add Alder Lake low power mode support for pmc coreGayatri Kammela
Alder Lake has 14 status registers that are memory mapped. These registers show the status of the low power mode requirements. The registers are latched on every C10 entry or exit and on every s0ix.y entry/exit. Accessing these registers is useful for debugging any low power related activities. Thus, add debugfs entry to access low power mode status registers. Cc: Chao Qin <chao.qin@intel.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David Box <david.e.box@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Link: https://lore.kernel.org/r/d27ec98589a5aaa569bbce0e937ed03779fc0a22.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-08-20platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR) support ↵Gayatri Kammela
to Alder Lake Add support to show the Latency Tolerance Reporting for the IPs on the Alder Lake PCH as reported by the PMC. This LTR support on Alder Lake is slightly different from the Cannon lake PCH that is being reused by all platforms till Tiger Lake. Cc: Chao Qin <chao.qin@intel.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David Box <david.e.box@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Link: https://lore.kernel.org/r/5ca3ea090b53a9bf918b055447ab5c8ef2925cc4.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-08-20platform/x86/intel: pmc/core: Add Alderlake support to pmc core driverGayatri Kammela
Add Alder Lake client and mobile support to pmc core driver. Cc: Chao Qin <chao.qin@intel.com> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David Box <david.e.box@intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Link: https://lore.kernel.org/r/8b32e168f8e69dd00aabfb2e4383db78f22b123b.1629091915.git.gayatri.kammela@intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-08-20platform/x86: intel_pmc_core: Move to intel sub-directoryKate Hsuan
Move Intel PMC core driver to intel sub-directory to improve readability. Signed-off-by: Kate Hsuan <hpa@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210820110458.73018-7-andriy.shevchenko@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>