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2020-09-11spi: spi-fsl-dspi: use XSPI mode instead of DMA for DPAA2 SoCsVladimir Oltean
The arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi device tree lacks DMA channels for DSPI, so naturally, the driver fails to probe: [ 2.945302] fsl-dspi 2100000.spi: rx dma channel not available [ 2.951134] fsl-dspi 2100000.spi: can't get dma channels In retrospect, this should have been obvious, because LS2080A, LS2085A LS2088A and LX2160A don't appear to have an eDMA module at all. Looking again at their datasheets, the CTARE register (which is specific to XSPI functionality) seems to be documented, so switch them to XSPI mode instead. Fixes: 0feaf8f5afe0 ("spi: spi-fsl-dspi: Convert the instantiations that support it to DMA") Reported-by: Qiang Zhao <qiang.zhao@nxp.com> Tested-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20200910121532.1138596-1-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09Merge series "opp: Unconditionally call dev_pm_opp_of_remove_table()" from ↵Mark Brown
Viresh Kumar <viresh.kumar@linaro.org>: Hello, This cleans up some of the user code around calls to dev_pm_opp_of_remove_table(). All the patches can be picked by respective maintainers directly except for the last patch, which needs the previous two to get merged first. These are based for 5.9-rc1. Rajendra, Since most of these changes are related to qcom stuff, it would be great if you can give them a try. I wasn't able to test them due to lack of hardware. Ulf, I had to revise the sdhci patch, sorry about that. Please pick this one. Diff between V1 and V2 is mentioned in each of the patches separately. Viresh Kumar (8): cpufreq: imx6q: Unconditionally call dev_pm_opp_of_remove_table() drm/lima: Unconditionally call dev_pm_opp_of_remove_table() drm/msm: Unconditionally call dev_pm_opp_of_remove_table() mmc: sdhci-msm: Unconditionally call dev_pm_opp_of_remove_table() spi: spi-geni-qcom: Unconditionally call dev_pm_opp_of_remove_table() spi: spi-qcom-qspi: Unconditionally call dev_pm_opp_of_remove_table() tty: serial: qcom_geni_serial: Unconditionally call dev_pm_opp_of_remove_table() qcom-geni-se: remove has_opp_table drivers/cpufreq/imx6q-cpufreq.c | 10 ++-------- drivers/gpu/drm/lima/lima_devfreq.c | 6 +----- drivers/gpu/drm/lima/lima_devfreq.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 14 +++++--------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 - drivers/gpu/drm/msm/dsi/dsi_host.c | 8 ++------ drivers/mmc/host/sdhci-msm.c | 14 +++++--------- drivers/spi/spi-geni-qcom.c | 13 +++++-------- drivers/spi/spi-qcom-qspi.c | 15 ++++++--------- drivers/tty/serial/qcom_geni_serial.c | 13 +++++-------- include/linux/qcom-geni-se.h | 2 -- 11 files changed, 31 insertions(+), 66 deletions(-) base-commit: f4d51dffc6c01a9e94650d95ce0104964f8ae822 -- 2.25.0.rc1.19.g042ed3e048af
2020-09-09spi: spidev: Remove redundant initialization of variable statusJay Fang
In spidev_read() and spidev_write(), the variable status is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Signed-off-by: Jay Fang <f.fangjian@huawei.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1599631704-53232-1-git-send-email-f.fangjian@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09spi: spi-qcom-qspi: Unconditionally call dev_pm_opp_of_remove_table()Viresh Kumar
dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP table not present for the device). And we can call dev_pm_opp_of_remove_table() unconditionally here. While at it, create a new label and put clkname on errors. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/b77aa0bbe82a580508e321a34da488b4b27966d0.1598594714.git.viresh.kumar@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09spi: spi-geni-qcom: Unconditionally call dev_pm_opp_of_remove_table()Viresh Kumar
dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP table not present for the device). And we can call dev_pm_opp_of_remove_table() unconditionally here. While at it, create a new label and put clkname on errors. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/ea0864d41277e61fa31d304fbd4cf9af6b314269.1598594714.git.viresh.kumar@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09spi: stm32: fix pm_runtime_get_sync() error checkingDan Carpenter
The pm_runtime_get_sync() can return either 0 or 1 on success but this code treats 1 as a failure. Fixes: db96bf976a4f ("spi: stm32: fixes suspend/resume management") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/20200909094304.GA420136@mwanda Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09spi: Fix memory leak on splited transfersGustav Wiklander
In the prepare_message callback the bus driver has the opportunity to split a transfer into smaller chunks. spi_map_msg is done after prepare_message. Function spi_res_release releases the splited transfers in the message. Therefore spi_res_release should be called after spi_map_msg. The previous try at this was commit c9ba7a16d0f1 which released the splited transfers after spi_finalize_current_message had been called. This introduced a race since the message struct could be out of scope because the spi_sync call got completed. Fixes this leak on spi bus driver spi-bcm2835.c when transfer size is greater than 65532: Kmemleak: sg_alloc_table+0x28/0xc8 spi_map_buf+0xa4/0x300 __spi_pump_messages+0x370/0x748 __spi_sync+0x1d4/0x270 spi_sync+0x34/0x58 spi_test_execute_msg+0x60/0x340 [spi_loopback_test] spi_test_run_iter+0x548/0x578 [spi_loopback_test] spi_test_run_test+0x94/0x140 [spi_loopback_test] spi_test_run_tests+0x150/0x180 [spi_loopback_test] spi_loopback_test_probe+0x50/0xd0 [spi_loopback_test] spi_drv_probe+0x84/0xe0 Signed-off-by: Gustav Wiklander <gustavwi@axis.com> Link: https://lore.kernel.org/r/20200908151129.15915-1-gustav.wiklander@axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08Merge series "spi: Adding support for Microchip Sparx5 SoC" from Lars ↵Mark Brown
Povlsen <lars.povlsen@microchip.com>: The series add support for the Sparx5 SoC SPI controller in the spi-dw-mmio.c spi driver. v5 changes: - rx-sample-delay-ns documentation changes from Rob Herring: - Drop superfluous type $ref - Add default value = 0 v4 changes: - Changed snps,rx-sample-delay-ns to snps,rx-sample-delay-ns suggested by Rob Herring (rockchip also has this property). - Added support for controller-level rx-sample-delay-ns value as well as per SPI slave value (rockchip has controller-level property). - Dropped internal mux in favor of suggested spi-mux to control bus inteface selection. v3 changes: - Added mux support for controlling SPI bus interface. This is new mux driver, bindings and added to sparx5 base DT. - Removed "microchip,spi-interface2" property in favour of "mux-controls" property in SPI controller (sparx5 only). - Changed dw_spi_sparx5_set_cs() to use the mux control instead of directly acessing "mux" register. Associated code/defines moved to mux driver. - Changed dw_spi_sparx5_set_cs() to match other similar functions in signature and avoid explicit CS toggling. - Spun off duplicated NAND device DT chunks into separate DT file. v2 changes: - Moved all RX sample delay into spi-dw-core.c, using the "snps,rx-sample-delay-ns" device property. - Integrated Sparx5 support directly in spi-dw-mmio.c - Changed SPI2 configuration to per-slave "microchip,spi-interface2" property. - Added bindings to existing snps,dw-apb-ssi.yaml file - Dropped patches for polled mode and SPI memory operations. Lars Povlsen (6): spi: dw: Add support for RX sample delay register spi: dw: Add Microchip Sparx5 support arm64: dts: sparx5: Add SPI controller and associated mmio-mux dt-bindings: snps,dw-apb-ssi: Add sparx5 support, plus rx-sample-delay-ns property arm64: dts: sparx5: Add spi-nor support arm64: dts: sparx5: Add spi-nand devices .../bindings/spi/snps,dw-apb-ssi.yaml | 21 ++++++ arch/arm64/boot/dts/microchip/sparx5.dtsi | 47 ++++++++++++- .../arm64/boot/dts/microchip/sparx5_nand.dtsi | 31 ++++++++ .../boot/dts/microchip/sparx5_pcb125.dts | 30 ++++++++ .../boot/dts/microchip/sparx5_pcb134.dts | 1 + .../dts/microchip/sparx5_pcb134_board.dtsi | 16 +++++ .../boot/dts/microchip/sparx5_pcb135.dts | 1 + .../dts/microchip/sparx5_pcb135_board.dtsi | 16 +++++ drivers/spi/spi-dw-core.c | 26 +++++++ drivers/spi/spi-dw-mmio.c | 70 ++++++++++++++++++- drivers/spi/spi-dw.h | 3 + 11 files changed, 260 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/microchip/sparx5_nand.dtsi -- 2.27.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
2020-09-08spi: spi-mtk-nor: support standard spi propertiesIkjoon Jang
Use default supports_op() to support spi-[rt]x-bus-width properties. And check dummy op's byte length instead of its bus width for output. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20200826091852.519138-1-ikjn@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: tegra20: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-11-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: tegra114: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-10-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: synquacer: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-9-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: stm32: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-8-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: qcom-qspi: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-7-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: spi-mux: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-6-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: cadence-quadspi: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-5-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: bcm2835: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200901152713.18629-4-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: atmel: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200901152713.18629-3-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: sprd: Release DMA channel also on probe deferralKrzysztof Kozlowski
If dma_request_chan() for TX channel fails with EPROBE_DEFER, the RX channel would not be released and on next re-probe it would be requested second time. Fixes: 386119bc7be9 ("spi: sprd: spi: sprd: Add DMA mode support") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lore.kernel.org/r/20200901152713.18629-1-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: dw: Add Microchip Sparx5 supportLars Povlsen
This adds SPI support for the Sparx5 SoC, which is using the MMIO Designware SPI controller. The Sparx5 differs from the Ocelot version in these areas: * The CS override is controlled by a new set of registers for this purpose. * The Sparx5 SPI controller has the RX sample delay register, and it must be configured for the (SPI NAND) device on SPI2. * The Sparx5 SPI controller has 2 different SPI bus interfaces on the same controller (don't ask...). The "spi-mux" driver should be used in conjunction with the SPI driver to select the appropriate bus. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-3-lars.povlsen@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: dw: Add support for RX sample delay registerLars Povlsen
This add support for the RX_SAMPLE_DLY register. If enabled in the Designware IP, it allows tuning of the rx data signal by means of an internal rx sample fifo. The register is controlled by the rx-sample-delay-ns DT property, which is defined per SPI slave as well on controller level. The controller level rx-sample-delay-ns will apply to all slaves without the property explicitly defined. The register is located at offset 0xf0, and if the option is not enabled in the IP, changing the register will have no effect. The register will only be written if any slave defines a nonzero value (after scaling by the clock period). Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-2-lars.povlsen@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: spi-cadence-quadspi: Fix mapping of buffers for DMA readsVignesh Raghavendra
Buffers need to mapped to DMA channel's device pointer instead of SPI controller's device pointer as its system DMA that actually does data transfer. Data inconsistencies have been reported when reading from flash without this fix. Fixes: ffa639e069fb ("mtd: spi-nor: cadence-quadspi: Add DMA support for direct mode reads") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20200831130720.4524-1-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-07spi: qup: Allow for compile-testing on !ARMAlex Dewar
There seems no reason to restrict testing to ARM, so remove this constraint to improve test coverage. Build-tested with allyesconfig on x86. Signed-off-by: Alex Dewar <alex.dewar90@gmail.com> Link: https://lore.kernel.org/r/20200904163709.110975-1-alex.dewar90@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-07spi: stm32: Rate-limit the 'Communication suspended' messageMarek Vasut
The 'spi_stm32 44004000.spi: Communication suspended' message means that when using PIO, the kernel did not read the FIFO fast enough and so the SPI controller paused the transfer. Currently, this is printed on every single such event, so if the kernel is busy and the controller is pausing the transfers often, the kernel will be all the more busy scrolling this message into the log buffer every few milliseconds. That is not helpful. Instead, rate-limit the message and print it every once in a while. It is not possible to use the default dev_warn_ratelimited(), because that is still too verbose, as it prints 10 lines (DEFAULT_RATELIMIT_BURST) every 5 seconds (DEFAULT_RATELIMIT_INTERVAL). The policy here is to print 1 line every 50 seconds (DEFAULT_RATELIMIT_INTERVAL * 10), because 1 line is more than enough and the cycles saved on printing are better left to the CPU to handle the SPI. However, dev_warn_once() is also not useful, as the user should be aware that this condition is possibly recurring or ongoing. Thus the custom rate-limit policy. Finally, turn the message from dev_warn() to dev_dbg(), since the system does not suffer any sort of malfunction if this message appears, it is just slowing down. This further reduces the printing into the log buffer and frees the CPU to do useful work. Fixes: dcbe0d84dfa5 ("spi: add driver for STM32 SPI controller") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Amelie Delaunay <amelie.delaunay@st.com> Cc: Antonio Borneo <borneo.antonio@gmail.com> Cc: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200905151913.117775-1-marex@denx.de Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-02spi: spi-loopback-test: Fix out-of-bounds readVincent Whitchurch
The "tx/rx-transfer - crossing PAGE_SIZE" test always fails when len=131071 and rx_offset >= 5: spi-loopback-test spi0.0: Running test tx/rx-transfer - crossing PAGE_SIZE ... with iteration values: len = 131071, tx_off = 0, rx_off = 3 with iteration values: len = 131071, tx_off = 0, rx_off = 4 with iteration values: len = 131071, tx_off = 0, rx_off = 5 loopback strangeness - rx changed outside of allowed range at: ...a4321000 spi_msg@ffffffd5a4157690 frame_length: 131071 actual_length: 131071 spi_transfer@ffffffd5a41576f8 len: 131071 tx_buf: ffffffd5a4340ffc Note that rx_offset > 3 can only occur if the SPI controller driver sets ->dma_alignment to a higher value than 4, so most SPI controller drivers are not affect. The allocated Rx buffer is of size SPI_TEST_MAX_SIZE_PLUS, which is 132 KiB (assuming 4 KiB pages). This test uses an initial offset into the rx_buf of PAGE_SIZE - 4, and a len of 131071, so the range expected to be written in this transfer ends at (4096 - 4) + 5 + 131071 == 132 KiB, which is also the end of the allocated buffer. But the code which verifies the content of the buffer reads a byte beyond the allocated buffer and spuriously fails because this out-of-bounds read doesn't return the expected value. Fix this by using ITERATE_LEN instead of ITERATE_MAX_LEN to avoid testing sizes which cause out-of-bounds reads. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Link: https://lore.kernel.org/r/20200902132341.7079-1-vincent.whitchurch@axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-25spi: spi-fsl-espi: Remove use of %pChris Packham
The register offset is already included in the device name so even prior %p values being hashed printing the base was redundant. Remove the %p from the dev_info() output. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20200825050856.29616-1-chris.packham@alliedtelesis.co.nz Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-25spi: spi-cadence-quadspi: Populate get_name() interfaceVignesh Raghavendra
Implement get_name() interface of spi_controller_mem_ops so as to avoid changing of mtd->name due to driver being moved over to spi-mem framework from SPI NOR. This avoids breaking of MTD cmdline args being passed by bootloaders which maybe using old driver name. Fixes: 31fb632b5d43c ("spi: Move cadence-quadspi driver to drivers/spi/") Reported-by: Jan Kiszka <jan.kiszka@siemens.com> Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200825172506.14375-1-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-24spi: spi-fsl-dspi: delete EOQ transfer modeVladimir Oltean
After the only user of the limited EOQ mode has now been converted to DMA as of commit b09058bbf5f0 ("spi: spi-fsl-dspi: set ColdFire to DMA mode"), we can finally delete this code. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20200823212657.2400075-1-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-08-20Merge series "spi: rspi: Bit rate improvements" from Geert Uytterhoeven ↵Mark Brown
<geert+renesas@glider.be>: Hi Mark, This patch series contains several improvements for the Renesas SPI/QSPI driver related to bit rate configuration. Changes compared to v1 (https://lore.kernel.org/r/20200608095940.30516-1-geert+renesas@glider.be): - Drop accepted patch. This has been tested on RSK+RZA1 (RSPI) and R-Car M2-W/Koelsch (QSPI), using a scope and logic analyzer, except for the by-one divider on QSPI. This has not been tested on legacy SuperH, due to lack of hardware. Thanks for your comments! Geert Uytterhoeven (7): spi: rspi: Remove useless .set_config_register() check spi: rspi: Clean up Bit Rate Division Setting handling spi: rspi: Increase bit rate accuracy on RZ/A spi: rspi: Increase bit rate range for RSPI on SH spi: rspi: Increase bit rate range for QSPI spi: rspi: Fill in spi_transfer.effective_speed_hz spi: rspi: Fill in controller speed limits drivers/spi/spi-rspi.c | 81 +++++++++++++++++++++++++++--------------- 1 file changed, 52 insertions(+), 29 deletions(-) -- 2.17.1 Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
2020-08-20spi: imx: Remove unneeded probe messageFabio Estevam
There is no point in printing a plain "probed" message on successful probe. Just remove it and make the kernel log a bit less noisy. Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20200819123330.22880-1-festevam@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20spi: rspi: Fill in controller speed limitsGeert Uytterhoeven
Fill in the controller speed limits, so the SPI core can use them for validating SPI transfers, and adjusting them where needed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819125904.20938-8-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20spi: rspi: Fill in spi_transfer.effective_speed_hzGeert Uytterhoeven
Fill in the effective bit rate used for transfers, so the SPI core can calculate instead of estimate delays. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819125904.20938-7-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20spi: rspi: Increase bit rate range for QSPIGeert Uytterhoeven
Increase bit rate range for QSPI by extending the range of supported dividers: 1. QSPI supports a divider of 1, by setting SPBR to zero, increasing the upper limit from 48.75 to 97.5 MHz on R-Car Gen2, 2. Make use of the Bit Rate Frequency Division Setting field in Command Registers, to decrease the lower limit from 191 to 24 kbps on R-Car Gen2. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819125904.20938-6-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20spi: rspi: Increase bit rate range for RSPI on SHGeert Uytterhoeven
Increase bit rate range for RSPI on legacy SH by making use of the Bit Rate Frequency Division Setting field in Command Registers, just like is already done on RZ/A. This decreases the lower limit by a factor of 8. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819125904.20938-5-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20spi: rspi: Increase bit rate accuracy on RZ/AGeert Uytterhoeven
rspi_rz_set_config_register() favors high values of "brdv" over high values of "spbr". As "brdv" is not a plain divider, but controls a power-of-two divider, this may cause the selection of non-optimal divider values. E.g. on RSK+RZA1, when 3.8 MHz is requested, the actual configured bit rate is 2.08 MHz (spbr = 1, brdv = 3), while 3.7 MHz would be possible (spbr = 8, brdv = 0). Fix this by only resorting to higher "brdv" values when really needed. This makes the driver always pick optimal divider values on RZ/A. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819125904.20938-4-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20spi: rspi: Clean up Bit Rate Division Setting handlingGeert Uytterhoeven
Add a macro for configuring the Bit Rate Division Setting field in Command Registers, instead of open-coding the same operation using a hardcoded shift. Rename "div" to "brdv", as it is not a plain divider value, but controls a power-of-two divider. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819125904.20938-3-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20spi: rspi: Remove useless .set_config_register() checkGeert Uytterhoeven
Not implementing spi_ops.set_config_register() is a driver bug that would prevent the driver from working at all. Hence remove the run-time check. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819125904.20938-2-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-20ARM: s3c24xx: spi: avoid hardcoding fiq number in driverArnd Bergmann
The IRQ_EINT0 constant is a platform detail that is defined in mach/irqs.h and not visible to drivers once that header is made private. Since the same calculation already happens in s3c24xx_set_fiq, just return the value from there. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200806182059.2431-31-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-19ARM: s3c24xx: move spi fiq handler into platformArnd Bergmann
The fiq handler needs access to some register definitions that should not be used directly by device drivers. Since this is closely related to the irqchip driver anyway, move it into the same place. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [krzk: Add a header guard in include/linux/spi/s3c24xx-fiq.h, fix SPDX comment style, update maintainer's entry] Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200806182059.2431-23-krzk%40kernel.org Acked-by: Mark Brown <broonie@kernel.org>
2020-08-19ARM: s3c24xx: move regs-spi.h into spi driverArnd Bergmann
The file is mostly specific to the driver, the few bits that are actually used by the platform code get moved to mach/map.h instead. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200806182059.2431-20-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-19ARM: s5pv210: don't imply CONFIG_PLAT_SAMSUNGArnd Bergmann
The plat-samsung directory and mach-s5pv210 can be build completely independently, so split the two Kconfig symbols CONFIG_PLAT_SAMSUNG and CONFIG_ARCH_S5PV210. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200806182059.2431-18-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-08-19spi: imx: Do not print an error when PIO is usedFabio Estevam
There are cases that DMA is not used and the driver gracefully falls back to PIO mode. Do not treat it like an error message and move it to debug level instead. Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20200818223519.8737-1-festevam@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-18Merge tag 'spi-fix-v5.9-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A bunch of fixes that came in for SPI during the merge window. Some from ST and others for their controller, one from Lukas for a race between device addition and controller unregistration and one from fix from Geert for the DT bindings which unbreaks validation" * tag 'spi-fix-v5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: dt-bindings: lpspi: Add missing boolean type for fsl,spi-only-use-cs1-sel spi: stm32: always perform registers configuration prior to transfer spi: stm32: fixes suspend/resume management spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate spi: stm32: fix fifo threshold level in case of short transfer spi: stm32h7: fix race condition at end of transfer spi: stm32: clear only asserted irq flags on interrupt spi: Prevent adding devices below an unregistering controller
2020-08-18spi: s3c24xx: correct kerneldoc commentKrzysztof Kozlowski
Correct the kerneldoc for structure to fix W=1 compile warning: drivers/spi/spi-s3c24xx.c:36: warning: cannot understand function prototype: 'struct s3c24xx_spi_devstate ' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Andi Shyti <andi@etezian.org> Link: https://lore.kernel.org/r/20200804151356.28057-1-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-18spi: spi-fsl-dspi: set ColdFire to DMA modeAngelo Dureghello
Set DMA transfer mode for ColdFire. After recent fixes to fsl edma engine, this mode can be used also for ColdFire, and from some raw mtd r/w tests it definitely improves the transfer rate, so keeping it selected. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> Link: https://lore.kernel.org/r/20200816094635.1830006-1-angelo.dureghello@timesys.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-18spi: a3700: Remove a useless memsetChristophe JAILLET
Memory allocated by 'spi_alloc_master()' is already zeroed. Remove a redundant memset. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/20200802175007.703995-1-christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-18spi: lpspi: Remove CONFIG_PM_SLEEP ifdeferyFabio Estevam
Use __maybe_unused for the suspend()/resume() hooks and get rid of the CONFIG_PM_SLEEP ifdefery to improve the code. Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20200817235812.19518-1-festevam@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-08-17Merge existing fixes from spi/for-5.9Mark Brown
2020-08-10spi: stm32: always perform registers configuration prior to transferAlain Volmat
SPI registers content may have been lost upon suspend/resume sequence. So, always compute and apply the necessary configuration in stm32_spi_transfer_one_setup routine. Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-6-git-send-email-alain.volmat@st.com Signed-off-by: Mark Brown <broonie@kernel.org>