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2021-01-06can: tcan4x5x: add support for half-duplex controllersMarc Kleine-Budde
This patch adds back support for half-duplex controllers, which was removed in the last patch. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-17-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: rework SPI accessMarc Kleine-Budde
This patch reworks the SPI access and fixes several probems: - tcan4x5x_regmap_gather_write(), tcan4x5x_regmap_read(): Do not place variable "addr" on stack and use it as buffer for SPI transfer. Buffers for SPI transfers must be allocated from DMA save memory. - tcan4x5x_regmap_gather_write(), tcan4x5x_regmap_read(): Halfe number of SPI transfers by using a single buffer + memcpy(). This improves the performance, especially on SPI controllers, which use interrupt based transfers. - Use "8" bits per word, not "32". This makes it possible to use this driver on SoCs like the Raspberry Pi, which SPI host controller drivers only support 8 bits per word. Note: this breaks half duplex only controllers. Support for them will be re-added in the next patch. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-16-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: add {wr,rd}_tableMarc Kleine-Budde
The memory space of the chip is not fully populated, so add a regmap range table to document this. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-15-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: add max_raw_{read,write} of 256Marc Kleine-Budde
The tcan4x5x chip support bulk read/write, but as the length field is only 8 bits wide, the maximum is 256. A length of 0 is treated as 256. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-14-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: tcan4x5x_regmap: set reg_stride to 4Marc Kleine-Budde
This patch sets the regmap stide to 4, as the chip only supports access on 32 bit alligned access. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-13-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: fix max register valueMarc Kleine-Budde
This patch fixes the max register value for the regmap. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-12-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: tcan4x5x_regmap_init(): use spi as context pointerMarc Kleine-Budde
This patch replaces the context pointer of the regmap callback functions by a pointer to the spi_device. This saves one level of indirection in the callbacks. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-11-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: tcan4x5x_regmap_write(): remove not needed casts and replace ↵Marc Kleine-Budde
4 by sizeof This patch simplifies the tcan4x5x_regmap_write(0 function by removing not needed casts and replaces hardcoded "4" by appropriate sizeof()s. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-10-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: rename regmap_spi_gather_write() -> ↵Marc Kleine-Budde
tcan4x5x_regmap_gather_write() This patch renames the regmap_spi_gather_write() function to tcan4x5x_regmap_gather_write(). Now it has a "tcan4x5x_" prefix as all other functions in this driver. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-9-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: remove regmap async supportMarc Kleine-Budde
The driver doesn't use regmap async support, so remove the stubs. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-8-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: tcan4x5x_bus: remove not needed read_flag_maskMarc Kleine-Budde
With C99 initializers, all non mentioned members are initialzied to 0, so remove not needed initialization of read_flag_mask. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-7-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: mark struct regmap_bus tcan4x5x_bus as constantMarc Kleine-Budde
This patch marks the struct regmap_bus tcan4x5x_bus as constant. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-6-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: move regmap code into seperate fileMarc Kleine-Budde
This patch moves the regmap code into a seperate file. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-5-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: rename tcan4x5x.c -> tcan4x5x-core.cMarc Kleine-Budde
This is a preparation patch to move the regmap related code into a seperate file. This patch removes the tcan4x5x.c to tcan4x5x-core.c. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-4-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: beautify indention of tcan4x5x_of_match and tcan4x5x_id_tableMarc Kleine-Budde
This patch beautifies the indention of the tcan4x5x_of_match and tcan4x5x_id_table. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-3-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-06can: tcan4x5x: replace DEVICE_NAME by KBUILD_MODNAMEMarc Kleine-Budde
This patch replaces the DEVICE_NAME macro by KBUILD_MODNAME and removed the superfluous DEVICE_NAME. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-2-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2021-01-05net: ks8851: Register MDIO bus and the internal PHYMarek Vasut
The KS8851 has a reduced internal PHY, which is accessible through its registers at offset 0xe4. The PHY is compatible with KS886x PHY present in Micrel switches, except the PHY ID Low/High registers are swapped. Register MDIO bus so this PHY can be detected and probed by phylib. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Lukas Wunner <lukas@wunner.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net: phy: micrel: Add KS8851 PHY supportMarek Vasut
The KS8851 has a reduced internal PHY, which is accessible through its registers at offset 0xe4. The PHY is compatible with KS886x PHY present in Micrel switches, including the PHY ID Low/High registers swap, which is present both in the MAC and the switch. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Heiner Kallweit <hkallweit1@gmail.com> Cc: Lukas Wunner <lukas@wunner.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05macvlan: remove redundant null check on dataYunjian Wang
Because macvlan_common_newlink() and macvlan_changelink() already checked NULL data parameter, so the additional check is unnecessary, just remove it. Fixes: 79cf79abce71 ("macvlan: add source mode") Signed-off-by: Yunjian Wang <wangyunjian@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05octeontx2-pf: Add RSS multi group supportGeetha sowjanya
Hardware supports 8 RSS groups per interface. Currently we are using only group '0'. This patch allows user to create new RSS groups/contexts and use the same as destination for flow steering rules. usage: To steer the traffic to RQ 2,3 ethtool -X eth0 weight 0 0 1 1 context new (It will print the allocated context id number) New RSS context is 1 ethtool -N eth0 flow-type tcp4 dst-port 80 context 1 loc 1 To delete the context ethtool -X eth0 context 1 delete When an RSS context is removed, the active classification rules using this context are also removed. Change-log: v4 - Fixed compiletime warning. - Address Saeed's comments on v3. v3 - Coverted otx2_set_rxfh() to use new function. v2 - Removed unrelated whitespace - Coverted otx2_get_rxfh() to use new function. Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net/mlxfw: Use kzalloc for allocating only one thingZheng Yongjun
Use kzalloc rather than kcalloc(1,...) The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05Merge tag 'mlx5-updates-2021-01-05' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2021-01-05 SW steering, Refactor to have a device specific STE layer below dr_ste This series introduces some improvements and refactoring by adding a new layer below dr_ste to allow support for different devices format. It adds a struct of device specific callbacks for STE layer below dr_ste. Each device will implement its HW-specific function, and a common logic from the DR code will access these functions through the new ste_ctx API. Connect-X5-style steering format is called STE_v0. In the next patch series we bring the Connect-X6-style format - STE_v1. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05octeontx2-af: Use kzalloc for allocating only one thingZheng Yongjun
Use kzalloc rather than kcalloc(1,...) The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05iavf: Use kzalloc for allocating only one thingZheng Yongjun
Use kzalloc rather than kcalloc(1,...) The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05liquidio: Use kzalloc for allocating only one thingZheng Yongjun
Use kzalloc rather than kcalloc(1,...) The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05bnxt_en: Use kzalloc for allocating only one thingZheng Yongjun
Use kzalloc rather than kcalloc(1,...) The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net: dsa: sja1105: Use kzalloc for allocating only one thingZheng Yongjun
Use kzalloc rather than kcalloc(1,...) The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05cavium/liquidio: Use DEFINE_SPINLOCK() for spinlockZheng Yongjun
spinlock can be initialized automatically with DEFINE_SPINLOCK() rather than explicitly calling spin_lock_init(). Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net: ixp4xx_eth: Use DEFINE_SPINLOCK() for spinlockZheng Yongjun
spinlock can be initialized automatically with DEFINE_SPINLOCK() rather than explicitly calling spin_lock_init(). Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net: usb: Use DEFINE_SPINLOCK() for spinlockZheng Yongjun
spinlock can be initialized automatically with DEFINE_SPINLOCK() rather than explicitly calling spin_lock_init(). Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net: wan: Use DEFINE_SPINLOCK() for spinlockZheng Yongjun
spinlock can be initialized automatically with DEFINE_SPINLOCK() rather than explicitly calling spin_lock_init(). Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net: wan: Replace simple_strtol by simple_strtoulZheng Yongjun
The simple_strtol() function is deprecated, use simple_strtoul() instead. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net: mhi: Add raw IP mode supportLoic Poulain
MHI net is protocol agnostic, the payload protocol depends on the modem configuration, which can be either RMNET (IP muxing and aggregation) or raw IP. This patch adds support for incomming IPv4/IPv6 packets, that was previously unconditionnaly reported as RMNET packets. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05enetc: reorder macros and functionsMichael Walle
Now that there aren't any more macros with parameters, move the macros above any functions. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05enetc: drop MDIO_DATA() macroMichael Walle
value is u16, masking with 0xffff is a nop. Drop it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05enetc: don't use macro magic for the readx_poll_timeout() callbackMichael Walle
The macro enetc_mdio_rd_reg() is just used in that particular case and has a hardcoded parameter name "mdio_priv". Define a specific function to use for readx_poll_timeout() instead. Also drop the TIMEOUT macro since it is used just once. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05enetc: drop unneeded indirectionMichael Walle
Before commit 6517798dd343 ("enetc: Make MDIO accessors more generic and export to include/linux/fsl") these macros actually had some benefits. But after the commit it just makes the code hard to read. Drop the macro indirections. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-05net/mlx5: DR, Move STEv0 modify header logicYevgeny Kliteynik
Move HW specific modify header fields and logic to STEv0 file and use the new STE context callbacks. Since STEv0 and STEv1 modify actions values are different, each version has its own implementation. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Add STE modify header actions per-device APIYevgeny Kliteynik
Extend the STE context struct with per-device modify header actions. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Move STEv0 action apply logicYevgeny Kliteynik
Use STE tx/rx actions per-device API: move HW specific action apply logic from dr_ste to STEv0 file - STEv0 and STEv1 actions format is different, each version should have its own implementation. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Add STE tx/rx actions per-device APIYevgeny Kliteynik
Extend the STE context struct with per-device tx/rx actions. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Move STEv0 setters and gettersYevgeny Kliteynik
Use the new setters and getters API for STEv0: move HW specific setter and getters from dr_ste to STEv0 file. Since STEv0 and STEv1 format are different each version should implemented different setters and getters. Rename remaining static functions w/o mlx5 prefix. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Add STE setters and getters per-device APIYevgeny Kliteynik
Extend the STE context struct with various per-device setters and getters. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Move action apply logic to dr_steYevgeny Kliteynik
The action apply logic is device specific per STE version, moving to the STE layer will allow implementing it for both devices while keeping DR upper layers the same. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Refactor ICMP STE builderYevgeny Kliteynik
Reworked ICMP tag builder to better handle ICMP v4/6 fields and avoid unneeded code duplication and 'if' statements, removed unused macro, changed bitfield of len 8 to u8. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Move STEv0 look up types from mlx5_ifc_dr headerYevgeny Kliteynik
The lookup types are device specific and should not be exposed to DR upper layers, matchers/tables. Each HW STE version should keep them internal. The lu_type size is updated to support larger lu_types as required for STEv1. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Merge similar DR STE SET macrosYevgeny Kliteynik
Merge DR_STE_STE macros for better code reuse, the macro DR_STE_SET_MASK_V and DR_STE_SET_TAG are merged to avoid tag and bit_mask function creation which are usually the same. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Fix STEv0 source_eswitch_owner_vhca_id supportYevgeny Kliteynik
Check vport_cap only if match on source gvmi is required. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Remove unused macro definition from dr_steYevgeny Kliteynik
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2021-01-05net/mlx5: DR, Move HW STEv0 match logic to a separate fileYevgeny Kliteynik
Move current STE match logic to a seprate file. This file will be used for HW specific STEv0. Future patches will add functionality for v1 steering. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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