From 1bc2962e530527de829bf4b1eb99f24dc25d1828 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 2 Apr 2010 14:15:09 +0100 Subject: i2c-s3c2410: Remove unconditional 1ms delay on each transfer The S3C I2C controller indicates completion of I2C transfers before the bus has a stop condition on it. In order to ensure that we do not attempt to start a new transfer before the bus is idle the driver currently inserts a 1ms delay. This is vastly larger than is generally required and has a visible effect on performance under load, such as when bringing up audio CODECs or reading back status information with non-bulk I2C reads. Replace the sleep with a spin on the IIC status register for up to 1ms. This will busy wait but testing on my SMDK6410 system indicates that the overwhelming majority of transactions complete on the first spin, with maximum latencies of less than 10 spins so the absolute overhead of busy waiting should be at worst comprable to msleep(), and the overall system performance is dramatically improved. The main risk is poor interaction with multimaster systems where we may miss the bus going idle before the next transaction. Defend against this by falling back to the original 1ms delay after 20 spins. The overall effect in my testing is an approximately 20% improvement in kernel startup time. Signed-off-by: Mark Brown Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-s3c2410.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index d27072b2249f..ec3256cce91e 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -482,7 +482,8 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num) { - unsigned long timeout; + unsigned long iicstat, timeout; + int spins = 20; int ret; if (i2c->suspended) @@ -521,7 +522,21 @@ static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, /* ensure the stop has been through the bus */ - msleep(1); + dev_dbg(i2c->dev, "waiting for bus idle\n"); + + /* first, try busy waiting briefly */ + do { + iicstat = readl(i2c->regs + S3C2410_IICSTAT); + } while ((iicstat & S3C2410_IICSTAT_START) && --spins); + + /* if that timed out sleep */ + if (!spins) { + msleep(1); + iicstat = readl(i2c->regs + S3C2410_IICSTAT); + } + + if (iicstat & S3C2410_IICSTAT_START) + dev_warn(i2c->dev, "timeout waiting for bus idle\n"); out: return ret; -- cgit v1.2.3-70-g09d2 From dd7319a5289deb4e17beb8851d343e7930b32c3b Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 22 Mar 2010 03:23:16 -0400 Subject: i2c-bfin-twi: integrate timeout timer with completion interface There isn't much point in managing our own custom timeout timer when the completion interface already includes support for it. This makes the resulting code much simpler and robust. Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-bfin-twi.c | 125 ++++++++++++++++++++------------------ 1 file changed, 66 insertions(+), 59 deletions(-) diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c index f1e14dd590c9..441134a1df92 100644 --- a/drivers/i2c/busses/i2c-bfin-twi.c +++ b/drivers/i2c/busses/i2c-bfin-twi.c @@ -25,8 +25,6 @@ #include #include -#define POLL_TIMEOUT (2 * HZ) - /* SMBus mode*/ #define TWI_I2C_MODE_STANDARD 1 #define TWI_I2C_MODE_STANDARDSUB 2 @@ -44,8 +42,6 @@ struct bfin_twi_iface { int cur_mode; int manual_stop; int result; - int timeout_count; - struct timer_list timeout_timer; struct i2c_adapter adap; struct completion complete; struct i2c_msg *pmsg; @@ -169,16 +165,13 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) write_INT_MASK(iface, 0); write_MASTER_CTL(iface, 0); SSYNC(); - /* If it is a quick transfer, only address bug no data, + /* If it is a quick transfer, only address without data, * not an err, return 1. + * If address is acknowledged return 1. */ - if (iface->writeNum == 0 && (mast_stat & BUFRDERR)) + if ((iface->writeNum == 0 && (mast_stat & BUFRDERR)) + || !(mast_stat & ANAK)) iface->result = 1; - /* If address not acknowledged return -1, - * else return 0. - */ - else if (!(mast_stat & ANAK)) - iface->result = 0; } complete(&iface->complete); return; @@ -250,9 +243,9 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) write_INT_MASK(iface, 0); write_MASTER_CTL(iface, 0); SSYNC(); - complete(&iface->complete); } } + complete(&iface->complete); } /* Interrupt handler */ @@ -262,36 +255,15 @@ static irqreturn_t bfin_twi_interrupt_entry(int irq, void *dev_id) unsigned long flags; spin_lock_irqsave(&iface->lock, flags); - del_timer(&iface->timeout_timer); bfin_twi_handle_interrupt(iface); spin_unlock_irqrestore(&iface->lock, flags); return IRQ_HANDLED; } -static void bfin_twi_timeout(unsigned long data) -{ - struct bfin_twi_iface *iface = (struct bfin_twi_iface *)data; - unsigned long flags; - - spin_lock_irqsave(&iface->lock, flags); - bfin_twi_handle_interrupt(iface); - if (iface->result == 0) { - iface->timeout_count--; - if (iface->timeout_count > 0) { - iface->timeout_timer.expires = jiffies + POLL_TIMEOUT; - add_timer(&iface->timeout_timer); - } else { - iface->result = -1; - complete(&iface->complete); - } - } - spin_unlock_irqrestore(&iface->lock, flags); -} - /* - * Generic i2c master transfer entrypoint + * One i2c master transfer */ -static int bfin_twi_master_xfer(struct i2c_adapter *adap, +static int bfin_twi_do_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { struct bfin_twi_iface *iface = adap->algo_data; @@ -319,7 +291,6 @@ static int bfin_twi_master_xfer(struct i2c_adapter *adap, iface->transPtr = pmsg->buf; iface->writeNum = iface->readNum = pmsg->len; iface->result = 0; - iface->timeout_count = 10; init_completion(&(iface->complete)); /* Set Transmit device address */ write_MASTER_ADDR(iface, pmsg->addr); @@ -358,30 +329,49 @@ static int bfin_twi_master_xfer(struct i2c_adapter *adap, iface->manual_stop = 1; } - iface->timeout_timer.expires = jiffies + POLL_TIMEOUT; - add_timer(&iface->timeout_timer); - /* Master enable */ write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN | ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) | ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0)); SSYNC(); - wait_for_completion(&iface->complete); - - rc = iface->result; + while (!iface->result) { + if (!wait_for_completion_timeout(&iface->complete, + adap->timeout)) { + iface->result = -1; + dev_err(&adap->dev, "master transfer timeout\n"); + } + } - if (rc == 1) - return num; + if (iface->result == 1) + rc = iface->cur_msg + 1; else - return rc; + rc = iface->result; + + return rc; } /* - * SMBus type transfer entrypoint + * Generic i2c master transfer entrypoint */ +static int bfin_twi_master_xfer(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + int i, ret = 0; -int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr, + for (i = 0; i < adap->retries; i++) { + ret = bfin_twi_do_master_xfer(adap, msgs, num); + if (ret > 0) + break; + } + + return ret; +} + +/* + * One I2C SMBus transfer + */ +int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data) { @@ -469,7 +459,6 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr, iface->manual_stop = 0; iface->read_write = read_write; iface->command = command; - iface->timeout_count = 10; init_completion(&(iface->complete)); /* FIFO Initiation. Data in FIFO should be discarded before @@ -486,9 +475,6 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr, write_MASTER_ADDR(iface, addr); SSYNC(); - iface->timeout_timer.expires = jiffies + POLL_TIMEOUT; - add_timer(&iface->timeout_timer); - switch (iface->cur_mode) { case TWI_I2C_MODE_STANDARDSUB: write_XMT_DATA8(iface, iface->command); @@ -550,10 +536,8 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr, else if (iface->readNum > 255) { write_MASTER_CTL(iface, 0xff << 6); iface->manual_stop = 1; - } else { - del_timer(&iface->timeout_timer); + } else break; - } } } write_INT_MASK(iface, MCOMP | MERR | @@ -569,13 +553,38 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr, } SSYNC(); - wait_for_completion(&iface->complete); + while (!iface->result) { + if (!wait_for_completion_timeout(&iface->complete, + adap->timeout)) { + iface->result = -1; + dev_err(&adap->dev, "smbus transfer timeout\n"); + } + } rc = (iface->result >= 0) ? 0 : -1; return rc; } +/* + * Generic I2C SMBus transfer entrypoint + */ +int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr, + unsigned short flags, char read_write, + u8 command, int size, union i2c_smbus_data *data) +{ + int i, ret = 0; + + for (i = 0; i < adap->retries; i++) { + ret = bfin_twi_do_smbus_xfer(adap, addr, flags, + read_write, command, size, data); + if (ret == 0) + break; + } + + return ret; +} + /* * Return what the adapter supports */ @@ -667,10 +676,6 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev) goto out_error_no_irq; } - init_timer(&(iface->timeout_timer)); - iface->timeout_timer.function = bfin_twi_timeout; - iface->timeout_timer.data = (unsigned long)iface; - p_adap = &iface->adap; p_adap->nr = pdev->id; strlcpy(p_adap->name, pdev->name, sizeof(p_adap->name)); @@ -678,6 +683,8 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev) p_adap->algo_data = iface; p_adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; p_adap->dev.parent = &pdev->dev; + p_adap->timeout = 5 * HZ; + p_adap->retries = 3; rc = peripheral_request_list(pin_req[pdev->id], "i2c-bfin-twi"); if (rc) { -- cgit v1.2.3-70-g09d2 From 5cfafc18f38aa6701f581bee875fb0b19f3b3b4b Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Mon, 22 Mar 2010 03:23:17 -0400 Subject: i2c-bfin-twi: add debug output for error status Add some debug() code to decode the error register. Signed-off-by: Michael Hennerich Signed-off-by: Mike Frysinger Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-bfin-twi.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c index 441134a1df92..0279a7a6b86c 100644 --- a/drivers/i2c/busses/i2c-bfin-twi.c +++ b/drivers/i2c/busses/i2c-bfin-twi.c @@ -157,6 +157,18 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) write_MASTER_CTL(iface, 0); SSYNC(); iface->result = -EIO; + + if (mast_stat & LOSTARB) + dev_dbg(&iface->adap.dev, "Lost Arbitration\n"); + if (mast_stat & ANAK) + dev_dbg(&iface->adap.dev, "Address Not Acknowledged\n"); + if (mast_stat & DNAK) + dev_dbg(&iface->adap.dev, "Data Not Acknowledged\n"); + if (mast_stat & BUFRDERR) + dev_dbg(&iface->adap.dev, "Buffer Read Error\n"); + if (mast_stat & BUFWRERR) + dev_dbg(&iface->adap.dev, "Buffer Write Error\n"); + /* if both err and complete int stats are set, return proper * results. */ -- cgit v1.2.3-70-g09d2 From 5481d0753e7a78bff7550a8165b7924baa74e9cf Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 22 Mar 2010 03:23:18 -0400 Subject: i2c-bfin-twi: fix lost interrupts at high speeds i2c event of next read/write byte may trigger before current int state is cleared in the interrupt handler. So, this should be done at the beginning of interrupt handler to avoid losing new i2c events. Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-bfin-twi.c | 37 +++++++++++++------------------------ 1 file changed, 13 insertions(+), 24 deletions(-) diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c index 0279a7a6b86c..ff61c4b22095 100644 --- a/drivers/i2c/busses/i2c-bfin-twi.c +++ b/drivers/i2c/busses/i2c-bfin-twi.c @@ -81,14 +81,15 @@ static const u16 pin_req[2][3] = { {P_TWI1_SCL, P_TWI1_SDA, 0}, }; -static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) +static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface, + unsigned short twi_int_status) { - unsigned short twi_int_status = read_INT_STAT(iface); unsigned short mast_stat = read_MASTER_STAT(iface); if (twi_int_status & XMTSERV) { /* Transmit next data */ if (iface->writeNum > 0) { + SSYNC(); write_XMT_DATA8(iface, *(iface->transPtr++)); iface->writeNum--; } @@ -110,10 +111,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) write_MASTER_CTL(iface, (read_MASTER_CTL(iface) | RSTART) & ~MDIR); } - SSYNC(); - /* Clear status */ - write_INT_STAT(iface, XMTSERV); - SSYNC(); } if (twi_int_status & RCVSERV) { if (iface->readNum > 0) { @@ -135,7 +132,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) } else if (iface->manual_stop) { write_MASTER_CTL(iface, read_MASTER_CTL(iface) | STOP); - SSYNC(); } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT && iface->cur_msg + 1 < iface->msg_num) { if (iface->pmsg[iface->cur_msg + 1].flags & I2C_M_RD) @@ -144,18 +140,12 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) else write_MASTER_CTL(iface, (read_MASTER_CTL(iface) | RSTART) & ~MDIR); - SSYNC(); } - /* Clear interrupt source */ - write_INT_STAT(iface, RCVSERV); - SSYNC(); } if (twi_int_status & MERR) { - write_INT_STAT(iface, MERR); write_INT_MASK(iface, 0); write_MASTER_STAT(iface, 0x3e); write_MASTER_CTL(iface, 0); - SSYNC(); iface->result = -EIO; if (mast_stat & LOSTARB) @@ -173,10 +163,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) * results. */ if (twi_int_status & MCOMP) { - write_INT_STAT(iface, MCOMP); - write_INT_MASK(iface, 0); - write_MASTER_CTL(iface, 0); - SSYNC(); /* If it is a quick transfer, only address without data, * not an err, return 1. * If address is acknowledged return 1. @@ -189,8 +175,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) return; } if (twi_int_status & MCOMP) { - write_INT_STAT(iface, MCOMP); - SSYNC(); if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { if (iface->readNum == 0) { /* set the read number to 1 and ask for manual @@ -212,7 +196,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) /* remove restart bit and enable master receive */ write_MASTER_CTL(iface, read_MASTER_CTL(iface) & ~RSTART); - SSYNC(); } else if (iface->cur_mode == TWI_I2C_MODE_REPEAT && iface->cur_msg+1 < iface->msg_num) { iface->cur_msg++; @@ -231,7 +214,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) write_XMT_DATA8(iface, *(iface->transPtr++)); iface->writeNum--; - SSYNC(); } } @@ -249,12 +231,10 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface) /* remove restart bit and enable master receive */ write_MASTER_CTL(iface, read_MASTER_CTL(iface) & ~RSTART); - SSYNC(); } else { iface->result = 1; write_INT_MASK(iface, 0); write_MASTER_CTL(iface, 0); - SSYNC(); } } complete(&iface->complete); @@ -265,9 +245,18 @@ static irqreturn_t bfin_twi_interrupt_entry(int irq, void *dev_id) { struct bfin_twi_iface *iface = dev_id; unsigned long flags; + unsigned short twi_int_status; spin_lock_irqsave(&iface->lock, flags); - bfin_twi_handle_interrupt(iface); + while (1) { + twi_int_status = read_INT_STAT(iface); + if (!twi_int_status) + break; + /* Clear interrupt status */ + write_INT_STAT(iface, twi_int_status); + bfin_twi_handle_interrupt(iface, twi_int_status); + SSYNC(); + } spin_unlock_irqrestore(&iface->lock, flags); return IRQ_HANDLED; } -- cgit v1.2.3-70-g09d2 From be2f80f0a3a333c0c00b2c8a7c2d74fcd66b75a2 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 22 Mar 2010 03:23:19 -0400 Subject: i2c-bfin-twi: remove redundant retry Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-bfin-twi.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c index ff61c4b22095..dabfa80cf5f2 100644 --- a/drivers/i2c/busses/i2c-bfin-twi.c +++ b/drivers/i2c/busses/i2c-bfin-twi.c @@ -358,15 +358,7 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap, static int bfin_twi_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { - int i, ret = 0; - - for (i = 0; i < adap->retries; i++) { - ret = bfin_twi_do_master_xfer(adap, msgs, num); - if (ret > 0) - break; - } - - return ret; + return bfin_twi_do_master_xfer(adap, msgs, num); } /* @@ -574,16 +566,8 @@ int bfin_twi_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data) { - int i, ret = 0; - - for (i = 0; i < adap->retries; i++) { - ret = bfin_twi_do_smbus_xfer(adap, addr, flags, + return bfin_twi_do_smbus_xfer(adap, addr, flags, read_write, command, size, data); - if (ret == 0) - break; - } - - return ret; } /* -- cgit v1.2.3-70-g09d2 From f0ac131a21ed13e8baaa9df6f0420f2c4b45e807 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Mon, 22 Mar 2010 03:23:20 -0400 Subject: i2c-bfin-twi: return completion in interrupt for smbus quick transfers A smbus quick transfer has no data after the address byte. Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-bfin-twi.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c index dabfa80cf5f2..fb26e5c67515 100644 --- a/drivers/i2c/busses/i2c-bfin-twi.c +++ b/drivers/i2c/busses/i2c-bfin-twi.c @@ -159,18 +159,14 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface, if (mast_stat & BUFWRERR) dev_dbg(&iface->adap.dev, "Buffer Write Error\n"); - /* if both err and complete int stats are set, return proper - * results. + /* If it is a quick transfer, only address without data, + * not an err, return 1. */ - if (twi_int_status & MCOMP) { - /* If it is a quick transfer, only address without data, - * not an err, return 1. - * If address is acknowledged return 1. - */ - if ((iface->writeNum == 0 && (mast_stat & BUFRDERR)) - || !(mast_stat & ANAK)) - iface->result = 1; - } + if (iface->cur_mode == TWI_I2C_MODE_STANDARD && + iface->transPtr == NULL && + (twi_int_status & MCOMP) && (mast_stat & DNAK)) + iface->result = 1; + complete(&iface->complete); return; } -- cgit v1.2.3-70-g09d2 From f38e66e0077659e5d2ca3858fdb26fc9b1765b9f Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Tue, 11 May 2010 11:35:04 -0700 Subject: omap: i2c: Add i2c support on omap4 platform This patch is rebased version of earlier post to add I2C driver support to OMAP4 platform. On OMAP4, all I2C register address offsets are changed from OMAP1/2/3 I2C. In order to not have #ifdef's at various places in code, as well as to support multi-OMAP build, an array is created to hold the register addresses with it's offset. This patch was submitted, reviewed and acked on mailing list already. For more details refer below link http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html This updated verion has a depedancy on "Add support for 16-bit registers" posted on linux-omap. Below is the patch-works link for the same http://patchwork.kernel.org/patch/72295/ Signed-off-by: Syed Rafiuddin Signed-off-by: Santosh Shilimkar Acked-by: Kevin Hilman Reviewed-by: Paul Walmsley Cc: Cory Maccarrone Signed-off-by: Tony Lindgren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-omap.c | 146 +++++++++++++++++++++++++++++++++--------- 1 file changed, 114 insertions(+), 32 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 389ac6032a7b..46111ff18133 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -45,29 +45,37 @@ /* I2C controller revisions present on specific hardware */ #define OMAP_I2C_REV_ON_2430 0x36 #define OMAP_I2C_REV_ON_3430 0x3C +#define OMAP_I2C_REV_ON_4430 0x40 /* timeout waiting for the controller to respond */ #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000)) -#define OMAP_I2C_REV_REG 0x00 -#define OMAP_I2C_IE_REG 0x01 -#define OMAP_I2C_STAT_REG 0x02 -#define OMAP_I2C_IV_REG 0x03 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */ -#define OMAP_I2C_WE_REG 0x03 -#define OMAP_I2C_SYSS_REG 0x04 -#define OMAP_I2C_BUF_REG 0x05 -#define OMAP_I2C_CNT_REG 0x06 -#define OMAP_I2C_DATA_REG 0x07 -#define OMAP_I2C_SYSC_REG 0x08 -#define OMAP_I2C_CON_REG 0x09 -#define OMAP_I2C_OA_REG 0x0a -#define OMAP_I2C_SA_REG 0x0b -#define OMAP_I2C_PSC_REG 0x0c -#define OMAP_I2C_SCLL_REG 0x0d -#define OMAP_I2C_SCLH_REG 0x0e -#define OMAP_I2C_SYSTEST_REG 0x0f -#define OMAP_I2C_BUFSTAT_REG 0x10 +enum { + OMAP_I2C_REV_REG = 0, + OMAP_I2C_IE_REG, + OMAP_I2C_STAT_REG, + OMAP_I2C_IV_REG, + OMAP_I2C_WE_REG, + OMAP_I2C_SYSS_REG, + OMAP_I2C_BUF_REG, + OMAP_I2C_CNT_REG, + OMAP_I2C_DATA_REG, + OMAP_I2C_SYSC_REG, + OMAP_I2C_CON_REG, + OMAP_I2C_OA_REG, + OMAP_I2C_SA_REG, + OMAP_I2C_PSC_REG, + OMAP_I2C_SCLL_REG, + OMAP_I2C_SCLH_REG, + OMAP_I2C_SYSTEST_REG, + OMAP_I2C_BUFSTAT_REG, + OMAP_I2C_REVNB_LO, + OMAP_I2C_REVNB_HI, + OMAP_I2C_IRQSTATUS_RAW, + OMAP_I2C_IRQENABLE_SET, + OMAP_I2C_IRQENABLE_CLR, +}; /* I2C Interrupt Enable Register (OMAP_I2C_IE): */ #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */ @@ -170,6 +178,7 @@ struct omap_i2c_dev { u32 speed; /* Speed of bus in Khz */ u16 cmd_err; u8 *buf; + u8 *regs; size_t buf_len; struct i2c_adapter adapter; u8 fifo_size; /* use as flag and value @@ -188,15 +197,64 @@ struct omap_i2c_dev { u16 westate; }; +const static u8 reg_map[] = { + [OMAP_I2C_REV_REG] = 0x00, + [OMAP_I2C_IE_REG] = 0x01, + [OMAP_I2C_STAT_REG] = 0x02, + [OMAP_I2C_IV_REG] = 0x03, + [OMAP_I2C_WE_REG] = 0x03, + [OMAP_I2C_SYSS_REG] = 0x04, + [OMAP_I2C_BUF_REG] = 0x05, + [OMAP_I2C_CNT_REG] = 0x06, + [OMAP_I2C_DATA_REG] = 0x07, + [OMAP_I2C_SYSC_REG] = 0x08, + [OMAP_I2C_CON_REG] = 0x09, + [OMAP_I2C_OA_REG] = 0x0a, + [OMAP_I2C_SA_REG] = 0x0b, + [OMAP_I2C_PSC_REG] = 0x0c, + [OMAP_I2C_SCLL_REG] = 0x0d, + [OMAP_I2C_SCLH_REG] = 0x0e, + [OMAP_I2C_SYSTEST_REG] = 0x0f, + [OMAP_I2C_BUFSTAT_REG] = 0x10, +}; + +const static u8 omap4_reg_map[] = { + [OMAP_I2C_REV_REG] = 0x04, + [OMAP_I2C_IE_REG] = 0x2c, + [OMAP_I2C_STAT_REG] = 0x28, + [OMAP_I2C_IV_REG] = 0x34, + [OMAP_I2C_WE_REG] = 0x34, + [OMAP_I2C_SYSS_REG] = 0x90, + [OMAP_I2C_BUF_REG] = 0x94, + [OMAP_I2C_CNT_REG] = 0x98, + [OMAP_I2C_DATA_REG] = 0x9c, + [OMAP_I2C_SYSC_REG] = 0x20, + [OMAP_I2C_CON_REG] = 0xa4, + [OMAP_I2C_OA_REG] = 0xa8, + [OMAP_I2C_SA_REG] = 0xac, + [OMAP_I2C_PSC_REG] = 0xb0, + [OMAP_I2C_SCLL_REG] = 0xb4, + [OMAP_I2C_SCLH_REG] = 0xb8, + [OMAP_I2C_SYSTEST_REG] = 0xbC, + [OMAP_I2C_BUFSTAT_REG] = 0xc0, + [OMAP_I2C_REVNB_LO] = 0x00, + [OMAP_I2C_REVNB_HI] = 0x04, + [OMAP_I2C_IRQSTATUS_RAW] = 0x24, + [OMAP_I2C_IRQENABLE_SET] = 0x2c, + [OMAP_I2C_IRQENABLE_CLR] = 0x30, +}; + static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev, int reg, u16 val) { - __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift)); + __raw_writew(val, i2c_dev->base + + (i2c_dev->regs[reg] << i2c_dev->reg_shift)); } static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) { - return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift)); + return __raw_readw(i2c_dev->base + + (i2c_dev->regs[reg] << i2c_dev->reg_shift)); } static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) @@ -265,7 +323,11 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) WARN_ON(dev->idle); dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); - omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0); + if (dev->rev >= OMAP_I2C_REV_ON_4430) + omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1); + else + omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0); + if (dev->rev < OMAP_I2C_REV_2) { iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */ } else { @@ -330,7 +392,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) * REVISIT: Some wkup sources might not be needed. */ dev->westate = OMAP_I2C_WE_ALL; - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); + if (dev->rev < OMAP_I2C_REV_ON_4430) + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, + dev->westate); } } omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); @@ -357,7 +421,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) psc = fclk_rate / 12000000; } - if (cpu_is_omap2430() || cpu_is_omap34xx()) { + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) { /* * HSI2C controller internal clk rate should be 19.2 Mhz for @@ -747,9 +811,12 @@ complete: if (dev->buf_len) { *dev->buf++ = w; dev->buf_len--; - /* Data reg from 2430 is 8 bit wide */ - if (!cpu_is_omap2430() && - !cpu_is_omap34xx()) { + /* + * Data reg in 2430, omap3 and + * omap4 is 8 bit wide + */ + if (cpu_class_is_omap1() || + cpu_is_omap2420()) { if (dev->buf_len) { *dev->buf++ = w >> 8; dev->buf_len--; @@ -787,9 +854,12 @@ complete: if (dev->buf_len) { w = *dev->buf++; dev->buf_len--; - /* Data reg from 2430 is 8 bit wide */ - if (!cpu_is_omap2430() && - !cpu_is_omap34xx()) { + /* + * Data reg in 2430, omap3 and + * omap4 is 8 bit wide + */ + if (cpu_class_is_omap1() || + cpu_is_omap2420()) { if (dev->buf_len) { w |= *dev->buf++ << 8; dev->buf_len--; @@ -905,17 +975,24 @@ omap_i2c_probe(struct platform_device *pdev) if (cpu_is_omap7xx()) dev->reg_shift = 1; + else if (cpu_is_omap44xx()) + dev->reg_shift = 0; else dev->reg_shift = 2; if ((r = omap_i2c_get_clocks(dev)) != 0) goto err_iounmap; + if (cpu_is_omap44xx()) + dev->regs = (u8 *) omap4_reg_map; + else + dev->regs = (u8 *) reg_map; + omap_i2c_unidle(dev); dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff; - if (cpu_is_omap2430() || cpu_is_omap34xx()) { + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) { u16 s; /* Set up the fifo size - Get total size */ @@ -927,8 +1004,13 @@ omap_i2c_probe(struct platform_device *pdev) * size. This is to ensure that we can handle the status on int * call back latencies. */ - dev->fifo_size = (dev->fifo_size / 2); - dev->b_hw = 1; /* Enable hardware fixes */ + if (dev->rev >= OMAP_I2C_REV_ON_4430) { + dev->fifo_size = 0; + dev->b_hw = 0; /* Disable hardware fixes */ + } else { + dev->fifo_size = (dev->fifo_size / 2); + dev->b_hw = 1; /* Enable hardware fixes */ + } } /* reset ASAP, clearing any IRQs */ -- cgit v1.2.3-70-g09d2 From 20c9d2c4ab8243a1c311248232954b2c1da3ba75 Mon Sep 17 00:00:00 2001 From: Kalle Jokiniemi Date: Tue, 11 May 2010 11:35:08 -0700 Subject: i2c-omap: add mpu wake up latency constraint in i2c While waiting for completion of the i2c transfer, the MPU could hit OFF mode and cause several msecs of delay that made i2c transfers fail more often. The extra delays and subsequent re-trys cause i2c clocks to be active more often. This has also an negative effect on power consumption. Created a mechanism for passing and using the constraint setting function in driver code. The used mpu wake up latency constraints are now set individually per bus, and they are calculated based on clock rate and fifo size. Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley, and Nishanth Menon for tuning out the details of this patch. Updates by Kevin as requested by Tony: - Remove omap_set_i2c_constraint_func() in favor of conditionally adding the flag in omap_i2c_add_bus() in order to keep all the OMAP conditional checking in a single location. - Update set_mpu_wkup_lat prototypes to match OMAP PM layer so OMAP PM function can be used directly in pdata. Cc: Moiz Sonasath Cc: Jarkko Nikula Cc: Paul Walmsley Cc: Nishanth Menon Signed-off-by: Kalle Jokiniemi Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren Signed-off-by: Ben Dooks --- arch/arm/plat-omap/i2c.c | 39 +++++++++++++++++++++++++++------------ drivers/i2c/busses/i2c-omap.c | 24 ++++++++++++++++++++---- include/linux/i2c-omap.h | 9 +++++++++ 3 files changed, 56 insertions(+), 16 deletions(-) create mode 100644 include/linux/i2c-omap.h diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index 624e26298faa..f044b5927508 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -26,9 +26,12 @@ #include #include #include +#include + #include #include #include +#include #define OMAP_I2C_SIZE 0x3f #define OMAP1_I2C_BASE 0xfffb3800 @@ -70,14 +73,14 @@ static struct resource i2c_resources[][2] = { }, \ } -static u32 i2c_rate[ARRAY_SIZE(i2c_resources)]; +static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)]; static struct platform_device omap_i2c_devices[] = { - I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]), + I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]), #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) - I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]), + I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]), #endif #if defined(CONFIG_ARCH_OMAP3) - I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]), + I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]), #endif }; @@ -100,10 +103,12 @@ static int __init omap_i2c_nr_ports(void) static int __init omap_i2c_add_bus(int bus_id) { struct platform_device *pdev; + struct omap_i2c_bus_platform_data *pd; struct resource *res; resource_size_t base, irq; pdev = &omap_i2c_devices[bus_id - 1]; + pd = pdev->dev.platform_data; if (bus_id == 1) { res = pdev->resource; if (cpu_class_is_omap1()) { @@ -123,6 +128,15 @@ static int __init omap_i2c_add_bus(int bus_id) if (cpu_class_is_omap2()) omap2_i2c_mux_pins(bus_id); + /* + * When waiting for completion of a i2c transfer, we need to + * set a wake up latency constraint for the MPU. This is to + * ensure quick enough wakeup from idle, when transfer + * completes. + */ + if (cpu_is_omap34xx()) + pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat; + return platform_device_register(pdev); } @@ -146,8 +160,8 @@ static int __init omap_i2c_bus_setup(char *str) get_options(str, 3, ints); if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports) return 0; - i2c_rate[ints[1] - 1] = ints[2]; - i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP; + i2c_pdata[ints[1] - 1].clkrate = ints[2]; + i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP; return 1; } @@ -161,9 +175,9 @@ static int __init omap_register_i2c_bus_cmdline(void) { int i, err = 0; - for (i = 0; i < ARRAY_SIZE(i2c_rate); i++) - if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) { - i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP; + for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) + if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { + i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; err = omap_i2c_add_bus(i + 1); if (err) goto out; @@ -197,9 +211,10 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate, return err; } - if (!i2c_rate[bus_id - 1]) - i2c_rate[bus_id - 1] = clkrate; - i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP; + if (!i2c_pdata[bus_id - 1].clkrate) + i2c_pdata[bus_id - 1].clkrate = clkrate; + + i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; return omap_i2c_add_bus(bus_id); } diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 46111ff18133..42c0b9108c7f 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -38,6 +38,7 @@ #include #include #include +#include /* I2C controller revisions */ #define OMAP_I2C_REV_2 0x20 @@ -175,6 +176,9 @@ struct omap_i2c_dev { struct clk *fclk; /* Functional clock */ struct completion cmd_complete; struct resource *ioarea; + u32 latency; /* maximum mpu wkup latency */ + void (*set_mpu_wkup_lat)(struct device *dev, + long latency); u32 speed; /* Speed of bus in Khz */ u16 cmd_err; u8 *buf; @@ -603,8 +607,12 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap, * REVISIT: We should abort the transfer on signals, but the bus goes * into arbitration and we're currently unable to recover from it. */ + if (dev->set_mpu_wkup_lat != NULL) + dev->set_mpu_wkup_lat(dev->dev, dev->latency); r = wait_for_completion_timeout(&dev->cmd_complete, OMAP_I2C_TIMEOUT); + if (dev->set_mpu_wkup_lat != NULL) + dev->set_mpu_wkup_lat(dev->dev, -1); dev->buf_len = 0; if (r < 0) return r; @@ -927,6 +935,7 @@ omap_i2c_probe(struct platform_device *pdev) struct omap_i2c_dev *dev; struct i2c_adapter *adap; struct resource *mem, *irq, *ioarea; + struct omap_i2c_bus_platform_data *pdata = pdev->dev.platform_data; irq_handler_t isr; int r; u32 speed = 0; @@ -956,10 +965,13 @@ omap_i2c_probe(struct platform_device *pdev) goto err_release_region; } - if (pdev->dev.platform_data != NULL) - speed = *(u32 *)pdev->dev.platform_data; - else - speed = 100; /* Defualt speed */ + if (pdata != NULL) { + speed = pdata->clkrate; + dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat; + } else { + speed = 100; /* Default speed */ + dev->set_mpu_wkup_lat = NULL; + } dev->speed = speed; dev->idle = 1; @@ -1011,6 +1023,10 @@ omap_i2c_probe(struct platform_device *pdev) dev->fifo_size = (dev->fifo_size / 2); dev->b_hw = 1; /* Enable hardware fixes */ } + /* calculate wakeup latency constraint for MPU */ + if (dev->set_mpu_wkup_lat != NULL) + dev->latency = (1000000 * dev->fifo_size) / + (1000 * speed / 8); } /* reset ASAP, clearing any IRQs */ diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h new file mode 100644 index 000000000000..78ebf507ce56 --- /dev/null +++ b/include/linux/i2c-omap.h @@ -0,0 +1,9 @@ +#ifndef __I2C_OMAP_H__ +#define __I2C_OMAP_H__ + +struct omap_i2c_bus_platform_data { + u32 clkrate; + void (*set_mpu_wkup_lat)(struct device *dev, long set); +}; + +#endif -- cgit v1.2.3-70-g09d2 From 2dd151ab2792cd27a2268a6e4f3248193beed504 Mon Sep 17 00:00:00 2001 From: Alexander Shishkin Date: Tue, 11 May 2010 11:35:14 -0700 Subject: omap: i2c: make errata 1.153 workaround a separate function This is to avoid insanely long lines and levels of indentation. Signed-off-by: Alexander Shishkin Cc: Nishant Menon Signed-off-by: Tony Lindgren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-omap.c | 43 ++++++++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 19 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 42c0b9108c7f..ef73483efb84 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -756,6 +756,27 @@ omap_i2c_rev1_isr(int this_irq, void *dev_id) #define omap_i2c_rev1_isr NULL #endif +/* + * OMAP3430 Errata 1.153: When an XRDY/XDR is hit, wait for XUDF before writing + * data to DATA_REG. Otherwise some data bytes can be lost while transferring + * them from the memory to the I2C interface. + */ +static int errata_omap3_1p153(struct omap_i2c_dev *dev, u16 *stat, int *err) +{ + while (!(*stat & OMAP_I2C_STAT_XUDF)) { + if (*stat & (OMAP_I2C_STAT_NACK | OMAP_I2C_STAT_AL)) { + omap_i2c_ack_stat(dev, *stat & (OMAP_I2C_STAT_XRDY | + OMAP_I2C_STAT_XDR)); + *err |= OMAP_I2C_STAT_XUDF; + return -ETIMEDOUT; + } + cpu_relax(); + *stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); + } + + return 0; +} + static irqreturn_t omap_i2c_isr(int this_irq, void *dev_id) { @@ -885,25 +906,9 @@ complete: break; } - /* - * OMAP3430 Errata 1.153: When an XRDY/XDR - * is hit, wait for XUDF before writing data - * to DATA_REG. Otherwise some data bytes can - * be lost while transferring them from the - * memory to the I2C interface. - */ - - if (dev->rev <= OMAP_I2C_REV_ON_3430) { - while (!(stat & OMAP_I2C_STAT_XUDF)) { - if (stat & (OMAP_I2C_STAT_NACK | OMAP_I2C_STAT_AL)) { - omap_i2c_ack_stat(dev, stat & (OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR)); - err |= OMAP_I2C_STAT_XUDF; - goto complete; - } - cpu_relax(); - stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); - } - } + if ((dev->rev <= OMAP_I2C_REV_ON_3430) && + errata_omap3_1p153(dev, &stat, &err)) + goto complete; omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); } -- cgit v1.2.3-70-g09d2 From e9f59b9c9bc5730152b6a94c47dd90b730a07e35 Mon Sep 17 00:00:00 2001 From: Alexander Shishkin Date: Tue, 11 May 2010 11:35:17 -0700 Subject: omap: i2c: add a timeout to the busy waiting The errata 1.153 workaround is busy waiting on XUDF bit in interrupt context, which may lead to kernel hangs. The problem can be reproduced by running the bus with wrong (too high) speed. Signed-off-by: Alexander Shishkin Signed-off-by: Tony Lindgren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-omap.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index ef73483efb84..00fd02ec1b65 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -763,17 +763,25 @@ omap_i2c_rev1_isr(int this_irq, void *dev_id) */ static int errata_omap3_1p153(struct omap_i2c_dev *dev, u16 *stat, int *err) { - while (!(*stat & OMAP_I2C_STAT_XUDF)) { + unsigned long timeout = 10000; + + while (--timeout && !(*stat & OMAP_I2C_STAT_XUDF)) { if (*stat & (OMAP_I2C_STAT_NACK | OMAP_I2C_STAT_AL)) { omap_i2c_ack_stat(dev, *stat & (OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR)); *err |= OMAP_I2C_STAT_XUDF; return -ETIMEDOUT; } + cpu_relax(); *stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); } + if (!timeout) { + dev_err(dev->dev, "timeout waiting on XUDF bit\n"); + return 0; + } + return 0; } -- cgit v1.2.3-70-g09d2 From f3083d921d8964b66502a0456f62a9d29cd029ef Mon Sep 17 00:00:00 2001 From: manjugk manjugk Date: Tue, 11 May 2010 11:35:20 -0700 Subject: OMAP2/3: I2C: Errata ID i207: Clear wrong RDR interrupt Under certain rare conditions, I2C_STAT[13].RDR bit may be set and the corresponding interrupt fire, even there is no data in the receive FIFO, or the I2C data transfer is still ongoing. These spurious RDR events must be ignored by the software. This patch handles and ignores RDR spurious interrupts. The below sequence is required in interrupt handler for handling this errata: 1. If RDR is set to 1, clear RDR 2. Read I2C status register and check for BusBusy bit. If BusBusy bit is set, skip remaining steps. 3. If BusBusy bit is not set, perform read operation on I2C status register. 4. If RDR is set, clear the same. Check RDR again and clear if it sets RDR bit again. 5. Perform I2C Data Read operation N number of times(where N is value read from the register BUFSTAT-RXSTAT bit fields). Note: This errata is not applicable for omap2420 and omap4. It is applicable for: 1. omap2430 2. omap34xx(including omap3630). Signed-off-by: Manjunatha GK Cc: Hema Kalliguddi Cc: Nishanth Menon Cc: Aaro Koskinen Signed-off-by: Tony Lindgren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-omap.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 00fd02ec1b65..fdba13137daf 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -166,6 +166,8 @@ enum { #define SYSC_IDLEMODE_SMART 0x2 #define SYSC_CLOCKACTIVITY_FCLK 0x2 +/* Errata definitions */ +#define I2C_OMAP_ERRATA_I207 (1 << 0) struct omap_i2c_dev { struct device *dev; @@ -199,6 +201,7 @@ struct omap_i2c_dev { u16 bufstate; u16 syscstate; u16 westate; + u16 errata; }; const static u8 reg_map[] = { @@ -498,6 +501,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) /* Take the I2C module out of reset: */ omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); + dev->errata = 0; + + if (cpu_is_omap2430() || cpu_is_omap34xx()) + dev->errata |= I2C_OMAP_ERRATA_I207; + /* Enable interrupts */ dev->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY | OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK | @@ -695,6 +703,34 @@ omap_i2c_ack_stat(struct omap_i2c_dev *dev, u16 stat) omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat); } +static inline void i2c_omap_errata_i207(struct omap_i2c_dev *dev, u16 stat) +{ + /* + * I2C Errata(Errata Nos. OMAP2: 1.67, OMAP3: 1.8) + * Not applicable for OMAP4. + * Under certain rare conditions, RDR could be set again + * when the bus is busy, then ignore the interrupt and + * clear the interrupt. + */ + if (stat & OMAP_I2C_STAT_RDR) { + /* Step 1: If RDR is set, clear it */ + omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR); + + /* Step 2: */ + if (!(omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG) + & OMAP_I2C_STAT_BB)) { + + /* Step 3: */ + if (omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG) + & OMAP_I2C_STAT_RDR) { + omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR); + dev_dbg(dev->dev, "RDR when bus is busy.\n"); + } + + } + } +} + /* rev1 devices are apparently only on some 15xx */ #ifdef CONFIG_ARCH_OMAP15XX @@ -834,6 +870,10 @@ complete: } if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) { u8 num_bytes = 1; + + if (dev->errata & I2C_OMAP_ERRATA_I207) + i2c_omap_errata_i207(dev, stat); + if (dev->fifo_size) { if (stat & OMAP_I2C_STAT_RRDY) num_bytes = dev->fifo_size; -- cgit v1.2.3-70-g09d2 From 8a9d97d3a126fd33894e137f84ab47ec406df24f Mon Sep 17 00:00:00 2001 From: manjugk manjugk Date: Tue, 11 May 2010 11:35:23 -0700 Subject: OMAP3: I2C: Clean up Errata 1p153 handling Clean up existing Errata 1p153 handling to use generic errata handling mechanism through dev flag. Signed-off-by: Manjunatha GK Cc: Nishanth Menon Cc: Alexander Shishkin Signed-off-by: Tony Lindgren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-omap.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index fdba13137daf..7674efb55378 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -168,6 +168,7 @@ enum { /* Errata definitions */ #define I2C_OMAP_ERRATA_I207 (1 << 0) +#define I2C_OMAP3_1P153 (1 << 1) struct omap_i2c_dev { struct device *dev; @@ -954,7 +955,7 @@ complete: break; } - if ((dev->rev <= OMAP_I2C_REV_ON_3430) && + if ((dev->errata & I2C_OMAP3_1P153) && errata_omap3_1p153(dev, &stat, &err)) goto complete; @@ -1057,6 +1058,9 @@ omap_i2c_probe(struct platform_device *pdev) dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff; + if (dev->rev <= OMAP_I2C_REV_ON_3430) + dev->errata |= I2C_OMAP3_1P153; + if (!(cpu_class_is_omap1() || cpu_is_omap2420())) { u16 s; -- cgit v1.2.3-70-g09d2 From a1c27678c0e92ed4aa3ac489ef2f0d80651e18bb Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Tue, 27 Apr 2010 10:31:07 +0530 Subject: i2c-nomadik: release region when removed So that the module can be loaded again after an unload. Acked-by: Linus Walleij Acked-by: Srinidhi Kasagar Signed-off-by: Rabin Vincent Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-nomadik.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index a4f8d33fa389..170dbd70b934 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -914,6 +914,7 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev) static int __devexit nmk_i2c_remove(struct platform_device *pdev) { + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct nmk_i2c_dev *dev = platform_get_drvdata(pdev); i2c_del_adapter(&dev->adap); @@ -924,6 +925,8 @@ static int __devexit nmk_i2c_remove(struct platform_device *pdev) i2c_clr_bit(dev->virtbase + I2C_CR, I2C_CR_PE); free_irq(dev->irq, dev); iounmap(dev->virtbase); + if (res) + release_mem_region(res->start, resource_size(res)); clk_disable(dev->clk); clk_put(dev->clk); platform_set_drvdata(pdev, NULL); -- cgit v1.2.3-70-g09d2 From 1df3ab1b9128855400d657a515b87894f29f31f3 Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Tue, 27 Apr 2010 10:31:08 +0530 Subject: i2c-nomadik: fix operator precedence warning Fix this warning: i2c-nomadik.c:707: warning: suggest parentheses around operand of '!' or change '&' to '&&' or '!' to '~' Acked-by: Linus Walleij Acked-by: Srinidhi Kasagar Signed-off-by: Rabin Vincent Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-nomadik.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index 170dbd70b934..73de8ade10b1 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -704,7 +704,8 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg) case I2C_IT_MTD: case I2C_IT_MTDWS: if (dev->cli.operation == I2C_READ) { - while (!readl(dev->virtbase + I2C_RISR) & I2C_IT_RXFE) { + while (!(readl(dev->virtbase + I2C_RISR) + & I2C_IT_RXFE)) { if (dev->cli.count == 0) break; *dev->cli.buffer = -- cgit v1.2.3-70-g09d2 From 29412e69007c17d6866a50d0b65fb0d808824370 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Tue, 3 Nov 2009 12:43:23 +0100 Subject: i2c-pxa: remove unused macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit beea494 ([ARM] Remove EEPROM slave emulation from i2c-pxa driver.) removed all uses of eedbg, so the definition can go, too. Signed-off-by: Uwe Kleine-König Acked-by: Russell King Cc: Eric Miao Cc: Roel Kluin Acked-by: Pavel Machek Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-pxa.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index 14d249f5ed3f..8862640c37f7 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -217,8 +217,6 @@ static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname) #define decode_ICR(val) do { } while (0) #endif -#define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(KERN_DEBUG "" x); } } while(0) - static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret); static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id); -- cgit v1.2.3-70-g09d2 From 0d813d9960444470c4bebb73c2bde6697543fee9 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 3 Nov 2009 12:53:41 +0100 Subject: i2c-pxa: only define 'blue_murder'-function if DEBUG is #defined MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This talkative function is also called on timeouts. As timeouts can happen on regular writes to EEPROMs (no error case), this creates false positives. Giving lots of details is interesting only for developers anyhow, so just use the function if DEBUG is #defined. Signed-off-by: Wolfram Sang Signed-off-by: Uwe Kleine-König Cc: Russell King Acked-by: Eric Miao Cc: Roel Kluin Cc: Pavel Machek --- drivers/i2c/busses/i2c-pxa.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index 8862640c37f7..fbde6f614059 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -209,16 +209,6 @@ static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname) } #define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __func__) -#else -#define i2c_debug 0 - -#define show_state(i2c) do { } while (0) -#define decode_ISR(val) do { } while (0) -#define decode_ICR(val) do { } while (0) -#endif - -static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret); -static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id); static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why) { @@ -234,6 +224,20 @@ static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why) printk("\n"); } +#else /* ifdef DEBUG */ + +#define i2c_debug 0 + +#define show_state(i2c) do { } while (0) +#define decode_ISR(val) do { } while (0) +#define decode_ICR(val) do { } while (0) +#define i2c_pxa_scream_blue_murder(i2c, why) do { } while (0) + +#endif /* ifdef DEBUG / else */ + +static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret); +static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id); + static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c) { return !(readl(_ICR(i2c)) & ICR_SCLE); -- cgit v1.2.3-70-g09d2 From 0e53300818b08591516e5e528b33d70b83158d04 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 25 Jan 2010 10:20:34 +0100 Subject: MAINTAINERS: add i2c tree for embedded platforms MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Acked-by: Jean Delvare Signed-off-by: Wolfram Sang --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index a77ae73a5f6e..bd4ce71015c6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2736,6 +2736,7 @@ M: "Ben Dooks (embedded platforms)" L: linux-i2c@vger.kernel.org W: http://i2c.wiki.kernel.org/ T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/ +T: git git://git.fluff.org/bjdooks/linux.git S: Maintained F: Documentation/i2c/ F: drivers/i2c/ -- cgit v1.2.3-70-g09d2 From bf727e016f2a25d9f054317b2807e638706f1db6 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 4 Oct 2009 13:08:16 +0200 Subject: i2c-mpc: drop NO_IRQ Drop NO_IRQ as 0 is the preferred way to describe 'no irq' (http://lkml.org/lkml/2005/11/21/221). This change is safe, as the driver is only used on powerpc, where NO_IRQ is 0 anyhow. Signed-off-by: Wolfram Sang Acked-by: Grant Likely Cc: Ben Dooks --- drivers/i2c/busses/i2c-mpc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index f1321f763789..e86cef300c7d 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c @@ -118,7 +118,7 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing) u32 x; int result = 0; - if (i2c->irq == NO_IRQ) { + if (!i2c->irq) { while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) { schedule(); if (time_after(jiffies, orig_jiffies + timeout)) { @@ -568,7 +568,7 @@ static int __devinit fsl_i2c_probe(struct of_device *op, } i2c->irq = irq_of_parse_and_map(op->node, 0); - if (i2c->irq != NO_IRQ) { /* i2c->irq = NO_IRQ implies polling */ + if (i2c->irq) { /* no i2c->irq implies polling */ result = request_irq(i2c->irq, mpc_i2c_isr, IRQF_SHARED, "i2c-mpc", i2c); if (result < 0) { @@ -627,7 +627,7 @@ static int __devexit fsl_i2c_remove(struct of_device *op) i2c_del_adapter(&i2c->adap); dev_set_drvdata(&op->dev, NULL); - if (i2c->irq != NO_IRQ) + if (i2c->irq) free_irq(i2c->irq, i2c); irq_dispose_mapping(i2c->irq); -- cgit v1.2.3-70-g09d2 From b865a4e7ab3c6c8099fbe83ddf94c982d1d850ea Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 4 Oct 2009 13:08:16 +0200 Subject: i2c-cpm: drop NO_IRQ Drop NO_IRQ as 0 is the preferred way to describe 'no irq' (http://lkml.org/lkml/2005/11/21/221). This change is safe, as the driver is only used on powerpc, where NO_IRQ is 0 anyhow. Signed-off-by: Wolfram Sang Acked-by: Grant Likely Acked-by: Jochen Friedrich Cc: Ben Dooks --- drivers/i2c/busses/i2c-cpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c index 9c2e10082b79..16948db38973 100644 --- a/drivers/i2c/busses/i2c-cpm.c +++ b/drivers/i2c/busses/i2c-cpm.c @@ -441,7 +441,7 @@ static int __devinit cpm_i2c_setup(struct cpm_i2c *cpm) init_waitqueue_head(&cpm->i2c_wait); cpm->irq = of_irq_to_resource(ofdev->node, 0, NULL); - if (cpm->irq == NO_IRQ) + if (!cpm->irq) return -EINVAL; /* Install interrupt handler. */ -- cgit v1.2.3-70-g09d2 From f0ec9e20bab214f4a26e6fdaaf5c2a6b2f2640d7 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 4 Oct 2009 13:08:16 +0200 Subject: i2c-ibm-iic: drop NO_IRQ Drop NO_IRQ as 0 is the preferred way to describe 'no irq' (http://lkml.org/lkml/2005/11/21/221). This change is safe, as the driver is only used on powerpc, where NO_IRQ is 0 anyhow. Signed-off-by: Wolfram Sang Acked-by: Grant Likely Acked-by: Sean MacLennan Cc: Ben Dooks --- drivers/i2c/busses/i2c-ibm_iic.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c index b1bc6e277d2a..2bef534cbff1 100644 --- a/drivers/i2c/busses/i2c-ibm_iic.c +++ b/drivers/i2c/busses/i2c-ibm_iic.c @@ -668,12 +668,12 @@ static int __devinit iic_request_irq(struct of_device *ofdev, int irq; if (iic_force_poll) - return NO_IRQ; + return 0; irq = irq_of_parse_and_map(np, 0); - if (irq == NO_IRQ) { + if (!irq) { dev_err(&ofdev->dev, "irq_of_parse_and_map failed\n"); - return NO_IRQ; + return 0; } /* Disable interrupts until we finish initialization, assumes @@ -683,7 +683,7 @@ static int __devinit iic_request_irq(struct of_device *ofdev, if (request_irq(irq, iic_handler, 0, "IBM IIC", dev)) { dev_err(&ofdev->dev, "request_irq %d failed\n", irq); /* Fallback to the polling mode */ - return NO_IRQ; + return 0; } return irq; @@ -719,7 +719,7 @@ static int __devinit iic_probe(struct of_device *ofdev, init_waitqueue_head(&dev->wq); dev->irq = iic_request_irq(ofdev, dev); - if (dev->irq == NO_IRQ) + if (!dev->irq) dev_warn(&ofdev->dev, "using polling mode\n"); /* Board specific settings */ @@ -766,7 +766,7 @@ static int __devinit iic_probe(struct of_device *ofdev, return 0; error_cleanup: - if (dev->irq != NO_IRQ) { + if (dev->irq) { iic_interrupt_mode(dev, 0); free_irq(dev->irq, dev); } @@ -790,7 +790,7 @@ static int __devexit iic_remove(struct of_device *ofdev) i2c_del_adapter(&dev->adap); - if (dev->irq != NO_IRQ) { + if (dev->irq) { iic_interrupt_mode(dev, 0); free_irq(dev->irq, dev); } -- cgit v1.2.3-70-g09d2 From b5c80bc5d70a1ce5b071ed06dd95292b9de46f95 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 2 Feb 2010 13:03:31 +0100 Subject: i2c-highlander: remover superflous variable When cppcheck found this flaw [./i2c/busses/i2c-highlander.c:284]: (style) Warning - using char variable in bit operation it was noted that the 'read'-variable could be simply removed as read_write can only be 0 or 1 anyhow. So, we remove the flaw and simplify the code. Reported-by: d binderman Signed-off-by: Wolfram Sang Acked-by: Paul Mundt Acked-by: Jean Delvare Cc: Ben Dooks --- drivers/i2c/busses/i2c-highlander.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c index ce87a902c94d..3df1bc80f37a 100644 --- a/drivers/i2c/busses/i2c-highlander.c +++ b/drivers/i2c/busses/i2c-highlander.c @@ -282,7 +282,6 @@ static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, union i2c_smbus_data *data) { struct highlander_i2c_dev *dev = i2c_get_adapdata(adap); - int read = read_write & I2C_SMBUS_READ; u16 tmp; init_completion(&dev->cmd_complete); @@ -337,11 +336,11 @@ static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, highlander_i2c_done(dev); /* Set slave address */ - iowrite16((addr << 1) | read, dev->base + SMSMADR); + iowrite16((addr << 1) | read_write, dev->base + SMSMADR); highlander_i2c_command(dev, command, dev->buf_len); - if (read) + if (read_write == I2C_SMBUS_READ) return highlander_i2c_read(dev); else return highlander_i2c_write(dev); -- cgit v1.2.3-70-g09d2