From 67673dce9a9c765f38ba103b11e948488342f230 Mon Sep 17 00:00:00 2001 From: Antoine Ténart Date: Fri, 2 Oct 2015 16:59:46 +0200 Subject: pwm: Add Berlin PWM controller DT binding Add DT binding documentation for the Berlin PWM controller. Signed-off-by: Antoine Tenart Acked-by: Sebastian Hesselbarth Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/pwm-berlin.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-berlin.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/pwm-berlin.txt b/Documentation/devicetree/bindings/pwm/pwm-berlin.txt new file mode 100644 index 000000000000..82cbe16fcbbc --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-berlin.txt @@ -0,0 +1,17 @@ +Berlin PWM controller + +Required properties: +- compatible: should be "marvell,berlin-pwm" +- reg: physical base address and length of the controller's registers +- clocks: phandle to the input clock +- #pwm-cells: should be 3. See pwm.txt in this directory for a description of + the cells format. + +Example: + +pwm: pwm@f7f20000 { + compatible = "marvell,berlin-pwm"; + reg = <0xf7f20000 0x40>; + clocks = <&chip_clk CLKID_CFG>; + #pwm-cells = <3>; +} -- cgit v1.2.3-70-g09d2 From 7260d25145a1485767efc5d4341405bcb5703eab Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 30 Sep 2015 17:47:52 +0900 Subject: pwm: Add device tree binding document for R-Car PWM Timer Add binding document for Renesas PWM Timer on R-Car SoCs. Signed-off-by: Yoshihiro Shimoda Acked-by: Geert Uytterhoeven Reviewed-by: Simon Horman Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/renesas,pwm-rcar.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt new file mode 100644 index 000000000000..ea0a27b7f8e6 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt @@ -0,0 +1,27 @@ +* Renesas R-Car PWM Timer Controller + +Required Properties: +- compatible: should be one of the following. + - "renesas,pwm-rcar": for generic R-Car compatible PWM Timer + - "renesas,pwm-r8a7778": for R-Car M1A + - "renesas,pwm-r8a7779": for R-Car H1 + - "renesas,pwm-r8a7790": for R-Car H2 + - "renesas,pwm-r8a7791": for R-Car M2-W + - "renesas,pwm-r8a7794": for R-Car E2 +- reg: base address and length of the registers block for the PWM. +- #pwm-cells: should be 2. See pwm.txt in this directory for a description of + the cells format. +- clocks: clock phandle and specifier pair. +- pinctrl-0: phandle, referring to a default pin configuration node. +- pinctrl-names: Set to "default". + +Example: R8A7790 (R-Car H2) PWM Timer node + + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; + reg = <0 0xe6e30000 0 0x8>; + #pwm-cells = <2>; + clocks = <&mstp5_clks R8A7790_CLK_PWM>; + pinctrl-0 = <&pwm0_pins>; + pinctrl-names = "default"; + }; -- cgit v1.2.3-70-g09d2 From 9495525e51e6f54fda4fbb7ef19eed4d131f18b2 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Mon, 14 Sep 2015 16:47:05 -0700 Subject: Documentation: dt: add Broadcom BCM7038 PWM controller binding Add a binding documentation for the Broadcom BCM7038 PWM controller found in BCM7xxx chips. Signed-off-by: Florian Fainelli Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/brcm,bcm7038-pwm.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt b/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt new file mode 100644 index 000000000000..d9254a6da5ed --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt @@ -0,0 +1,20 @@ +Broadcom BCM7038 PWM controller (BCM7xxx Set Top Box PWM controller) + +Required properties: + +- compatible: must be "brcm,bcm7038-pwm" +- reg: physical base address and length for this controller +- #pwm-cells: should be 2. See pwm.txt in this directory for a description + of the cells format +- clocks: a phandle to the reference clock for this block which is fed through + its internal variable clock frequency generator + + +Example: + + pwm: pwm@f0408000 { + compatible = "brcm,bcm7038-pwm"; + reg = <0xf0408000 0x28>; + #pwm-cells = <2>; + clocks = <&upg_fixed>; + }; -- cgit v1.2.3-70-g09d2 From 3e9e6c28d287a4a2dc62f61cf67654bdae374992 Mon Sep 17 00:00:00 2001 From: YH Huang Date: Tue, 18 Aug 2015 15:27:53 +0800 Subject: dt-bindings: pwm: Add MediaTek display PWM bindings Document the device-tree binding of MediaTek display PWM. The PWM has one channel to control the backlight brightness for display. Both the MT8173 and MT6595 are supported. Signed-off-by: YH Huang Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/pwm-mtk-disp.txt | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt new file mode 100644 index 000000000000..f8f59baf6b67 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt @@ -0,0 +1,42 @@ +MediaTek display PWM controller + +Required properties: + - compatible: should be "mediatek,-disp-pwm": + - "mediatek,mt8173-disp-pwm": found on mt8173 SoC. + - "mediatek,mt6595-disp-pwm": found on mt6595 SoC. + - reg: physical base address and length of the controller's registers. + - #pwm-cells: must be 2. See pwm.txt in this directory for a description of + the cell format. + - clocks: phandle and clock specifier of the PWM reference clock. + - clock-names: must contain the following: + - "main": clock used to generate PWM signals. + - "mm": sync signals from the modules of mmsys. + - pinctrl-names: Must contain a "default" entry. + - pinctrl-0: One property must exist for each entry in pinctrl-names. + See pinctrl/pinctrl-bindings.txt for details of the property values. + +Example: + pwm0: pwm@1401e000 { + compatible = "mediatek,mt8173-disp-pwm", + "mediatek,mt6595-disp-pwm"; + reg = <0 0x1401e000 0 0x1000>; + #pwm-cells = <2>; + clocks = <&mmsys CLK_MM_DISP_PWM026M>, + <&mmsys CLK_MM_DISP_PWM0MM>; + clock-names = "main", "mm"; + pinctrl-names = "default"; + pinctrl-0 = <&disp_pwm0_pins>; + }; + + backlight_lcd: backlight_lcd { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 1000000>; + brightness-levels = < + 0 16 32 48 64 80 96 112 + 128 144 160 176 192 208 224 240 + 255 + >; + default-brightness-level = <9>; + power-supply = <&mt6397_vio18_reg>; + enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; + }; -- cgit v1.2.3-70-g09d2 From f6649f7ad8efbaf82679ab0ccdfe837a65bd58d8 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 11 Oct 2015 11:49:57 +0200 Subject: pwm: sun4i: Add support for PWM controller on sun5i SoCs The PWM controller on sun5i SoCs is identical to the one found on sun7i SoCs. On the A13 package only one of the 2 pins is routed to the outside, so only advertise one PWM channel there. Signed-off-by: Hans de Goede Acked-by: Maxime Ripard Signed-off-by: Thierry Reding --- .../devicetree/bindings/pwm/pwm-sun4i.txt | 2 ++ drivers/pwm/pwm-sun4i.c | 25 ++++++++++++++++++++-- 2 files changed, 25 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt index ae0273e19506..cf6068b8e974 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt @@ -3,6 +3,8 @@ Allwinner sun4i and sun7i SoC PWM controller Required properties: - compatible: should be one of: - "allwinner,sun4i-a10-pwm" + - "allwinner,sun5i-a10s-pwm" + - "allwinner,sun5i-a13-pwm" - "allwinner,sun7i-a20-pwm" - reg: physical base address and length of the controller's registers - #pwm-cells: should be 3. See pwm.txt in this directory for a description of diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index cd9dde563018..b093cc55f799 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -68,6 +68,7 @@ static const u32 prescaler_table[] = { struct sun4i_pwm_data { bool has_prescaler_bypass; bool has_rdy; + unsigned int npwm; }; struct sun4i_pwm_chip { @@ -262,17 +263,37 @@ static const struct pwm_ops sun4i_pwm_ops = { static const struct sun4i_pwm_data sun4i_pwm_data_a10 = { .has_prescaler_bypass = false, .has_rdy = false, + .npwm = 2, +}; + +static const struct sun4i_pwm_data sun4i_pwm_data_a10s = { + .has_prescaler_bypass = true, + .has_rdy = true, + .npwm = 2, +}; + +static const struct sun4i_pwm_data sun4i_pwm_data_a13 = { + .has_prescaler_bypass = true, + .has_rdy = true, + .npwm = 1, }; static const struct sun4i_pwm_data sun4i_pwm_data_a20 = { .has_prescaler_bypass = true, .has_rdy = true, + .npwm = 2, }; static const struct of_device_id sun4i_pwm_dt_ids[] = { { .compatible = "allwinner,sun4i-a10-pwm", .data = &sun4i_pwm_data_a10, + }, { + .compatible = "allwinner,sun5i-a10s-pwm", + .data = &sun4i_pwm_data_a10s, + }, { + .compatible = "allwinner,sun5i-a13-pwm", + .data = &sun4i_pwm_data_a13, }, { .compatible = "allwinner,sun7i-a20-pwm", .data = &sun4i_pwm_data_a20, @@ -305,14 +326,14 @@ static int sun4i_pwm_probe(struct platform_device *pdev) if (IS_ERR(pwm->clk)) return PTR_ERR(pwm->clk); + pwm->data = match->data; pwm->chip.dev = &pdev->dev; pwm->chip.ops = &sun4i_pwm_ops; pwm->chip.base = -1; - pwm->chip.npwm = 2; + pwm->chip.npwm = pwm->data->npwm; pwm->chip.can_sleep = true; pwm->chip.of_xlate = of_pwm_xlate_with_flags; pwm->chip.of_pwm_n_cells = 3; - pwm->data = match->data; spin_lock_init(&pwm->ctrl_lock); -- cgit v1.2.3-70-g09d2 From cdc137089a752d496880526dad2569eaa6ba092d Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 6 Oct 2015 20:28:28 +0900 Subject: pwm: pwm-rcar: Revise the device tree binding document about compatible The compatible should be "renesas,pwm-rcar", and one the the SoC specific string. So, this patch revises the documentation. Reported-by: Rob Herring Signed-off-by: Yoshihiro Shimoda Acked-by: Rob Herring Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt index ea0a27b7f8e6..0822a083fc57 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt @@ -1,8 +1,7 @@ * Renesas R-Car PWM Timer Controller Required Properties: -- compatible: should be one of the following. - - "renesas,pwm-rcar": for generic R-Car compatible PWM Timer +- compatible: should be "renesas,pwm-rcar" and one of the following. - "renesas,pwm-r8a7778": for R-Car M1A - "renesas,pwm-r8a7779": for R-Car H1 - "renesas,pwm-r8a7790": for R-Car H2 -- cgit v1.2.3-70-g09d2