From cc971f091f23b42453bb7a2e184bbf02f747d7eb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Jun 2024 21:51:08 +0200 Subject: ARM: dts: stm32: Add IWDG2 EXTI interrupt mapping and mark as wakeup source The IWDG2 is capable of generating pre-timeout interrupt, which can be used to wake the system up from suspend to mem. Add the EXTI interrupt mapping and mark the IWDG2 as wake up source. Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp151.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index 4f878ec102c1..b28dc90926bd 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -355,6 +355,8 @@ reg = <0x5a002000 0x400>; clocks = <&rcc IWDG2>, <&rcc CK_LSI>; clock-names = "pclk", "lsi"; + interrupts-extended = <&exti 46 IRQ_TYPE_LEVEL_HIGH>; + wakeup-source; status = "disabled"; }; -- cgit v1.2.3-70-g09d2 From 3f2e7d167307527f49bf4a03d99bd4d3867f7adb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 17 Oct 2024 21:09:18 +0200 Subject: ARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT The STM32MP13xx DHCOR SoM is populated with M24256E EEPROM which has Additional Write lockable page at separate I2C address. Describe the page in DT to make it available. Note that the WLP page on this device is hardware write-protected by R37 which pulls the nWC signal high to VDD_3V3_1V8 power rail. Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi index ddad6497775b..5edbc790d1d2 100644 --- a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi @@ -201,6 +201,12 @@ pagesize = <64>; }; + eeprom0wl: eeprom@58 { + compatible = "st,24256e-wl"; /* ST M24256E WL page of 0x50 */ + pagesize = <64>; + reg = <0x58>; + }; + rv3032: rtc@51 { compatible = "microcrystal,rv3032"; reg = <0x51>; -- cgit v1.2.3-70-g09d2 From d6b0d7a941c4fc9241d9cca66db5d8ff9d81cc8b Mon Sep 17 00:00:00 2001 From: Valentin Caron Date: Tue, 27 Aug 2024 16:04:47 +0200 Subject: ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp15 Declare pin for LSCO in stm32-pinctrl provider node to reserve this pin for RTC OUT2_RMP, in stm32mp15-pinctrl.dtsi. Signed-off-by: Valentin Caron Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 70e132dc6147..95fafc51a1c8 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -1696,6 +1696,13 @@ }; }; + /omit-if-no-ref/ + rtc_rsvd_pins_a: rtc-rsvd-0 { + pins { + pinmux = ; /* RTC_OUT2_RMP */ + }; + }; + /omit-if-no-ref/ sai2a_pins_a: sai2a-0 { pins { -- cgit v1.2.3-70-g09d2 From 92483a156238078562d187f527de6b358cb53a08 Mon Sep 17 00:00:00 2001 From: Valentin Caron Date: Tue, 27 Aug 2024 16:04:48 +0200 Subject: ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp13 Declare pin for LSCO in stm32-pinctrl provider node to reserve this pin for RTC OUT2_RMP, in stm32mp13-pinctrl.dtsi. Signed-off-by: Valentin Caron Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index 8db1ec4a3b26..a422b32d71d1 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -594,6 +594,13 @@ }; }; + /omit-if-no-ref/ + rtc_rsvd_pins_a: rtc-rsvd-0 { + pins { + pinmux = ; /* RTC_OUT2_RMP */ + }; + }; + /omit-if-no-ref/ sai1a_pins_a: sai1a-0 { pins { -- cgit v1.2.3-70-g09d2 From b7c6e8c286f17d84165752d8864a57af1dfc4b5b Mon Sep 17 00:00:00 2001 From: Valentin Caron Date: Tue, 27 Aug 2024 16:04:49 +0200 Subject: ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on stm32mp157c-dk2 On stm32mp157c-dk2 board, WLAN/BT module LPO_IN pin is wired to RTC OUT2_RMP pin. Provide a pinctrl configuration to enable LSCO on OUT2_RMP. Signed-off-by: Valentin Caron Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp157c-dk2.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts index 7a701f7ef0c7..8ac1233f9a02 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts @@ -84,6 +84,16 @@ }; }; +&rtc { + pinctrl-names = "default"; + pinctrl-0 = <&rtc_rsvd_pins_a>; + + rtc_lsco_pins_a: rtc-lsco-0 { + pins = "out2_rmp"; + function = "lsco"; + }; +}; + &usart2 { pinctrl-names = "default", "sleep", "idle"; pinctrl-0 = <&usart2_pins_c>; -- cgit v1.2.3-70-g09d2 From d6e424f926397e682fc44a952d5b3a1e34b2cd73 Mon Sep 17 00:00:00 2001 From: Valentin Caron Date: Tue, 27 Aug 2024 16:04:50 +0200 Subject: ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on stm32mp135f-dk On stm32mp135f-dk board, WLAN/BT module LPO_IN pin is wired to RTC OUT2_RMP pin. Provide a pinctrl configuration to enable LSCO on OUT2_RMP. Signed-off-by: Valentin Caron Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index 1af335a39993..ef33cbf3e601 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -346,7 +346,14 @@ }; &rtc { + pinctrl-names = "default"; + pinctrl-0 = <&rtc_rsvd_pins_a>; status = "okay"; + + rtc_lsco_pins_a: rtc-lsco-0 { + pins = "out2_rmp"; + function = "lsco"; + }; }; &scmi_regu { -- cgit v1.2.3-70-g09d2 From 6f37c7365cb3d972abdd3abd3fba144cc7e9d8dc Mon Sep 17 00:00:00 2001 From: Christophe Roullier Date: Tue, 27 Aug 2024 16:04:51 +0200 Subject: ARM: dts: stm32: add support of WLAN/BT on stm32mp157c-dk2 Add support of WLAN/BT Murata Type 1DX module: - usart2 is used for Bluetooth interface - sdmmc2 is used for WLAN (sdio) interface Signed-off-by: Christophe Roullier Signed-off-by: Valentin Caron Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp157c-dk2.dts | 41 +++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts index 8ac1233f9a02..5f9c0160a9c4 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts @@ -24,6 +24,11 @@ chosen { stdout-path = "serial0:115200n8"; }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>; + }; }; &cryp1 { @@ -94,10 +99,44 @@ }; }; +/* Wifi */ +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; + non-removable; + cap-sdio-irq; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_lsco_pins_a>; + }; +}; + +/* Bluetooth */ &usart2 { pinctrl-names = "default", "sleep", "idle"; pinctrl-0 = <&usart2_pins_c>; pinctrl-1 = <&usart2_sleep_pins_c>; pinctrl-2 = <&usart2_idle_pins_c>; - status = "disabled"; + uart-has-rtscts; + status = "okay"; + + bluetooth { + shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + vbat-supply = <&v3v3>; + vddio-supply = <&v3v3>; + }; }; -- cgit v1.2.3-70-g09d2 From 6b44fdef4c7ad112e17d7cbd64d7d522a426d6e4 Mon Sep 17 00:00:00 2001 From: Christophe Roullier Date: Tue, 27 Aug 2024 16:04:52 +0200 Subject: ARM: dts: stm32: add support of WLAN/BT on stm32mp135f-dk Add support of WLAN/BT Murata Type 1DX module: - usart2 is used for Bluetooth interface - sdmmc2 is used for WLAN (sdio) interface Signed-off-by: Christophe Roullier Signed-off-by: Valentin Caron Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 45 +++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index ef33cbf3e601..3a276589fef7 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -121,6 +121,19 @@ }; }; }; + + v3v3_ao: v3v3-ao { + compatible = "regulator-fixed"; + regulator-name = "v3v3_ao"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&mcp23017 11 GPIO_ACTIVE_LOW>; + }; }; &adc_1 { @@ -392,6 +405,30 @@ status = "okay"; }; +/* Wifi */ +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_clk_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_clk_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; + non-removable; + cap-sdio-irq; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3_ao>; + mmc-pwrseq = <&wifi_pwrseq>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_lsco_pins_a>; + }; +}; + &spi5 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi5_pins_a>; @@ -498,6 +535,14 @@ pinctrl-2 = <&usart2_idle_pins_a>; uart-has-rtscts; status = "okay"; + + bluetooth { + shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>; + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + vbat-supply = <&v3v3_ao>; + vddio-supply = <&v3v3_ao>; + }; }; &usbh_ehci { -- cgit v1.2.3-70-g09d2