From 2fa0f93915eacf758da800e2c67b3b9adef1c5c5 Mon Sep 17 00:00:00 2001 From: Simon Guinot Date: Thu, 21 Oct 2010 11:42:28 +0200 Subject: [ARM] Kirkwood: enhance TCLK detection According to the Marvell LSP, the Sample at Reset regiter bit 21 can be used to detect TCLK on 6281 and 6282 devices. This patch has only been tested on LaCie boards. Signed-off-by: Simon Guinot Acked-by: Lennert Buytenhek Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/common.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 1c82d4290dad..ee99a5acc89d 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -854,10 +854,9 @@ int __init kirkwood_find_tclk(void) kirkwood_pcie_id(&dev, &rev); - if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 || - rev == MV88F6281_REV_A1)) || - (dev == MV88F6282_DEV_ID)) - return 200000000; + if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID) + if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0) + return 200000000; return 166666667; } -- cgit v1.2.3-70-g09d2 From d3491820e8a65c4a51c8e2a165c6a13f864101ba Mon Sep 17 00:00:00 2001 From: Simon Guinot Date: Thu, 21 Oct 2010 11:42:29 +0200 Subject: [ARM] Kirkwood: fix timer initialization for LaCie boards Signed-off-by: Simon Guinot Acked-by: Lennert Buytenhek Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/d2net_v2-setup.c | 2 +- arch/arm/mach-kirkwood/lacie_v2-common.c | 14 -------------- arch/arm/mach-kirkwood/lacie_v2-common.h | 2 -- arch/arm/mach-kirkwood/netspace_v2-setup.c | 6 +++--- arch/arm/mach-kirkwood/netxbig_v2-setup.c | 4 ++-- 5 files changed, 6 insertions(+), 22 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c index cd62d0f82a73..b8078aeebef9 100644 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c @@ -227,5 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2") .init_machine = d2net_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c index d3ea1b6c8a02..285edab776e9 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.c +++ b/arch/arm/mach-kirkwood/lacie_v2-common.c @@ -111,17 +111,3 @@ void __init lacie_v2_hdd_power_init(int hdd_num) pr_err("Failed to power up HDD%d\n", i + 1); } } - -/***************************************************************************** - * Timer - ****************************************************************************/ - -static void lacie_v2_timer_init(void) -{ - kirkwood_tclk = 166666667; - orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); -} - -struct sys_timer lacie_v2_timer = { - .init = lacie_v2_timer_init, -}; diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.h b/arch/arm/mach-kirkwood/lacie_v2-common.h index af521315b87b..fc64f578536e 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.h +++ b/arch/arm/mach-kirkwood/lacie_v2-common.h @@ -13,6 +13,4 @@ void lacie_v2_register_flash(void); void lacie_v2_register_i2c_devices(void); void lacie_v2_hdd_power_init(int hdd_num); -extern struct sys_timer lacie_v2_timer; - #endif diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c index fed264d28f4a..fc934e5a9ed0 100644 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c @@ -221,7 +221,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -233,7 +233,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -245,6 +245,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c index d970e1eee37d..a855c9f08291 100644 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c @@ -405,7 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -417,6 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif -- cgit v1.2.3-70-g09d2 From 3924996bab2845bdf9a9d16ff7c20445de1ab55d Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 21 Oct 2010 15:48:33 -0400 Subject: [ARM] Kirkwood: restrict the scope of the PCIe reset workaround Commit 21f0ba90a447 "orion/kirkwood: reset PCIe unit on boot" made the reset of the PCIe unit unconditional. While this may fix problems on some targets, this also causes problems on other targets. Saeed Bishara said about the original problem: "We couln't pinpoint the root cause of this issue, actually we failed to reproduce that issue." So let's restrict the reset of the PCIe unit only to the target where the original problem was observed. Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/ts41x-setup.c | 14 +++++++++++++- arch/arm/plat-orion/include/plat/pcie.h | 3 +++ arch/arm/plat-orion/pcie.c | 5 ----- 3 files changed, 16 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index 2e14afef07a2..6995199a9127 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -27,6 +27,10 @@ #include "mpp.h" #include "tsx1x-common.h" +/* for the PCIe reset workaround */ +#include + + #define QNAP_TS41X_JUMPER_JP1 45 static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { @@ -140,8 +144,16 @@ static void __init qnap_ts41x_init(void) static int __init ts41x_pci_init(void) { - if (machine_is_ts41x()) + if (machine_is_ts41x()) { + /* + * Without this explicit reset, the PCIe SATA controller + * (Marvell 88sx7042/sata_mv) is known to stop working + * after a few minutes. + */ + orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE); + kirkwood_pcie_init(KW_PCIE0); + } return 0; } diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h index 3ebfef72b4e7..cc99163e73fd 100644 --- a/arch/arm/plat-orion/include/plat/pcie.h +++ b/arch/arm/plat-orion/include/plat/pcie.h @@ -11,12 +11,15 @@ #ifndef __PLAT_PCIE_H #define __PLAT_PCIE_H +struct pci_bus; + u32 orion_pcie_dev_id(void __iomem *base); u32 orion_pcie_rev(void __iomem *base); int orion_pcie_link_up(void __iomem *base); int orion_pcie_x4_mode(void __iomem *base); int orion_pcie_get_local_bus_nr(void __iomem *base); void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_reset(void __iomem *base); void orion_pcie_setup(void __iomem *base, struct mbus_dram_target_info *dram); int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index 779553a1595e..af2d733c50b5 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -181,11 +181,6 @@ void __init orion_pcie_setup(void __iomem *base, u16 cmd; u32 mask; - /* - * soft reset PCIe unit - */ - orion_pcie_reset(base); - /* * Point PCIe unit MBUS decode windows to DRAM space. */ -- cgit v1.2.3-70-g09d2 From a2d771c036eb8c040683089ca04c36dfb93a0e60 Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Fri, 29 Oct 2010 16:56:19 +0100 Subject: xen: correct size of level2_kernel_pgt sizeof(pmd_t *) is 4 bytes on 32-bit PAE leading to an allocation of only 2048 bytes. The correct size is sizeof(pmd_t) giving us a full page allocation. Signed-off-by: Ian Campbell Cc: Jeremy Fitzhardinge Signed-off-by: Jeremy Fitzhardinge --- arch/x86/xen/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index c237b810b03f..21ed8d7f75a5 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c @@ -2126,7 +2126,7 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, { pmd_t *kernel_pmd; - level2_kernel_pgt = extend_brk(sizeof(pmd_t *) * PTRS_PER_PMD, PAGE_SIZE); + level2_kernel_pgt = extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + xen_start_info->nr_pt_frames * PAGE_SIZE + -- cgit v1.2.3-70-g09d2 From cf38d0ba7efdc476815768b2b999b27cfae69747 Mon Sep 17 00:00:00 2001 From: Rakib Mullick Date: Mon, 1 Nov 2010 12:53:50 +0600 Subject: x86, mm: Fix section mismatch in tlb.c Mark tlb_cpuhp_notify as __cpuinit. It's basically a callback function, which is called from __cpuinit init_smp_flash(). So - it's safe. We were warned by the following warning: WARNING: arch/x86/mm/built-in.o(.text+0x356d): Section mismatch in reference from the function tlb_cpuhp_notify() to the function .cpuinit.text:calculate_tlb_offset() The function tlb_cpuhp_notify() references the function __cpuinit calculate_tlb_offset(). This is often because tlb_cpuhp_notify lacks a __cpuinit annotation or the annotation of calculate_tlb_offset is wrong. Signed-off-by: Rakib Mullick Cc: Borislav Petkov Cc: Shaohua Li LKML-Reference: Signed-off-by: Ingo Molnar --- arch/x86/mm/tlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index 49358481c733..12cdbb17ad18 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -251,7 +251,7 @@ static void __cpuinit calculate_tlb_offset(void) } } -static int tlb_cpuhp_notify(struct notifier_block *n, +static int __cpuinit tlb_cpuhp_notify(struct notifier_block *n, unsigned long action, void *hcpu) { switch (action & 0xf) { -- cgit v1.2.3-70-g09d2 From 3073f0fa2b50808f0a506370e494456d4aa73718 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Fri, 29 Oct 2010 11:32:56 +0800 Subject: ARM: mmp: fix cpuid detection on mmp2 Fix typo error on cpu_is_mmp2(). Correct cpu_readid_id() to read_cpuid_id(). Append missing parenthesis. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- arch/arm/mach-mmp/include/mach/cputype.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h index f43a68b213f1..8a3b56dfd35d 100644 --- a/arch/arm/mach-mmp/include/mach/cputype.h +++ b/arch/arm/mach-mmp/include/mach/cputype.h @@ -46,7 +46,8 @@ static inline int cpu_is_pxa910(void) #ifdef CONFIG_CPU_MMP2 static inline int cpu_is_mmp2(void) { - return (((cpu_readid_id() >> 8) & 0xff) == 0x58); + return (((read_cpuid_id() >> 8) & 0xff) == 0x58); +} #else #define cpu_is_mmp2() (0) #endif -- cgit v1.2.3-70-g09d2 From 12cdcc8523f15051a5a4001de906bcf61acf6c36 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 2 Nov 2010 04:53:59 +0800 Subject: ARM: pxa: fix the missing definition of IRQ_BOARD_END Signed-off-by: Eric Miao Cc: Haojian Zhuang Cc: Mike Rapoport --- arch/arm/include/asm/hardware/it8152.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h index 6700c7fc7ebd..21fa272301f8 100644 --- a/arch/arm/include/asm/hardware/it8152.h +++ b/arch/arm/include/asm/hardware/it8152.h @@ -75,7 +75,7 @@ extern unsigned long it8152_base_address; IT8152_PD_IRQ(1) USB (USBR) IT8152_PD_IRQ(0) Audio controller (ACR) */ -#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) +#define IT8152_IRQ(x) (IRQ_BOARD_START + (x)) /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ #define IT8152_LD_IRQ_COUNT 9 -- cgit v1.2.3-70-g09d2 From 51e930ae44cb905ba1616add2e3c7f33f0bbbc0e Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Sun, 26 Sep 2010 14:37:49 +0200 Subject: ARM: pxa/cm-x2xx: remove duplicate call to pxa27x_init_irq Signed-off-by: Mike Rapoport Signed-off-by: Eric Miao --- arch/arm/mach-pxa/cm-x2xx.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index ac5598ce9724..d34b99febeb9 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -476,8 +476,6 @@ static void __init cmx2xx_init(void) static void __init cmx2xx_init_irq(void) { - pxa27x_init_irq(); - if (cpu_is_pxa25x()) { pxa25x_init_irq(); cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); -- cgit v1.2.3-70-g09d2 From 72feb6e7cb55e7947653446e52e54d66134ac1b5 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 2 Nov 2010 21:17:46 +0800 Subject: ARM: pxa/saar: fix the building failure caused by typo Signed-off-by: Eric Miao Cc: Haojian Zhuang --- arch/arm/mach-pxa/saar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 4b521e045d75..ffa50e633ee6 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -116,7 +116,7 @@ static struct platform_device smc91x_device = { }, }; -#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE) +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) static uint16_t lcd_power_on[] = { /* single frame */ SMART_CMD_NOOP, -- cgit v1.2.3-70-g09d2 From 377304abefa208890dce5739e4f297c93240efb2 Mon Sep 17 00:00:00 2001 From: Michael Spang Date: Fri, 5 Nov 2010 13:14:40 -0400 Subject: [ARM] TS-78xxx NAND resource type should be IORESOURCE_MEM The type was IORESOURCE_IO which is not what is expected by plat_nand_probe(). This device has not worked since 2d098a72 ("mtd: plat_nand: request memory resource before doing ioremap"). Signed-off-by: Michael Spang Signed-off-by: Nicolas Pitre --- arch/arm/mach-orion5x/ts78xx-setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 696b1a97f9e2..9a5d1ef1bd1f 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -239,7 +239,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = { static struct resource ts78xx_ts_nand_resources = { .start = TS_NAND_DATA, .end = TS_NAND_DATA + 4, - .flags = IORESOURCE_IO, + .flags = IORESOURCE_MEM, }; static struct platform_device ts78xx_ts_nand_device = { -- cgit v1.2.3-70-g09d2 From 7350f419724fd9472d3b5cc521538713f9797b62 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Wed, 3 Nov 2010 17:22:00 +0200 Subject: ARM: orion5x/kirkwood/mv78xx0: fix MPP configuration corner cases Wrong MPP configuration would cause _mpp_conf loop infinitely because the mpp list iterator would not be incremented. Signed-off-by: Mike Rapoport Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/mpp.c | 4 +--- arch/arm/mach-mv78xx0/mpp.c | 4 +--- arch/arm/mach-orion5x/mpp.c | 4 +--- 3 files changed, 3 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index 065187d177c6..27901f702feb 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c @@ -59,7 +59,7 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list) } printk("\n"); - while (*mpp_list) { + for ( ; *mpp_list; mpp_list++) { unsigned int num = MPP_NUM(*mpp_list); unsigned int sel = MPP_SEL(*mpp_list); int shift, gpio_mode; @@ -88,8 +88,6 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list) if (sel != 0) gpio_mode = 0; orion_gpio_set_valid(num, gpio_mode); - - mpp_list++; } printk(KERN_DEBUG " final MPP regs:"); diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c index 354ac514eb89..84db2dfc475c 100644 --- a/arch/arm/mach-mv78xx0/mpp.c +++ b/arch/arm/mach-mv78xx0/mpp.c @@ -54,7 +54,7 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list) } printk("\n"); - while (*mpp_list) { + for ( ; *mpp_list; mpp_list++) { unsigned int num = MPP_NUM(*mpp_list); unsigned int sel = MPP_SEL(*mpp_list); int shift, gpio_mode; @@ -83,8 +83,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list) if (sel != 0) gpio_mode = 0; orion_gpio_set_valid(num, gpio_mode); - - mpp_list++; } printk(KERN_DEBUG " final MPP regs:"); diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c index bc4c3b9aaf83..db485d3b8144 100644 --- a/arch/arm/mach-orion5x/mpp.c +++ b/arch/arm/mach-orion5x/mpp.c @@ -127,7 +127,7 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode) /* Initialize gpiolib. */ orion_gpio_init(); - while (mode->mpp >= 0) { + for ( ; mode->mpp >= 0; mode++) { u32 *reg; int num_type; int shift; @@ -160,8 +160,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode) orion_gpio_set_unused(mode->mpp); orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO)); - - mode++; } writel(mpp_0_7_ctrl, MPP_0_7_CTRL); -- cgit v1.2.3-70-g09d2 From c947f69fff183e5d2a06160d9262b5dab7359e95 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 3 Nov 2010 16:00:15 +0000 Subject: ARM: Fix DMA coherent allocator alignment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit An out by one bug meant that the DMA coherent allocator was aligning to one more bit than it should, causing it to run out of available memory quicker. Fix this. Reported-by: Petr Štetiar Signed-off-by: Russell King --- arch/arm/mm/dma-mapping.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index e4dd0646e859..ac6a36142fcd 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -198,7 +198,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot) * fragmentation of the DMA space, and also prevents allocations * smaller than a section from crossing a section boundary. */ - bit = fls(size - 1) + 1; + bit = fls(size - 1); if (bit > SECTION_SHIFT) bit = SECTION_SHIFT; align = 1 << bit; -- cgit v1.2.3-70-g09d2 From d33aadbf8e9ba0b844c2a4a03723969c913ab03a Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 4 Nov 2010 18:22:51 +0100 Subject: ARM: 6468/1: backtrace: fix calculation of thread stack base When unwinding stack frames we must take care not to unwind areas of memory that lie outside of the known extent of the stack. This patch fixes an incorrect calculation of the stack base where THREAD_SIZE is added to the stack pointer after it has already been aligned to this value. Since the ALIGN macro performs this addition internally, we end up overshooting the base by 8k. Acked-by: Catalin Marinas Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/stacktrace.c | 2 +- arch/arm/kernel/unwind.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index 20b7411e47fd..c2e112e1a05f 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c @@ -28,7 +28,7 @@ int notrace unwind_frame(struct stackframe *frame) /* only go to a higher address on the stack */ low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; + high = ALIGN(low, THREAD_SIZE); /* check current frame pointer is within bounds */ if (fp < (low + 12) || fp + 4 >= high) diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index 2a161765f6d5..d2cb0b3c9872 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c @@ -279,7 +279,7 @@ int unwind_frame(struct stackframe *frame) /* only go to a higher address on the stack */ low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; + high = ALIGN(low, THREAD_SIZE); pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, frame->pc, frame->lr, frame->sp); -- cgit v1.2.3-70-g09d2 From c3b291d98878a5f25fee56255bcfa420e85dff59 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 4 Nov 2010 18:23:50 +0100 Subject: ARM: 6469/1: perf-events: squash compiler warning armv7_pmnc_counter_has_overflowed can return uninitialised data if an invalid counter is specified. This patch fixes the code to return 0 in this case, which squashes the compiler warning from GCC 4.5. Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/perf_event.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 49643b1467e6..07a50357492a 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -1749,7 +1749,7 @@ static inline int armv7_pmnc_has_overflowed(unsigned long pmnc) static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc, enum armv7_counters counter) { - int ret; + int ret = 0; if (counter == ARMV7_CYCLE_COUNTER) ret = pmnc & ARMV7_FLAG_C; -- cgit v1.2.3-70-g09d2 From d4c7b1f9b41b76f6e794fdc4043f1903809e84d9 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 4 Nov 2010 18:24:22 +0100 Subject: ARM: 6470/1: atomic64: use generic implementation for OABI configurations The old apcs-gnu ABI doesn't guarantee that double words are allocated to registers with even alignment, causing the 64-bit exclusive memory operations to be rejected by the assembler. This patch requires that CONFIG_AEABI is set in order to use the native atomic operations and falls back to the generic (spinlock) code otherwise. Acked-by: Nicolas Pitre Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a19a5266d5fc..8ae3d48d504c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -6,7 +6,7 @@ config ARM select HAVE_MEMBLOCK select RTC_LIB select SYS_SUPPORTS_APM_EMULATION - select GENERIC_ATOMIC64 if (!CPU_32v6K) + select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) select HAVE_OPROFILE if (HAVE_PERF_EVENTS) select HAVE_ARCH_KGDB select HAVE_KPROBES if (!XIP_KERNEL) -- cgit v1.2.3-70-g09d2 From 85d988fcff5a7e35df0d0fb0c581470f4b72a3de Mon Sep 17 00:00:00 2001 From: Ryan Mallon Date: Tue, 19 Oct 2010 21:14:55 +0100 Subject: ARM: 6462/1: EP93xx: Document DMA M2P API Add kernel-doc documentation for the EP93xx DMA memory to peripheral/peripheral to memory API. Signed-off-by: Ryan Mallon Acked-by: Mika Westerberg Signed-off-by: Russell King --- arch/arm/mach-ep93xx/include/mach/dma.h | 111 +++++++++++++++++++++++++++++--- 1 file changed, 102 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h index 3a5961d3f3b1..5e31b2b25da9 100644 --- a/arch/arm/mach-ep93xx/include/mach/dma.h +++ b/arch/arm/mach-ep93xx/include/mach/dma.h @@ -1,5 +1,13 @@ -/* - * arch/arm/mach-ep93xx/include/mach/dma.h +/** + * DOC: EP93xx DMA M2P memory to peripheral and peripheral to memory engine + * + * The EP93xx DMA M2P subsystem handles DMA transfers between memory and + * peripherals. DMA M2P channels are available for audio, UARTs and IrDA. + * See chapter 10 of the EP93xx users guide for full details on the DMA M2P + * engine. + * + * See sound/soc/ep93xx/ep93xx-pcm.c for an example use of the DMA M2P code. + * */ #ifndef __ASM_ARCH_DMA_H @@ -8,12 +16,34 @@ #include #include +/** + * struct ep93xx_dma_buffer - Information about a buffer to be transferred + * using the DMA M2P engine + * + * @list: Entry in DMA buffer list + * @bus_addr: Physical address of the buffer + * @size: Size of the buffer in bytes + */ struct ep93xx_dma_buffer { struct list_head list; u32 bus_addr; u16 size; }; +/** + * struct ep93xx_dma_m2p_client - Information about a DMA M2P client + * + * @name: Unique name for this client + * @flags: Client flags + * @cookie: User data to pass to callback functions + * @buffer_started: Non NULL function to call when a transfer is started. + * The arguments are the user data cookie and the DMA + * buffer which is starting. + * @buffer_finished: Non NULL function to call when a transfer is completed. + * The arguments are the user data cookie, the DMA buffer + * which has completed, and a boolean flag indicating if + * the transfer had an error. + */ struct ep93xx_dma_m2p_client { char *name; u8 flags; @@ -24,10 +54,11 @@ struct ep93xx_dma_m2p_client { struct ep93xx_dma_buffer *buf, int bytes, int error); - /* Internal to the DMA code. */ + /* private: Internal use only */ void *channel; }; +/* DMA M2P ports */ #define EP93XX_DMA_M2P_PORT_I2S1 0x00 #define EP93XX_DMA_M2P_PORT_I2S2 0x01 #define EP93XX_DMA_M2P_PORT_AAC1 0x02 @@ -39,18 +70,80 @@ struct ep93xx_dma_m2p_client { #define EP93XX_DMA_M2P_PORT_UART3 0x08 #define EP93XX_DMA_M2P_PORT_IRDA 0x09 #define EP93XX_DMA_M2P_PORT_MASK 0x0f -#define EP93XX_DMA_M2P_TX 0x00 -#define EP93XX_DMA_M2P_RX 0x10 -#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 -#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 -#define EP93XX_DMA_M2P_ERROR_MASK 0x60 -int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); +/* DMA M2P client flags */ +#define EP93XX_DMA_M2P_TX 0x00 /* Memory to peripheral */ +#define EP93XX_DMA_M2P_RX 0x10 /* Peripheral to memory */ + +/* + * DMA M2P client error handling flags. See the EP93xx users guide + * documentation on the DMA M2P CONTROL register for more details + */ +#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 /* Abort on peripheral error */ +#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 /* Ignore peripheral errors */ +#define EP93XX_DMA_M2P_ERROR_MASK 0x60 /* Mask of error bits */ + +/** + * ep93xx_dma_m2p_client_register - Register a client with the DMA M2P + * subsystem + * + * @m2p: Client information to register + * returns 0 on success + * + * The DMA M2P subsystem allocates a channel and an interrupt line for the DMA + * client + */ +int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); + +/** + * ep93xx_dma_m2p_client_unregister - Unregister a client from the DMA M2P + * subsystem + * + * @m2p: Client to unregister + * + * Any transfers currently in progress will be completed in hardware, but + * ignored in software. + */ void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p); + +/** + * ep93xx_dma_m2p_submit - Submit a DMA M2P transfer + * + * @m2p: DMA Client to submit the transfer on + * @buf: DMA Buffer to submit + * + * If the current or next transfer positions are free on the M2P client then + * the transfer is started immediately. If not, the transfer is added to the + * list of pending transfers. This function must not be called from the + * buffer_finished callback for an M2P channel. + * + */ void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p, struct ep93xx_dma_buffer *buf); + +/** + * ep93xx_dma_m2p_submit_recursive - Put a DMA transfer on the pending list + * for an M2P channel + * + * @m2p: DMA Client to submit the transfer on + * @buf: DMA Buffer to submit + * + * This function must only be called from the buffer_finished callback for an + * M2P channel. It is commonly used to add the next transfer in a chained list + * of DMA transfers. + */ void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p, struct ep93xx_dma_buffer *buf); + +/** + * ep93xx_dma_m2p_flush - Flush all pending transfers on a DMA M2P client + * + * @m2p: DMA client to flush transfers on + * + * Any transfers currently in progress will be completed in hardware, but + * ignored in software. + * + */ void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p); #endif /* __ASM_ARCH_DMA_H */ -- cgit v1.2.3-70-g09d2 From 235584b6f3b71bc1381be13a963a16f7107650cf Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Sat, 30 Oct 2010 14:21:24 -0700 Subject: ARM: arch/arm/kernel/hw_breakpoint.c: Convert WARN_ON to WARN Message isn't printed by WARN_ON. Signed-off-by: Joe Perches Signed-off-by: Russell King --- arch/arm/kernel/hw_breakpoint.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 54593b0c241b..21e3a4ab3b8c 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -748,8 +748,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, breakpoint_handler(addr, regs); break; case ARM_ENTRY_ASYNC_WATCHPOINT: - WARN_ON("Asynchronous watchpoint exception taken. " - "Debugging results may be unreliable"); + WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); case ARM_ENTRY_SYNC_WATCHPOINT: watchpoint_handler(addr, regs); break; -- cgit v1.2.3-70-g09d2 From 69448c2a4d23e5883cbca21a173e3eb89f095746 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Fri, 5 Nov 2010 16:12:34 -0700 Subject: ARM: arch/arm/kernel/traps.c: Convert sprintf_symbol to %pS Signed-off-by: Joe Perches Signed-off-by: Russell King --- arch/arm/kernel/traps.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index cda78d59aa31..446aee97436f 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -53,10 +53,7 @@ static void dump_mem(const char *, const char *, unsigned long, unsigned long); void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) { #ifdef CONFIG_KALLSYMS - char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN]; - sprint_symbol(sym1, where); - sprint_symbol(sym2, from); - printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2); + printk("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from); #else printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); #endif -- cgit v1.2.3-70-g09d2 From 07cf2a64c2ad3408a0e12aa4cd6040b30c09381d Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Sat, 6 Nov 2010 10:06:49 +0100 Subject: xen: fix memory leak in Xen PCI MSI/MSI-X allocator. Stanse found that xen_setup_msi_irqs leaks memory when xen_allocate_pirq fails. Free the memory in that fail path. Signed-off-by: Jiri Slaby Signed-off-by: Konrad Rzeszutek Wilk Cc: xen-devel@lists.xensource.com Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org --- arch/x86/pci/xen.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 117f5b8daf75..d7b5109f7a9c 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -147,8 +147,10 @@ static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) irq = xen_allocate_pirq(v[i], 0, /* not sharable */ (type == PCI_CAP_ID_MSIX) ? "pcifront-msi-x" : "pcifront-msi"); - if (irq < 0) - return -1; + if (irq < 0) { + ret = -1; + goto free; + } ret = set_irq_msi(irq, msidesc); if (ret) @@ -164,7 +166,7 @@ error: if (ret == -ENODEV) dev_err(&dev->dev, "Xen PCI frontend has not registered" \ " MSI/MSI-X support!\n"); - +free: kfree(v); return ret; } -- cgit v1.2.3-70-g09d2 From 0059b2436a86fedb2747f654f8e10a67e97d8614 Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Mon, 8 Nov 2010 22:20:29 +0100 Subject: x86: Address gcc4.6 "set but not used" warnings in apic.h native_apic_msr_read() and x2apic_enabled() use rdmsr(msr, low, high), but only use the low part. gcc4.6 complains about this: .../apic.h:144:11: warning: variable 'high' set but not used [-Wunused-but-set-variable] rdmsr() is just a wrapper around rdmsrl() which splits the 64bit value into low and high, so using rdmsrl() directly solves this. [tglx: Changed the variables to u64 as suggested by Cyrill. It's less confusing and has no code impact as this is 64bit only anyway. Massaged changelog as well. ] Signed-off-by: Andi Kleen Cc: x86@kernel.org Cc: Cyrill Gorcunov LKML-Reference: <1289251229-19589-1-git-send-email-andi@firstfloor.org> Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 286de34b0ed6..f6ce0bda3b98 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -141,13 +141,13 @@ static inline void native_apic_msr_write(u32 reg, u32 v) static inline u32 native_apic_msr_read(u32 reg) { - u32 low, high; + u64 msr; if (reg == APIC_DFR) return -1; - rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); - return low; + rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); + return (u32)msr; } static inline void native_x2apic_wait_icr_idle(void) @@ -181,12 +181,12 @@ extern void enable_x2apic(void); extern void x2apic_icr_write(u32 low, u32 id); static inline int x2apic_enabled(void) { - int msr, msr2; + u64 msr; if (!cpu_has_x2apic) return 0; - rdmsr(MSR_IA32_APICBASE, msr, msr2); + rdmsrl(MSR_IA32_APICBASE, msr); if (msr & X2APIC_ENABLE) return 1; return 0; -- cgit v1.2.3-70-g09d2 From 8e5e9521c13ff8cf6727999999c8d88cc64b5ff7 Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Tue, 9 Nov 2010 00:08:11 +0100 Subject: x86: Remove unnecessary casts of void ptr returning alloc function return values The [vk][cmz]alloc(_node) family of functions return void pointers which it's completely unnecessary/pointless to cast to other pointer types since that happens implicitly. This patch removes such casts from arch/x86. Signed-off-by: Jesper Juhl Cc: trivial@kernel.org Cc: amd64-microcode@amd64.org Cc: Andreas Herrmann LKML-Reference: Signed-off-by: Ingo Molnar --- arch/x86/kernel/microcode_amd.c | 2 +- arch/x86/platform/uv/tlb_uv.c | 13 ++++++------- 2 files changed, 7 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index e1af7c055c7d..ce0cb4721c9a 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c @@ -212,7 +212,7 @@ static int install_equiv_cpu_table(const u8 *buf) return 0; } - equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size); + equiv_cpu_table = vmalloc(size); if (!equiv_cpu_table) { pr_err("failed to allocate equivalent CPU table\n"); return 0; diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c index 20ea20a39e2a..a318194002b5 100644 --- a/arch/x86/platform/uv/tlb_uv.c +++ b/arch/x86/platform/uv/tlb_uv.c @@ -1343,8 +1343,8 @@ uv_activation_descriptor_init(int node, int pnode) * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR) * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub */ - bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)* - UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node); + bau_desc = kmalloc_node(sizeof(struct bau_desc) * UV_ADP_SIZE + * UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node); BUG_ON(!bau_desc); pa = uv_gpa(bau_desc); /* need the real nasid*/ @@ -1402,9 +1402,9 @@ uv_payload_queue_init(int node, int pnode) struct bau_payload_queue_entry *pqp_malloc; struct bau_control *bcp; - pqp = (struct bau_payload_queue_entry *) kmalloc_node( - (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry), - GFP_KERNEL, node); + pqp = kmalloc_node((DEST_Q_SIZE + 1) + * sizeof(struct bau_payload_queue_entry), + GFP_KERNEL, node); BUG_ON(!pqp); pqp_malloc = pqp; @@ -1520,8 +1520,7 @@ static void __init uv_init_per_cpu(int nuvhubs) timeout_us = calculate_destination_timeout(); - uvhub_descs = (struct uvhub_desc *) - kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL); + uvhub_descs = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL); memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc)); uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL); for_each_present_cpu(cpu) { -- cgit v1.2.3-70-g09d2 From 62b0cfc240b1d4601333912ef8760e0ca9ec2cec Mon Sep 17 00:00:00 2001 From: Jack Steiner Date: Sat, 6 Nov 2010 15:41:04 -0500 Subject: x86, UV: Update node controller MMRs A new version of the SGI UV hub node controller is being developed. A few of the MMRs (control registers) that exist on the current hub no longer exist on the new hub. Fortunately, there are alternate MMRs that are are functionally equivalent and that exist on both hubs. This patch changes the UV code to use MMRs that exist in BOTH versions of the hub node controller. Signed-off-by: Jack Steiner LKML-Reference: <20101106204056.GA27584@sgi.com> Signed-off-by: Ingo Molnar --- arch/x86/include/asm/uv/uv_mmrs.h | 189 +++++++++++++++++++------------------ arch/x86/kernel/apic/x2apic_uv_x.c | 12 +-- 2 files changed, 102 insertions(+), 99 deletions(-) (limited to 'arch') diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h index b2f2d2e05cec..6d90adf4428a 100644 --- a/arch/x86/include/asm/uv/uv_mmrs.h +++ b/arch/x86/include/asm/uv/uv_mmrs.h @@ -805,6 +805,78 @@ union uvh_node_present_table_u { } s; }; +/* ========================================================================= */ +/* UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR */ +/* ========================================================================= */ +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR 0x16000c8UL + +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_BASE_SHFT 24 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_BASE_MASK 0x00000000ff000000UL +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_M_ALIAS_SHFT 48 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_M_ALIAS_MASK 0x001f000000000000UL +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_ENABLE_SHFT 63 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_ENABLE_MASK 0x8000000000000000UL + +union uvh_rh_gam_alias210_overlay_config_0_mmr_u { + unsigned long v; + struct uvh_rh_gam_alias210_overlay_config_0_mmr_s { + unsigned long rsvd_0_23: 24; /* */ + unsigned long base : 8; /* RW */ + unsigned long rsvd_32_47: 16; /* */ + unsigned long m_alias : 5; /* RW */ + unsigned long rsvd_53_62: 10; /* */ + unsigned long enable : 1; /* RW */ + } s; +}; + +/* ========================================================================= */ +/* UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR */ +/* ========================================================================= */ +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR 0x16000d8UL + +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_BASE_SHFT 24 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_BASE_MASK 0x00000000ff000000UL +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_M_ALIAS_SHFT 48 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_M_ALIAS_MASK 0x001f000000000000UL +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_ENABLE_SHFT 63 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_ENABLE_MASK 0x8000000000000000UL + +union uvh_rh_gam_alias210_overlay_config_1_mmr_u { + unsigned long v; + struct uvh_rh_gam_alias210_overlay_config_1_mmr_s { + unsigned long rsvd_0_23: 24; /* */ + unsigned long base : 8; /* RW */ + unsigned long rsvd_32_47: 16; /* */ + unsigned long m_alias : 5; /* RW */ + unsigned long rsvd_53_62: 10; /* */ + unsigned long enable : 1; /* RW */ + } s; +}; + +/* ========================================================================= */ +/* UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR */ +/* ========================================================================= */ +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR 0x16000e8UL + +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_BASE_SHFT 24 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_BASE_MASK 0x00000000ff000000UL +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_M_ALIAS_SHFT 48 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_M_ALIAS_MASK 0x001f000000000000UL +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_ENABLE_SHFT 63 +#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_ENABLE_MASK 0x8000000000000000UL + +union uvh_rh_gam_alias210_overlay_config_2_mmr_u { + unsigned long v; + struct uvh_rh_gam_alias210_overlay_config_2_mmr_s { + unsigned long rsvd_0_23: 24; /* */ + unsigned long base : 8; /* RW */ + unsigned long rsvd_32_47: 16; /* */ + unsigned long m_alias : 5; /* RW */ + unsigned long rsvd_53_62: 10; /* */ + unsigned long enable : 1; /* RW */ + } s; +}; + /* ========================================================================= */ /* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR */ /* ========================================================================= */ @@ -856,6 +928,29 @@ union uvh_rh_gam_alias210_redirect_config_2_mmr_u { } s; }; +/* ========================================================================= */ +/* UVH_RH_GAM_CONFIG_MMR */ +/* ========================================================================= */ +#define UVH_RH_GAM_CONFIG_MMR 0x1600000UL + +#define UVH_RH_GAM_CONFIG_MMR_M_SKT_SHFT 0 +#define UVH_RH_GAM_CONFIG_MMR_M_SKT_MASK 0x000000000000003fUL +#define UVH_RH_GAM_CONFIG_MMR_N_SKT_SHFT 6 +#define UVH_RH_GAM_CONFIG_MMR_N_SKT_MASK 0x00000000000003c0UL +#define UVH_RH_GAM_CONFIG_MMR_MMIOL_CFG_SHFT 12 +#define UVH_RH_GAM_CONFIG_MMR_MMIOL_CFG_MASK 0x0000000000001000UL + +union uvh_rh_gam_config_mmr_u { + unsigned long v; + struct uvh_rh_gam_config_mmr_s { + unsigned long m_skt : 6; /* RW */ + unsigned long n_skt : 4; /* RW */ + unsigned long rsvd_10_11: 2; /* */ + unsigned long mmiol_cfg : 1; /* RW */ + unsigned long rsvd_13_63: 51; /* */ + } s; +}; + /* ========================================================================= */ /* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */ /* ========================================================================= */ @@ -987,97 +1082,5 @@ union uvh_rtc1_int_config_u { } s; }; -/* ========================================================================= */ -/* UVH_SI_ADDR_MAP_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL - -#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_SHFT 0 -#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_MASK 0x000000000000003fUL -#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_SHFT 8 -#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_MASK 0x0000000000000f00UL - -union uvh_si_addr_map_config_u { - unsigned long v; - struct uvh_si_addr_map_config_s { - unsigned long m_skt : 6; /* RW */ - unsigned long rsvd_6_7: 2; /* */ - unsigned long n_skt : 4; /* RW */ - unsigned long rsvd_12_63: 52; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_SI_ALIAS0_OVERLAY_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ALIAS0_OVERLAY_CONFIG 0xc80008UL - -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_SHFT 24 -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_SHFT 48 -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_SHFT 63 -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL - -union uvh_si_alias0_overlay_config_u { - unsigned long v; - struct uvh_si_alias0_overlay_config_s { - unsigned long rsvd_0_23: 24; /* */ - unsigned long base : 8; /* RW */ - unsigned long rsvd_32_47: 16; /* */ - unsigned long m_alias : 5; /* RW */ - unsigned long rsvd_53_62: 10; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_SI_ALIAS1_OVERLAY_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ALIAS1_OVERLAY_CONFIG 0xc80010UL - -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_SHFT 24 -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_SHFT 48 -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_SHFT 63 -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL - -union uvh_si_alias1_overlay_config_u { - unsigned long v; - struct uvh_si_alias1_overlay_config_s { - unsigned long rsvd_0_23: 24; /* */ - unsigned long base : 8; /* RW */ - unsigned long rsvd_32_47: 16; /* */ - unsigned long m_alias : 5; /* RW */ - unsigned long rsvd_53_62: 10; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_SI_ALIAS2_OVERLAY_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ALIAS2_OVERLAY_CONFIG 0xc80018UL - -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_SHFT 24 -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_SHFT 48 -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_SHFT 63 -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL - -union uvh_si_alias2_overlay_config_u { - unsigned long v; - struct uvh_si_alias2_overlay_config_s { - unsigned long rsvd_0_23: 24; /* */ - unsigned long base : 8; /* RW */ - unsigned long rsvd_32_47: 16; /* */ - unsigned long m_alias : 5; /* RW */ - unsigned long rsvd_53_62: 10; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - -#endif /* _ASM_X86_UV_UV_MMRS_H */ +#endif /* __ASM_UV_MMRS_X86_H__ */ diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index ed4118de249e..194539aea175 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -379,14 +379,14 @@ struct redir_addr { #define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT static __initdata struct redir_addr redir_addrs[] = { - {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG}, - {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG}, - {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG}, + {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR}, + {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR}, + {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR}, }; static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size) { - union uvh_si_alias0_overlay_config_u alias; + union uvh_rh_gam_alias210_overlay_config_2_mmr_u alias; union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect; int i; @@ -660,7 +660,7 @@ void uv_nmi_init(void) void __init uv_system_init(void) { - union uvh_si_addr_map_config_u m_n_config; + union uvh_rh_gam_config_mmr_u m_n_config; union uvh_node_id_u node_id; unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size; int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val; @@ -670,7 +670,7 @@ void __init uv_system_init(void) map_low_mmrs(); - m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG); + m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR ); m_val = m_n_config.s.m_skt; n_val = m_n_config.s.n_skt; mmr_base = -- cgit v1.2.3-70-g09d2 From 2f62bf7d238f6dfa39faf24c746d0b8dd60f85c5 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Thu, 4 Nov 2010 15:23:58 +0000 Subject: x86: Adjust section annotations in AMD Fam10 MMCONF enabling code check_enable_amd_mmconf_dmi() gets called only for the BSP, hence everything hanging off of it can be __init*. Signed-off-by: Jan Beulich Acked-by: Yinghai Lu LKML-Reference: <4CD2DE1E0200007800020990@vpn.id2.novell.com> Signed-off-by: Ingo Molnar --- arch/x86/kernel/mmconf-fam10h_64.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c index 71825806cd44..6da143c2a6b8 100644 --- a/arch/x86/kernel/mmconf-fam10h_64.c +++ b/arch/x86/kernel/mmconf-fam10h_64.c @@ -217,13 +217,13 @@ void __cpuinit fam10h_check_enable_mmcfg(void) wrmsrl(address, val); } -static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d) +static int __init set_check_enable_amd_mmconf(const struct dmi_system_id *d) { pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF; return 0; } -static const struct dmi_system_id __cpuinitconst mmconf_dmi_table[] = { +static const struct dmi_system_id __initconst mmconf_dmi_table[] = { { .callback = set_check_enable_amd_mmconf, .ident = "Sun Microsystems Machine", @@ -234,7 +234,8 @@ static const struct dmi_system_id __cpuinitconst mmconf_dmi_table[] = { {} }; -void __cpuinit check_enable_amd_mmconf_dmi(void) +/* Called from a __cpuinit function, but only on the BSP. */ +void __ref check_enable_amd_mmconf_dmi(void) { dmi_check_system(mmconf_dmi_table); } -- cgit v1.2.3-70-g09d2 From 2a8dcbd6cd2270f912ca141547d9296ce08abe4a Mon Sep 17 00:00:00 2001 From: Jesper Juhl Date: Sun, 7 Nov 2010 22:57:18 +0100 Subject: x86, apic: Remove double #include Remove the second inclusion. Signed-off-by: Jesper Juhl LKML-Reference: Signed-off-by: Ingo Molnar --- arch/x86/kernel/apic/apic.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 850657d1b0ed..3f838d537392 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -52,7 +52,6 @@ #include #include #include -#include unsigned int num_processors; -- cgit v1.2.3-70-g09d2 From 1f523bf36734375dd6e986c9f47f010d00a8caca Mon Sep 17 00:00:00 2001 From: Kusanagi Kouichi Date: Fri, 5 Nov 2010 20:04:42 +0900 Subject: x86, pvclock: Remove leftover scale_delta() function Commit 92580d64e16402762e2acc3022f065397c780425 ("x86: pvclock: Move scale_delta into common header") forgot to remove scale_delta. Signed-off-by: Kusanagi Kouichi Cc: Zachary Amsden Cc: Marcelo Tosatti Cc: Glauber Costa LKML-Reference: <20101105110444.BAF6D6FC03B@msa105.auone-net.jp> Signed-off-by: Ingo Molnar --- arch/x86/kernel/pvclock.c | 38 -------------------------------------- 1 file changed, 38 deletions(-) (limited to 'arch') diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c index bab3b9e6f66d..008b91eefa18 100644 --- a/arch/x86/kernel/pvclock.c +++ b/arch/x86/kernel/pvclock.c @@ -41,44 +41,6 @@ void pvclock_set_flags(u8 flags) valid_flags = flags; } -/* - * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction, - * yielding a 64-bit result. - */ -static inline u64 scale_delta(u64 delta, u32 mul_frac, int shift) -{ - u64 product; -#ifdef __i386__ - u32 tmp1, tmp2; -#endif - - if (shift < 0) - delta >>= -shift; - else - delta <<= shift; - -#ifdef __i386__ - __asm__ ( - "mul %5 ; " - "mov %4,%%eax ; " - "mov %%edx,%4 ; " - "mul %5 ; " - "xor %5,%5 ; " - "add %4,%%eax ; " - "adc %5,%%edx ; " - : "=A" (product), "=r" (tmp1), "=r" (tmp2) - : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) ); -#elif defined(__x86_64__) - __asm__ ( - "mul %%rdx ; shrd $32,%%rdx,%%rax" - : "=a" (product) : "0" (delta), "d" ((u64)mul_frac) ); -#else -#error implement me! -#endif - - return product; -} - static u64 pvclock_get_nsec_offset(struct pvclock_shadow_time *shadow) { u64 delta = native_read_tsc() - shadow->tsc_timestamp; -- cgit v1.2.3-70-g09d2 From e56c010f0d08bbecd05074eded7805d555da29b6 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Wed, 10 Nov 2010 15:59:11 +0100 Subject: ARM: 6472/1: vexpress ct-ca9x4: only set twd_base if local timers are being used In commit bde28b84, I made the assumption that CONFIG_SMP is always set for the quad-core ct-ca9x4 platform. As it turns out, people who aren't using the SMP goodness are confronted with a build failure. This patch fixes this issue by ensure that twd_base is only set if local timers are being used (and therefore SMP support is configured). Reported-by: Nicolas Pitre Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/mach-vexpress/ct-ca9x4.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index c2e405a9e025..fd25ccd7272f 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -54,7 +54,9 @@ static struct map_desc ct_ca9x4_io_desc[] __initdata = { static void __init ct_ca9x4_map_io(void) { +#ifdef CONFIG_LOCAL_TIMERS twd_base = MMIO_P2V(A9_MPCORE_TWD); +#endif v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); } -- cgit v1.2.3-70-g09d2 From 034c6efa4616e5ff6253549e973e7fef12899324 Mon Sep 17 00:00:00 2001 From: Peter Zijlstra Date: Mon, 1 Nov 2010 18:52:05 +0100 Subject: perf, amd: Use kmalloc_node(,__GFP_ZERO) for northbridge structure allocation Jasper suggested we use the zeroing capability of the allocators instead of calling memset ourselves. Add node affinity while we're at it. Reported-by: Jesper Juhl Signed-off-by: Peter Zijlstra LKML-Reference: Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_amd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c index 46d58448c3af..e421b8cd6944 100644 --- a/arch/x86/kernel/cpu/perf_event_amd.c +++ b/arch/x86/kernel/cpu/perf_event_amd.c @@ -280,11 +280,11 @@ static struct amd_nb *amd_alloc_nb(int cpu, int nb_id) struct amd_nb *nb; int i; - nb = kmalloc(sizeof(struct amd_nb), GFP_KERNEL); + nb = kmalloc_node(sizeof(struct amd_nb), GFP_KERNEL | __GFP_ZERO, + cpu_to_node(cpu)); if (!nb) return NULL; - memset(nb, 0, sizeof(*nb)); nb->nb_id = nb_id; /* -- cgit v1.2.3-70-g09d2 From 89346f950014f2c615ed96c630be2a9c8576743c Mon Sep 17 00:00:00 2001 From: Felipe Contreras Date: Tue, 19 Oct 2010 10:37:24 +0300 Subject: omap: dsp: remove shm from normal memory Also, don't be picky about the location, which incidentally fixes the build since MEMBLOCK_REAL_LIMIT is gone on 2.6.37. arch/arm/plat-omap/devices.c: In function 'omap_dsp_reserve_sdram_memblock': arch/arm/plat-omap/devices.c:287: error: 'MEMBLOCK_REAL_LIMIT' undeclared (first use in this function) Signed-off-by: Felipe Contreras Acked-by: Tony Lindgren Signed-off-by: Omar Ramirez Luna --- arch/arm/plat-omap/devices.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 6f42a18b8aa4..fc819120978d 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -284,12 +284,14 @@ void __init omap_dsp_reserve_sdram_memblock(void) if (!size) return; - paddr = __memblock_alloc_base(size, SZ_1M, MEMBLOCK_REAL_LIMIT); + paddr = memblock_alloc(size, SZ_1M); if (!paddr) { pr_err("%s: failed to reserve %x bytes\n", __func__, size); return; } + memblock_free(paddr, size); + memblock_remove(paddr, size); omap_dsp_phys_mempool_base = paddr; } -- cgit v1.2.3-70-g09d2 From 9ec23a7f6d2537faf14368e066e307c06812c4ca Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Thu, 28 Oct 2010 11:32:29 -0700 Subject: xen: do not release any memory under 1M in domain 0 We already deliberately setup a 1-1 P2M for the region up to 1M in order to allow code which assumes this region is already mapped to work without having to convert everything to ioremap. Domain 0 should not return any apparently unused memory regions (reserved or otherwise) in this region to Xen since the e820 may not accurately reflect what the BIOS has stashed in this region. Signed-off-by: Ian Campbell Signed-off-by: Jeremy Fitzhardinge --- arch/x86/xen/setup.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index b1dbdaa23ecc..769c4b01fa32 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c @@ -118,16 +118,18 @@ static unsigned long __init xen_return_unused_memory(unsigned long max_pfn, const struct e820map *e820) { phys_addr_t max_addr = PFN_PHYS(max_pfn); - phys_addr_t last_end = 0; + phys_addr_t last_end = ISA_END_ADDRESS; unsigned long released = 0; int i; + /* Free any unused memory above the low 1Mbyte. */ for (i = 0; i < e820->nr_map && last_end < max_addr; i++) { phys_addr_t end = e820->map[i].addr; end = min(max_addr, end); - released += xen_release_chunk(last_end, end); - last_end = e820->map[i].addr + e820->map[i].size; + if (last_end < end) + released += xen_release_chunk(last_end, end); + last_end = max(last_end, e820->map[i].addr + e820->map[i].size); } if (last_end < max_addr) @@ -164,6 +166,7 @@ char * __init xen_memory_setup(void) XENMEM_memory_map; rc = HYPERVISOR_memory_op(op, &memmap); if (rc == -ENOSYS) { + BUG_ON(xen_initial_domain()); memmap.nr_entries = 1; map[0].addr = 0ULL; map[0].size = mem_end; @@ -201,12 +204,13 @@ char * __init xen_memory_setup(void) } /* - * Even though this is normal, usable memory under Xen, reserve - * ISA memory anyway because too many things think they can poke + * In domU, the ISA region is normal, usable memory, but we + * reserve ISA memory anyway because too many things poke * about in there. * - * In a dom0 kernel, this region is identity mapped with the - * hardware ISA area, so it really is out of bounds. + * In Dom0, the host E820 information can leave gaps in the + * ISA range, which would cause us to release those pages. To + * avoid this, we unconditionally reserve them here. */ e820_add_region(ISA_START_ADDRESS, ISA_END_ADDRESS - ISA_START_ADDRESS, E820_RESERVED); -- cgit v1.2.3-70-g09d2 From 9395f6ea3c61d80ccc7a13668d27afbb8d9436ba Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 11 Nov 2010 23:10:30 +0000 Subject: ARM: GIC: don't disable software generated interrupts Software generated interrupts (SGI) are used for IPIs by the kernel. While previous revisions of the GIC hardware were specified not to implement enable bits for SGIs, more recent hardware is now permitted to implement these bits in a per-CPU banked register. The priority registers for the PPI and SGIs are also per-CPU banked registers, so ensure that these are also appropriately initialized. Reported-by: Scott Valentine Acked-by: Abhijeet Dharmapurikar Acked-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/common/gic.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index ada6359160eb..772f95f1aecd 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -251,15 +251,16 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); /* - * Set priority on all interrupts. + * Set priority on all global interrupts. */ - for (i = 0; i < max_irq; i += 4) + for (i = 32; i < max_irq; i += 4) writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); /* - * Disable all interrupts. + * Disable all interrupts. Leave the PPI and SGIs alone + * as these enables are banked registers. */ - for (i = 0; i < max_irq; i += 32) + for (i = 32; i < max_irq; i += 32) writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); /* @@ -277,11 +278,30 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) { + void __iomem *dist_base; + int i; + if (gic_nr >= MAX_GIC_NR) BUG(); + dist_base = gic_data[gic_nr].dist_base; + BUG_ON(!dist_base); + gic_data[gic_nr].cpu_base = base; + /* + * Deal with the banked PPI and SGI interrupts - disable all + * PPI interrupts, ensure all SGI interrupts are enabled. + */ + writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR); + writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET); + + /* + * Set priority on PPI and SGI interrupts + */ + for (i = 0; i < 32; i += 4) + writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4); + writel(0xf0, base + GIC_CPU_PRIMASK); writel(1, base + GIC_CPU_CTRL); } -- cgit v1.2.3-70-g09d2 From 8818b6719f1ecfdc1f27761704d0c9e2cbc48250 Mon Sep 17 00:00:00 2001 From: Richard Weinberger Date: Thu, 11 Nov 2010 14:05:04 -0800 Subject: um: fix ptrace build error Both commits 0a3d763f1a68 ("ptrace: cleanup arch_ptrace() on um") and 9b05a69e0534 ("ptrace: change signature of arch_ptrace()") broke the um build. This patch fixes the issues. 0a3d763f1a68 introduced the undeclared variable "datavp". The patch seems completely untested. :-( 9b05a69e0534 changed arch_ptrace()'s signature but did not update um/include/asm/ptrace-generic.h. Signed-off-by: Richard Weinberger Cc: Namhyung Kim Cc: Jeff Dike Tested-by: Will Newton Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/um/include/asm/ptrace-generic.h | 4 ++-- arch/um/kernel/ptrace.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h index 2cd899f75a3c..b7c5bab9bd77 100644 --- a/arch/um/include/asm/ptrace-generic.h +++ b/arch/um/include/asm/ptrace-generic.h @@ -38,8 +38,8 @@ struct pt_regs { struct task_struct; -extern long subarch_ptrace(struct task_struct *child, long request, long addr, - long data); +extern long subarch_ptrace(struct task_struct *child, long request, + unsigned long addr, unsigned long data); extern unsigned long getreg(struct task_struct *child, int regno); extern int putreg(struct task_struct *child, int regno, unsigned long value); extern int get_fpregs(struct user_i387_struct __user *buf, diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c index a5e33f29bbeb..701b672c1122 100644 --- a/arch/um/kernel/ptrace.c +++ b/arch/um/kernel/ptrace.c @@ -122,7 +122,7 @@ long arch_ptrace(struct task_struct *child, long request, break; case PTRACE_SET_THREAD_AREA: - ret = ptrace_set_thread_area(child, addr, datavp); + ret = ptrace_set_thread_area(child, addr, vp); break; case PTRACE_FAULTINFO: { -- cgit v1.2.3-70-g09d2