From 159697474db41732ef3b6c2e8d9395f09d1f659e Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Sun, 22 Aug 2021 18:10:03 +0200 Subject: MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT Defining PCI_IOBASE results in pci resource handling working but the addresses generated for IO accesses are wrong since the ioremap in the pci core function 'pci_parse_request_of_pci_ranges' tries to remap to a fixed virtual address (PC_IOBASE) which can't work for KSEG1 addresses. To get it working this way, we would need to put PCI_IOBASE somewhere into KSEG2 which will result in creating TLB entries for IO addresses, which most of the time isn't needed on MIPS because of access via KSEG1. So avoid to define PCI_IOBASE and increase IO_SPACE_LIMIT resource for ralink MIPS platform instead, to get valid IO addresses for resources from pci core 'pci_address_to_pio' function. Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE") Acked-by: Thomas Bogendoerfer Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210822161005.22467-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman --- arch/mips/include/asm/mach-ralink/spaces.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h index 87d085c9ad61..31a3525213cf 100644 --- a/arch/mips/include/asm/mach-ralink/spaces.h +++ b/arch/mips/include/asm/mach-ralink/spaces.h @@ -2,9 +2,7 @@ #ifndef __ASM_MACH_RALINK_SPACES_H_ #define __ASM_MACH_RALINK_SPACES_H_ -#define PCI_IOBASE _AC(0xa0000000, UL) -#define PCI_IOSIZE SZ_16M -#define IO_SPACE_LIMIT (PCI_IOSIZE - 1) +#define IO_SPACE_LIMIT 0x1fffffff #include #endif -- cgit v1.2.3-70-g09d2 From 1958beb80a603d090b8e66f8c3407360bd2d4bed Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Sat, 25 Sep 2021 22:32:19 +0200 Subject: Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT" This reverts commit 159697474db41732ef3b6c2e8d9395f09d1f659e. There is no real need to increase IO_SPACE_LIMIT if PCI_IOBASE is properly set to 'mips_io_port_base'. Hence revert this commit first before doing anything else. Acked-by: Thomas Bogendoerfer Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210925203224.10419-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman --- arch/mips/include/asm/mach-ralink/spaces.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h index 31a3525213cf..87d085c9ad61 100644 --- a/arch/mips/include/asm/mach-ralink/spaces.h +++ b/arch/mips/include/asm/mach-ralink/spaces.h @@ -2,7 +2,9 @@ #ifndef __ASM_MACH_RALINK_SPACES_H_ #define __ASM_MACH_RALINK_SPACES_H_ -#define IO_SPACE_LIMIT 0x1fffffff +#define PCI_IOBASE _AC(0xa0000000, UL) +#define PCI_IOSIZE SZ_16M +#define IO_SPACE_LIMIT (PCI_IOSIZE - 1) #include #endif -- cgit v1.2.3-70-g09d2 From ebe7e788ee7270cfe43584e99f11b00d1e4bbb3f Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Sat, 25 Sep 2021 22:32:21 +0200 Subject: MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' By default MIPS architecture use function 'set_io_port_base()' to set the virtual address of the first IO port. This function at the end sets variable 'mips_io_port_base' with the desired address. To align things and allow to change first IO port location address for PCI, set PCI_IOBASE definition as 'mips_io_port_base'. Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE") Acked-by: Arnd Bergmann Acked-by: Thomas Bogendoerfer Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210925203224.10419-4-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman --- arch/mips/include/asm/mach-ralink/spaces.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h index 87d085c9ad61..05d14c21c417 100644 --- a/arch/mips/include/asm/mach-ralink/spaces.h +++ b/arch/mips/include/asm/mach-ralink/spaces.h @@ -2,8 +2,8 @@ #ifndef __ASM_MACH_RALINK_SPACES_H_ #define __ASM_MACH_RALINK_SPACES_H_ -#define PCI_IOBASE _AC(0xa0000000, UL) -#define PCI_IOSIZE SZ_16M +#define PCI_IOBASE mips_io_port_base +#define PCI_IOSIZE SZ_64K #define IO_SPACE_LIMIT (PCI_IOSIZE - 1) #include -- cgit v1.2.3-70-g09d2 From 9f76779f24183c5d85a9441016d9dad042411e50 Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Sat, 25 Sep 2021 22:32:23 +0200 Subject: MIPS: implement architecture-specific 'pci_remap_iospace()' To make PCI IO work we need to properly virtually map IO cpu physical address and set this virtual address as the address of the first PCI IO port which is set using function 'set_io_port_base()'. Acked-by: Arnd Bergmann Acked-by: Thomas Bogendoerfer Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210925203224.10419-6-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman --- arch/mips/include/asm/pci.h | 2 ++ arch/mips/pci/pci-generic.c | 14 ++++++++++++++ 2 files changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h index 9ffc8192adae..35270984a5f0 100644 --- a/arch/mips/include/asm/pci.h +++ b/arch/mips/include/asm/pci.h @@ -20,6 +20,8 @@ #include #include +#define pci_remap_iospace pci_remap_iospace + #ifdef CONFIG_PCI_DRIVERS_LEGACY /* diff --git a/arch/mips/pci/pci-generic.c b/arch/mips/pci/pci-generic.c index 95b00017886c..18eb8a453a86 100644 --- a/arch/mips/pci/pci-generic.c +++ b/arch/mips/pci/pci-generic.c @@ -46,3 +46,17 @@ void pcibios_fixup_bus(struct pci_bus *bus) { pci_read_bridge_bases(bus); } + +int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) +{ + unsigned long vaddr; + + if (res->start != 0) { + WARN_ONCE(1, "resource start address is not zero\n"); + return -ENODEV; + } + + vaddr = (unsigned long)ioremap(phys_addr, resource_size(res)); + set_io_port_base(vaddr); + return 0; +} -- cgit v1.2.3-70-g09d2 From e538e8649892a5890dcc2b2b157f3876573a7773 Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Fri, 8 Oct 2021 11:53:11 +0200 Subject: MIPS: asm: pci: define arch-specific 'pci_remap_iospace()' dependent on 'CONFIG_PCI_DRIVERS_GENERIC' Some MIPS defconfigs that don't define 'CONFIG_PCI_DRIVERS_GENERIC' but define 'CONFIG_PCI_DRIVERS_LEGACY' or none of them, can fail when they are built since definition for 'pci_remap_iospace' is being done in include file 'arch/mips/include/asm/pci.h' and the specific function implemented in 'arch/mips/pci/pci-generic.c'. MIPS PCI drivers that don't use generic PCI core APIs don't really need 'pci_remap_iospace' to be defined at all. Hence, change definition for 'pci_remap_iospace' to be dependent on the preprocessor 'CONFIG_PCI_DRIVERS_GENERIC' definition to avoid possible build problems. Fixes: 9f76779f2418 ("MIPS: implement architecture-specific 'pci_remap_iospace()'") CC: Thomas Bogendoerfer Reported-by: Stephen Rothwell Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20211008095311.26475-1-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman --- arch/mips/include/asm/pci.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h index 35270984a5f0..421231f55935 100644 --- a/arch/mips/include/asm/pci.h +++ b/arch/mips/include/asm/pci.h @@ -20,7 +20,9 @@ #include #include +#ifdef CONFIG_PCI_DRIVERS_GENERIC #define pci_remap_iospace pci_remap_iospace +#endif #ifdef CONFIG_PCI_DRIVERS_LEGACY -- cgit v1.2.3-70-g09d2