From 0ae4fbc63c31fd318a7feb8590f0a05b250aa79e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 6 Sep 2019 09:34:06 -0400 Subject: clk: imx8mn: Use common 1443X/1416X PLL clock structure Use common 1413X/1416X PLL clock structure to save a lot of duplicated code on i.MX8MN clock driver. Signed-off-by: Anson Huang Reviewed-by: Leonard Crestez Signed-off-by: Shawn Guo --- drivers/clk/imx/clk-pll14xx.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/clk/imx/clk-pll14xx.c') diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 64826e22c328..7faad6065785 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -44,6 +44,8 @@ struct clk_pll14xx { const struct imx_pll14xx_rate_table imx_pll1416x_tbl[] = { PLL_1416X_RATE(1800000000U, 225, 3, 0), PLL_1416X_RATE(1600000000U, 200, 3, 0), + PLL_1416X_RATE(1500000000U, 375, 3, 1), + PLL_1416X_RATE(1400000000U, 350, 3, 1), PLL_1416X_RATE(1200000000U, 300, 3, 1), PLL_1416X_RATE(1000000000U, 250, 3, 1), PLL_1416X_RATE(800000000U, 200, 3, 1), -- cgit v1.2.3-70-g09d2