From 5fb23e35cacffb7b99ed5b97a002ddb8c9144bb6 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 17 Aug 2016 19:20:22 +0300 Subject: dmaengine: dw: override LLP support if asked in platform data There are at least two known devices, e.g. DMA controller found on ARC AXS101 SDP board, that have LLP register and no multi block transfer support at the same time. Override autodetection by user provided data. Reported-by: Eugeniy Paltsev Reviewed-by: Eugeniy Paltsev Signed-off-by: Andy Shevchenko Tested-by: Bryan O'Donoghue Signed-off-by: Greg Kroah-Hartman --- drivers/dma/dw/core.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'drivers/dma/dw') diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 80e74216cd56..da18b18561c4 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1571,11 +1571,7 @@ int dw_dma_probe(struct dw_dma_chip *chip) (dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0; } else { dwc->block_size = pdata->block_size; - - /* Check if channel supports multi block transfer */ - channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff)); - dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0; - channel_writel(dwc, LLP, 0); + dwc->nollp = pdata->is_nollp; } } -- cgit v1.2.3-70-g09d2