From 56b30ac84c517eefcfd5384339fee5d8a675f811 Mon Sep 17 00:00:00 2001
From: ZhenGuo Yin <zhenguo.yin@amd.com>
Date: Wed, 6 Mar 2024 17:59:29 +0800
Subject: drm/amdgpu: Skip access PF-only registers on gfx10/gfxhub2_1 under
SRIOV
[Why]
RLCG interface returns "out-of-range" error under SRIOV VF when accessing
PF-only registers.
[How]
Skip access PF-only registers on gfx10/gfxhub2_1 under SRIOV.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 3 +++
1 file changed, 3 insertions(+)
(limited to 'drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c')
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
index cd0e8a321e46..17509f32f61a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
@@ -155,6 +155,9 @@ static void gfxhub_v2_1_init_system_aperture_regs(struct amdgpu_device *adev)
{
uint64_t value;
+ if (amdgpu_sriov_vf(adev))
+ return;
+
/* Program the AGP BAR */
WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0);
WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
--
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