From 147ae1cbaa18429b9450fd47136a29653294aaad Mon Sep 17 00:00:00 2001 From: Julien Masson Date: Mon, 24 Jun 2019 16:48:43 +0200 Subject: drm: meson: viu: use proper macros instead of magic constants This patch add new macros which are used to set the following registers: - VIU_SW_RESET - VIU_OSD1_CTRL_STAT - VIU_OSD2_CTRL_STAT - VIU_OSD1_FIFO_CTRL_STAT - VIU_OSD2_FIFO_CTRL_STAT - VIU_MISC_CTRL0 - VIU_OSD_BLEND_CTRL - OSD1_BLEND_SRC_CTRL - OSD2_BLEND_SRC_CTRL - DOLBY_PATH_CTRL Signed-off-by: Julien Masson Reviewed-by: Neil Armstrong [narmstrong: fix OSD1_BLEND_SRC_CTRL register init value for G12A] Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/86sgrz82em.fsf@baylibre.com --- drivers/gpu/drm/meson/meson_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/drm/meson/meson_plane.c') diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c index 80b8d70c4d75..b9e1e117fb85 100644 --- a/drivers/gpu/drm/meson/meson_plane.c +++ b/drivers/gpu/drm/meson/meson_plane.c @@ -328,7 +328,7 @@ static void meson_plane_atomic_disable(struct drm_plane *plane, /* Disable OSD1 */ if (meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu")) - writel_bits_relaxed(3 << 8, 0, + writel_bits_relaxed(VIU_OSD1_POSTBLD_SRC_OSD1, 0, priv->io_base + _REG(OSD1_BLEND_SRC_CTRL)); else writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0, -- cgit v1.2.3-70-g09d2