From cc4c26d4ae4e458669d46ff69f16ac0c74f7cd49 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Sun, 30 May 2021 15:44:23 -0700 Subject: drm/msm: Generated register update Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5 Small bit of .c churn in the phy code to adapt to split up of phy related registers. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c') diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c index 3304acda2165..2da673a2add6 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c @@ -8,6 +8,7 @@ #include "dsi_phy.h" #include "dsi.xml.h" +#include "dsi_phy_28nm.xml.h" /* * DSI PLL 28nm - clock diagram (eg: DSI0): -- cgit v1.2.3-70-g09d2