From 4b1ced841b2e31470ae4bb47988891754ce4d8c7 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Wed, 31 Jul 2013 17:14:10 +0900 Subject: PCI: exynos: Split into Synopsys part and Exynos part Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys Designware part; other parts are Exynos specific. Also, the Synopsys Designware part can be shared with other platforms; thus, it can be split two parts such as Synopsys Designware part and Exynos specific part. Signed-off-by: Jingoo Han Signed-off-by: Bjorn Helgaas Cc: Pratyush Anand Cc: Mohit KUMAR --- drivers/pci/host/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/pci/host/Makefile') diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile index 086d8500e849..ab79ccb5bbff 100644 --- a/drivers/pci/host/Makefile +++ b/drivers/pci/host/Makefile @@ -1,2 +1,3 @@ -obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o obj-$(CONFIG_PCIE_DW) += pcie-designware.o +obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o +obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o -- cgit v1.2.3-70-g09d2