From f6b0cc477de99fe715f1071b13ab822daed9a34f Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:49:18 +0000 Subject: svga: Make svga_wattr take an iomem regbase pointer. And use vga_{r,w}(). Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 75738a928610..bcbf098a41c7 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -552,7 +552,7 @@ static int s3fb_set_par(struct fb_info *info) } vga_wcrt(NULL, 0x3A, 0x35); - svga_wattr(0x33, 0x00); + svga_wattr(par->state.vgabase, 0x33, 0x00); if (info->var.vmode & FB_VMODE_DOUBLE) svga_wcrt_mask(0x09, 0x80, 0x80); -- cgit v1.2.3-70-g09d2 From 21da386d0e4c55f6f7482b4637532b942e22b70a Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:49:34 +0000 Subject: svga: Make svga_wcrt_multi take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 9 +++++---- drivers/video/s3fb.c | 13 +++++++------ drivers/video/svgalib.c | 32 ++++++++++++++++---------------- drivers/video/vt8623fb.c | 10 ++++++---- include/linux/svga.h | 2 +- 5 files changed, 35 insertions(+), 31 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 391ac939f011..a54dbf4c7836 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -657,8 +657,8 @@ static int arkfb_set_par(struct fb_info *info) svga_set_default_atc_regs(); svga_set_default_seq_regs(); svga_set_default_crt_regs(); - svga_wcrt_multi(ark_line_compare_regs, 0xFFFFFFFF); - svga_wcrt_multi(ark_start_address_regs, 0); + svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); + svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); /* ARK specific initialization */ svga_wseq_mask(0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ @@ -676,7 +676,7 @@ static int arkfb_set_par(struct fb_info *info) /* Set the offset register */ pr_debug("fb%d: offset register : %d\n", info->node, offset_value); - svga_wcrt_multi(ark_offset_regs, offset_value); + svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); /* fix for hi-res textmode */ svga_wcrt_mask(0x40, 0x08, 0x08); @@ -884,6 +884,7 @@ static int arkfb_blank(int blank_mode, struct fb_info *info) static int arkfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { + struct arkfb_info *par = info->par; unsigned int offset; /* Calculate the offset */ @@ -897,7 +898,7 @@ static int arkfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info } /* Set the offset */ - svga_wcrt_multi(ark_start_address_regs, offset); + svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, offset); return 0; } diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index bcbf098a41c7..3984dcf7ba67 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -518,8 +518,8 @@ static int s3fb_set_par(struct fb_info *info) svga_set_default_atc_regs(); svga_set_default_seq_regs(); svga_set_default_crt_regs(); - svga_wcrt_multi(s3_line_compare_regs, 0xFFFFFFFF); - svga_wcrt_multi(s3_start_address_regs, 0); + svga_wcrt_multi(par->state.vgabase, s3_line_compare_regs, 0xFFFFFFFF); + svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0); /* S3 specific initialization */ svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */ @@ -540,7 +540,7 @@ static int s3fb_set_par(struct fb_info *info) /* Set the offset register */ pr_debug("fb%d: offset register : %d\n", info->node, offset_value); - svga_wcrt_multi(s3_offset_regs, offset_value); + svga_wcrt_multi(par->state.vgabase, s3_offset_regs, offset_value); if (par->chip != CHIP_360_TRIO3D_1X && par->chip != CHIP_362_TRIO3D_2X && @@ -822,8 +822,9 @@ static int s3fb_blank(int blank_mode, struct fb_info *info) /* Pan the display */ -static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { - +static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) +{ + struct s3fb_info *par = info->par; unsigned int offset; /* Calculate the offset */ @@ -837,7 +838,7 @@ static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) } /* Set the offset */ - svga_wcrt_multi(s3_start_address_regs, offset); + svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, offset); return 0; } diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 59c99fd4901b..bf3c7a92eeab 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -20,12 +20,12 @@ /* Write a CRT register value spread across multiple registers */ -void svga_wcrt_multi(const struct vga_regset *regset, u32 value) { - +void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) +{ u8 regval, bitval, bitnum; while (regset->regnum != VGA_REGSET_END_VAL) { - regval = vga_rcrt(NULL, regset->regnum); + regval = vga_rcrt(regbase, regset->regnum); bitnum = regset->lowbit; while (bitnum <= regset->highbit) { bitval = 1 << bitnum; @@ -34,7 +34,7 @@ void svga_wcrt_multi(const struct vga_regset *regset, u32 value) { bitnum ++; value = value >> 1; } - vga_wcrt(NULL, regset->regnum, regval); + vga_wcrt(regbase, regset->regnum, regval); regset ++; } } @@ -516,62 +516,62 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf value = var->xres + var->left_margin + var->right_margin + var->hsync_len; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal total : %d\n", node, value); - svga_wcrt_multi(tm->h_total_regs, (value / 8) - 5); + svga_wcrt_multi(NULL, tm->h_total_regs, (value / 8) - 5); value = var->xres; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal display : %d\n", node, value); - svga_wcrt_multi(tm->h_display_regs, (value / 8) - 1); + svga_wcrt_multi(NULL, tm->h_display_regs, (value / 8) - 1); value = var->xres; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal blank start: %d\n", node, value); - svga_wcrt_multi(tm->h_blank_start_regs, (value / 8) - 1 + hborder); + svga_wcrt_multi(NULL, tm->h_blank_start_regs, (value / 8) - 1 + hborder); value = var->xres + var->left_margin + var->right_margin + var->hsync_len; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal blank end : %d\n", node, value); - svga_wcrt_multi(tm->h_blank_end_regs, (value / 8) - 1 - hborder); + svga_wcrt_multi(NULL, tm->h_blank_end_regs, (value / 8) - 1 - hborder); value = var->xres + var->right_margin; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal sync start : %d\n", node, value); - svga_wcrt_multi(tm->h_sync_start_regs, (value / 8)); + svga_wcrt_multi(NULL, tm->h_sync_start_regs, (value / 8)); value = var->xres + var->right_margin + var->hsync_len; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal sync end : %d\n", node, value); - svga_wcrt_multi(tm->h_sync_end_regs, (value / 8)); + svga_wcrt_multi(NULL, tm->h_sync_end_regs, (value / 8)); value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical total : %d\n", node, value); - svga_wcrt_multi(tm->v_total_regs, value - 2); + svga_wcrt_multi(NULL, tm->v_total_regs, value - 2); value = var->yres; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical display : %d\n", node, value); - svga_wcrt_multi(tm->v_display_regs, value - 1); + svga_wcrt_multi(NULL, tm->v_display_regs, value - 1); value = var->yres; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical blank start : %d\n", node, value); - svga_wcrt_multi(tm->v_blank_start_regs, value); + svga_wcrt_multi(NULL, tm->v_blank_start_regs, value); value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical blank end : %d\n", node, value); - svga_wcrt_multi(tm->v_blank_end_regs, value - 2); + svga_wcrt_multi(NULL, tm->v_blank_end_regs, value - 2); value = var->yres + var->lower_margin; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical sync start : %d\n", node, value); - svga_wcrt_multi(tm->v_sync_start_regs, value); + svga_wcrt_multi(NULL, tm->v_sync_start_regs, value); value = var->yres + var->lower_margin + var->vsync_len; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical sync end : %d\n", node, value); - svga_wcrt_multi(tm->v_sync_end_regs, value); + svga_wcrt_multi(NULL, tm->v_sync_end_regs, value); /* Set horizontal and vertical sync pulse polarity in misc register */ diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index a2965ab92cfb..46f8e06a55e8 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -373,6 +373,7 @@ static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *inf static int vt8623fb_set_par(struct fb_info *info) { u32 mode, offset_value, fetch_value, screen_size; + struct vt8623fb_info *par = info->par; u32 bpp = info->var.bits_per_pixel; if (bpp != 0) { @@ -428,10 +429,10 @@ static int vt8623fb_set_par(struct fb_info *info) svga_set_default_atc_regs(); svga_set_default_seq_regs(); svga_set_default_crt_regs(); - svga_wcrt_multi(vt8623_line_compare_regs, 0xFFFFFFFF); - svga_wcrt_multi(vt8623_start_address_regs, 0); + svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); + svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); - svga_wcrt_multi(vt8623_offset_regs, offset_value); + svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value); svga_wseq_multi(vt8623_fetch_count_regs, fetch_value); /* Clear H/V Skew */ @@ -603,6 +604,7 @@ static int vt8623fb_blank(int blank_mode, struct fb_info *info) static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { + struct vt8623fb_info *par = info->par; unsigned int offset; /* Calculate the offset */ @@ -616,7 +618,7 @@ static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *i } /* Set the offset */ - svga_wcrt_multi(vt8623_start_address_regs, offset); + svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset); return 0; } diff --git a/include/linux/svga.h b/include/linux/svga.h index 95d39412a3c2..8ca81e0b0a6c 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -96,7 +96,7 @@ static inline int svga_primary_device(struct pci_dev *dev) } -void svga_wcrt_multi(const struct vga_regset *regset, u32 value); +void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); void svga_wseq_multi(const struct vga_regset *regset, u32 value); void svga_set_default_gfx_regs(void); -- cgit v1.2.3-70-g09d2 From e2fade2c146ec718796049104b45267ddbfdf7a1 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:50:04 +0000 Subject: svga: Make svga_set_default_gfx_regs take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 2 +- drivers/video/s3fb.c | 2 +- drivers/video/svgalib.c | 26 +++++++++++++------------- drivers/video/vt8623fb.c | 2 +- include/linux/svga.h | 2 +- 5 files changed, 17 insertions(+), 17 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index a54dbf4c7836..e09694f58c2c 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -653,7 +653,7 @@ static int arkfb_set_par(struct fb_info *info) svga_wcrt_mask(0x17, 0x00, 0x80); /* Set default values */ - svga_set_default_gfx_regs(); + svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(); svga_set_default_seq_regs(); svga_set_default_crt_regs(); diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 3984dcf7ba67..7e34e5a163c4 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -514,7 +514,7 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_mask(0x17, 0x00, 0x80); /* Set default values */ - svga_set_default_gfx_regs(); + svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(); svga_set_default_seq_regs(); svga_set_default_crt_regs(); diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index ed190aa09653..25f9f87f73dd 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -75,21 +75,21 @@ static unsigned int svga_regset_size(const struct vga_regset *regset) /* Set graphics controller registers to sane values */ -void svga_set_default_gfx_regs(void) +void svga_set_default_gfx_regs(void __iomem *regbase) { /* All standard GFX registers (GR00 - GR08) */ - vga_wgfx(NULL, VGA_GFX_SR_VALUE, 0x00); - vga_wgfx(NULL, VGA_GFX_SR_ENABLE, 0x00); - vga_wgfx(NULL, VGA_GFX_COMPARE_VALUE, 0x00); - vga_wgfx(NULL, VGA_GFX_DATA_ROTATE, 0x00); - vga_wgfx(NULL, VGA_GFX_PLANE_READ, 0x00); - vga_wgfx(NULL, VGA_GFX_MODE, 0x00); -/* vga_wgfx(NULL, VGA_GFX_MODE, 0x20); */ -/* vga_wgfx(NULL, VGA_GFX_MODE, 0x40); */ - vga_wgfx(NULL, VGA_GFX_MISC, 0x05); -/* vga_wgfx(NULL, VGA_GFX_MISC, 0x01); */ - vga_wgfx(NULL, VGA_GFX_COMPARE_MASK, 0x0F); - vga_wgfx(NULL, VGA_GFX_BIT_MASK, 0xFF); + vga_wgfx(regbase, VGA_GFX_SR_VALUE, 0x00); + vga_wgfx(regbase, VGA_GFX_SR_ENABLE, 0x00); + vga_wgfx(regbase, VGA_GFX_COMPARE_VALUE, 0x00); + vga_wgfx(regbase, VGA_GFX_DATA_ROTATE, 0x00); + vga_wgfx(regbase, VGA_GFX_PLANE_READ, 0x00); + vga_wgfx(regbase, VGA_GFX_MODE, 0x00); +/* vga_wgfx(regbase, VGA_GFX_MODE, 0x20); */ +/* vga_wgfx(regbase, VGA_GFX_MODE, 0x40); */ + vga_wgfx(regbase, VGA_GFX_MISC, 0x05); +/* vga_wgfx(regbase, VGA_GFX_MISC, 0x01); */ + vga_wgfx(regbase, VGA_GFX_COMPARE_MASK, 0x0F); + vga_wgfx(regbase, VGA_GFX_BIT_MASK, 0xFF); } /* Set attribute controller registers to sane values */ diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index f303ea0341bc..ccb4a3e78fda 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -425,7 +425,7 @@ static int vt8623fb_set_par(struct fb_info *info) svga_wcrt_mask(0x17, 0x00, 0x80); /* Set default values */ - svga_set_default_gfx_regs(); + svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(); svga_set_default_seq_regs(); svga_set_default_crt_regs(); diff --git a/include/linux/svga.h b/include/linux/svga.h index 357e2bdac9aa..4591032247f2 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -99,7 +99,7 @@ static inline int svga_primary_device(struct pci_dev *dev) void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); -void svga_set_default_gfx_regs(void); +void svga_set_default_gfx_regs(void __iomem *regbase); void svga_set_default_atc_regs(void); void svga_set_default_seq_regs(void); void svga_set_default_crt_regs(void); -- cgit v1.2.3-70-g09d2 From f51a14dded14457e45b1f026a6af5ca6a51e4502 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:50:36 +0000 Subject: svga: Make svga_set_default_atc_regs take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 2 +- drivers/video/s3fb.c | 2 +- drivers/video/svgalib.c | 24 ++++++++++++------------ drivers/video/vt8623fb.c | 2 +- include/linux/svga.h | 2 +- 5 files changed, 16 insertions(+), 16 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index e09694f58c2c..1028e329c46b 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -654,7 +654,7 @@ static int arkfb_set_par(struct fb_info *info) /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); - svga_set_default_atc_regs(); + svga_set_default_atc_regs(par->state.vgabase); svga_set_default_seq_regs(); svga_set_default_crt_regs(); svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 7e34e5a163c4..7073cf904ccd 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -515,7 +515,7 @@ static int s3fb_set_par(struct fb_info *info) /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); - svga_set_default_atc_regs(); + svga_set_default_atc_regs(par->state.vgabase); svga_set_default_seq_regs(); svga_set_default_crt_regs(); svga_wcrt_multi(par->state.vgabase, s3_line_compare_regs, 0xFFFFFFFF); diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 25f9f87f73dd..8b97359db502 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -93,26 +93,26 @@ void svga_set_default_gfx_regs(void __iomem *regbase) } /* Set attribute controller registers to sane values */ -void svga_set_default_atc_regs(void) +void svga_set_default_atc_regs(void __iomem *regbase) { u8 count; - vga_r(NULL, 0x3DA); - vga_w(NULL, VGA_ATT_W, 0x00); + vga_r(regbase, 0x3DA); + vga_w(regbase, VGA_ATT_W, 0x00); /* All standard ATC registers (AR00 - AR14) */ for (count = 0; count <= 0xF; count ++) - svga_wattr(NULL, count, count); + svga_wattr(regbase, count, count); - svga_wattr(NULL, VGA_ATC_MODE, 0x01); -/* svga_wattr(NULL, VGA_ATC_MODE, 0x41); */ - svga_wattr(NULL, VGA_ATC_OVERSCAN, 0x00); - svga_wattr(NULL, VGA_ATC_PLANE_ENABLE, 0x0F); - svga_wattr(NULL, VGA_ATC_PEL, 0x00); - svga_wattr(NULL, VGA_ATC_COLOR_PAGE, 0x00); + svga_wattr(regbase, VGA_ATC_MODE, 0x01); +/* svga_wattr(regbase, VGA_ATC_MODE, 0x41); */ + svga_wattr(regbase, VGA_ATC_OVERSCAN, 0x00); + svga_wattr(regbase, VGA_ATC_PLANE_ENABLE, 0x0F); + svga_wattr(regbase, VGA_ATC_PEL, 0x00); + svga_wattr(regbase, VGA_ATC_COLOR_PAGE, 0x00); - vga_r(NULL, 0x3DA); - vga_w(NULL, VGA_ATT_W, 0x20); + vga_r(regbase, 0x3DA); + vga_w(regbase, VGA_ATT_W, 0x20); } /* Set sequencer registers to sane values */ diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index ccb4a3e78fda..310af2dc43cd 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -426,7 +426,7 @@ static int vt8623fb_set_par(struct fb_info *info) /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); - svga_set_default_atc_regs(); + svga_set_default_atc_regs(par->state.vgabase); svga_set_default_seq_regs(); svga_set_default_crt_regs(); svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); diff --git a/include/linux/svga.h b/include/linux/svga.h index 4591032247f2..87a41641caeb 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -100,7 +100,7 @@ void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value); void svga_set_default_gfx_regs(void __iomem *regbase); -void svga_set_default_atc_regs(void); +void svga_set_default_atc_regs(void __iomem *regbase); void svga_set_default_seq_regs(void); void svga_set_default_crt_regs(void); void svga_set_textmode_vga_regs(void); -- cgit v1.2.3-70-g09d2 From a4ade83948e0ffc317b8227d92107271a0acdda5 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:50:54 +0000 Subject: svga: Make svga_set_default_seq_regs take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 2 +- drivers/video/s3fb.c | 2 +- drivers/video/svgalib.c | 12 ++++++------ drivers/video/vt8623fb.c | 2 +- include/linux/svga.h | 2 +- 5 files changed, 10 insertions(+), 10 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 1028e329c46b..4cc412126ad3 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -655,7 +655,7 @@ static int arkfb_set_par(struct fb_info *info) /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(par->state.vgabase); - svga_set_default_seq_regs(); + svga_set_default_seq_regs(par->state.vgabase); svga_set_default_crt_regs(); svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 7073cf904ccd..f37c38bbe879 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -516,7 +516,7 @@ static int s3fb_set_par(struct fb_info *info) /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(par->state.vgabase); - svga_set_default_seq_regs(); + svga_set_default_seq_regs(par->state.vgabase); svga_set_default_crt_regs(); svga_wcrt_multi(par->state.vgabase, s3_line_compare_regs, 0xFFFFFFFF); svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0); diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 8b97359db502..6d3d39feb891 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -116,14 +116,14 @@ void svga_set_default_atc_regs(void __iomem *regbase) } /* Set sequencer registers to sane values */ -void svga_set_default_seq_regs(void) +void svga_set_default_seq_regs(void __iomem *regbase) { /* Standard sequencer registers (SR01 - SR04), SR00 is not set */ - vga_wseq(NULL, VGA_SEQ_CLOCK_MODE, VGA_SR01_CHAR_CLK_8DOTS); - vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, VGA_SR02_ALL_PLANES); - vga_wseq(NULL, VGA_SEQ_CHARACTER_MAP, 0x00); -/* vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE | VGA_SR04_CHN_4M); */ - vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE); + vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, VGA_SR01_CHAR_CLK_8DOTS); + vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, VGA_SR02_ALL_PLANES); + vga_wseq(regbase, VGA_SEQ_CHARACTER_MAP, 0x00); +/* vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE | VGA_SR04_CHN_4M); */ + vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE); } /* Set CRTC registers to sane values */ diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index 310af2dc43cd..9de76811200e 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -427,7 +427,7 @@ static int vt8623fb_set_par(struct fb_info *info) /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(par->state.vgabase); - svga_set_default_seq_regs(); + svga_set_default_seq_regs(par->state.vgabase); svga_set_default_crt_regs(); svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); diff --git a/include/linux/svga.h b/include/linux/svga.h index 87a41641caeb..d31a39844019 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -101,7 +101,7 @@ void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 void svga_set_default_gfx_regs(void __iomem *regbase); void svga_set_default_atc_regs(void __iomem *regbase); -void svga_set_default_seq_regs(void); +void svga_set_default_seq_regs(void __iomem *regbase); void svga_set_default_crt_regs(void); void svga_set_textmode_vga_regs(void); -- cgit v1.2.3-70-g09d2 From d907ec04cc498e11e039e0fff8eb58cf01e885da Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:51:08 +0000 Subject: svga: Make svga_wseq_mask() take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 16 +++++++++------- drivers/video/s3fb.c | 20 +++++++++++--------- drivers/video/svgalib.c | 2 +- drivers/video/vt8623fb.c | 43 +++++++++++++++++++++++-------------------- include/linux/svga.h | 4 ++-- 5 files changed, 46 insertions(+), 39 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 4cc412126ad3..c351b184b1bd 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -649,7 +649,7 @@ static int arkfb_set_par(struct fb_info *info) svga_wcrt_mask(0x11, 0x00, 0x80); /* Blank screen and turn off sync */ - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wcrt_mask(0x17, 0x00, 0x80); /* Set default values */ @@ -661,8 +661,8 @@ static int arkfb_set_par(struct fb_info *info) svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); /* ARK specific initialization */ - svga_wseq_mask(0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ - svga_wseq_mask(0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ + svga_wseq_mask(par->state.vgabase, 0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ + svga_wseq_mask(par->state.vgabase, 0x12, 0x03, 0x03); /* 4 MB linear framebuffer size */ vga_wseq(NULL, 0x13, info->fix.smem_start >> 16); vga_wseq(NULL, 0x14, info->fix.smem_start >> 24); @@ -787,7 +787,7 @@ static int arkfb_set_par(struct fb_info *info) memset_io(info->screen_base, 0x00, screen_size); /* Device and screen back on */ svga_wcrt_mask(0x17, 0x80, 0x80); - svga_wseq_mask(0x01, 0x00, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); return 0; } @@ -857,22 +857,24 @@ static int arkfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, static int arkfb_blank(int blank_mode, struct fb_info *info) { + struct arkfb_info *par = info->par; + switch (blank_mode) { case FB_BLANK_UNBLANK: pr_debug("fb%d: unblank\n", info->node); - svga_wseq_mask(0x01, 0x00, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wcrt_mask(0x17, 0x80, 0x80); break; case FB_BLANK_NORMAL: pr_debug("fb%d: blank\n", info->node); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wcrt_mask(0x17, 0x80, 0x80); break; case FB_BLANK_POWERDOWN: case FB_BLANK_HSYNC_SUSPEND: case FB_BLANK_VSYNC_SUSPEND: pr_debug("fb%d: sync down\n", info->node); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wcrt_mask(0x17, 0x00, 0x80); break; } diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index f37c38bbe879..efe77b683bfa 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -510,7 +510,7 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_mask(0x11, 0x00, 0x80); /* Blank screen and turn off sync */ - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wcrt_mask(0x17, 0x00, 0x80); /* Set default values */ @@ -700,8 +700,8 @@ static int s3fb_set_par(struct fb_info *info) } if (par->chip != CHIP_988_VIRGE_VX) { - svga_wseq_mask(0x15, multiplex ? 0x10 : 0x00, 0x10); - svga_wseq_mask(0x18, multiplex ? 0x80 : 0x00, 0x80); + svga_wseq_mask(par->state.vgabase, 0x15, multiplex ? 0x10 : 0x00, 0x10); + svga_wseq_mask(par->state.vgabase, 0x18, multiplex ? 0x80 : 0x00, 0x80); } s3_set_pixclock(info, info->var.pixclock); @@ -718,7 +718,7 @@ static int s3fb_set_par(struct fb_info *info) memset_io(info->screen_base, 0x00, screen_size); /* Device and screen back on */ svga_wcrt_mask(0x17, 0x80, 0x80); - svga_wseq_mask(0x01, 0x00, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); return 0; } @@ -788,31 +788,33 @@ static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, static int s3fb_blank(int blank_mode, struct fb_info *info) { + struct s3fb_info *par = info->par; + switch (blank_mode) { case FB_BLANK_UNBLANK: pr_debug("fb%d: unblank\n", info->node); svga_wcrt_mask(0x56, 0x00, 0x06); - svga_wseq_mask(0x01, 0x00, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); break; case FB_BLANK_NORMAL: pr_debug("fb%d: blank\n", info->node); svga_wcrt_mask(0x56, 0x00, 0x06); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_HSYNC_SUSPEND: pr_debug("fb%d: hsync\n", info->node); svga_wcrt_mask(0x56, 0x02, 0x06); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_VSYNC_SUSPEND: pr_debug("fb%d: vsync\n", info->node); svga_wcrt_mask(0x56, 0x04, 0x06); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_POWERDOWN: pr_debug("fb%d: sync down\n", info->node); svga_wcrt_mask(0x56, 0x06, 0x06); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; } diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 6d3d39feb891..ea7490490de6 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -139,7 +139,7 @@ void svga_set_default_crt_regs(void) void svga_set_textmode_vga_regs(void) { - /* svga_wseq_mask(0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ + /* svga_wseq_mask(NULL, 0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, 0x03); diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index 9de76811200e..edcfee8bc90b 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -253,6 +253,7 @@ static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *re static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) { + struct vt8623fb_info *par = info->par; u16 m, n, r; u8 regval; int rv; @@ -274,8 +275,8 @@ static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) udelay(1000); /* PLL reset */ - svga_wseq_mask(0x40, 0x02, 0x02); - svga_wseq_mask(0x40, 0x00, 0x02); + svga_wseq_mask(par->state.vgabase, 0x40, 0x02, 0x02); + svga_wseq_mask(par->state.vgabase, 0x40, 0x00, 0x02); } @@ -415,12 +416,12 @@ static int vt8623fb_set_par(struct fb_info *info) info->var.activate = FB_ACTIVATE_NOW; /* Unlock registers */ - svga_wseq_mask(0x10, 0x01, 0x01); + svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); svga_wcrt_mask(0x11, 0x00, 0x80); svga_wcrt_mask(0x47, 0x00, 0x01); /* Device, screen and sync off */ - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wcrt_mask(0x36, 0x30, 0x30); svga_wcrt_mask(0x17, 0x00, 0x80); @@ -444,12 +445,12 @@ static int vt8623fb_set_par(struct fb_info *info) else svga_wcrt_mask(0x09, 0x00, 0x80); - svga_wseq_mask(0x1E, 0xF0, 0xF0); // DI/DVP bus - svga_wseq_mask(0x2A, 0x0F, 0x0F); // DI/DVP bus - svga_wseq_mask(0x16, 0x08, 0xBF); // FIFO read threshold + svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus + svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus + svga_wseq_mask(par->state.vgabase, 0x16, 0x08, 0xBF); // FIFO read threshold vga_wseq(NULL, 0x17, 0x1F); // FIFO depth vga_wseq(NULL, 0x18, 0x4E); - svga_wseq_mask(0x1A, 0x08, 0x08); // enable MMIO ? + svga_wseq_mask(par->state.vgabase, 0x1A, 0x08, 0x08); // enable MMIO ? vga_wcrt(NULL, 0x32, 0x00); vga_wcrt(NULL, 0x34, 0x00); @@ -466,31 +467,31 @@ static int vt8623fb_set_par(struct fb_info *info) case 0: pr_debug("fb%d: text mode\n", info->node); svga_set_textmode_vga_regs(); - svga_wseq_mask(0x15, 0x00, 0xFE); + svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); svga_wcrt_mask(0x11, 0x60, 0x70); break; case 1: pr_debug("fb%d: 4 bit pseudocolor\n", info->node); vga_wgfx(NULL, VGA_GFX_MODE, 0x40); - svga_wseq_mask(0x15, 0x20, 0xFE); + svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); svga_wcrt_mask(0x11, 0x00, 0x70); break; case 2: pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); - svga_wseq_mask(0x15, 0x00, 0xFE); + svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); svga_wcrt_mask(0x11, 0x00, 0x70); break; case 3: pr_debug("fb%d: 8 bit pseudocolor\n", info->node); - svga_wseq_mask(0x15, 0x22, 0xFE); + svga_wseq_mask(par->state.vgabase, 0x15, 0x22, 0xFE); break; case 4: pr_debug("fb%d: 5/6/5 truecolor\n", info->node); - svga_wseq_mask(0x15, 0xB6, 0xFE); + svga_wseq_mask(par->state.vgabase, 0x15, 0xB6, 0xFE); break; case 5: pr_debug("fb%d: 8/8/8 truecolor\n", info->node); - svga_wseq_mask(0x15, 0xAE, 0xFE); + svga_wseq_mask(par->state.vgabase, 0x15, 0xAE, 0xFE); break; default: printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); @@ -507,7 +508,7 @@ static int vt8623fb_set_par(struct fb_info *info) /* Device and screen back on */ svga_wcrt_mask(0x17, 0x80, 0x80); svga_wcrt_mask(0x36, 0x00, 0x30); - svga_wseq_mask(0x01, 0x00, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); return 0; } @@ -570,31 +571,33 @@ static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, static int vt8623fb_blank(int blank_mode, struct fb_info *info) { + struct vt8623fb_info *par = info->par; + switch (blank_mode) { case FB_BLANK_UNBLANK: pr_debug("fb%d: unblank\n", info->node); svga_wcrt_mask(0x36, 0x00, 0x30); - svga_wseq_mask(0x01, 0x00, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); break; case FB_BLANK_NORMAL: pr_debug("fb%d: blank\n", info->node); svga_wcrt_mask(0x36, 0x00, 0x30); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_HSYNC_SUSPEND: pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); svga_wcrt_mask(0x36, 0x10, 0x30); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_VSYNC_SUSPEND: pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); svga_wcrt_mask(0x36, 0x20, 0x30); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_POWERDOWN: pr_debug("fb%d: DPMS off (no sync)\n", info->node); svga_wcrt_mask(0x36, 0x30, 0x30); - svga_wseq_mask(0x01, 0x20, 0x20); + svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; } diff --git a/include/linux/svga.h b/include/linux/svga.h index d31a39844019..93f7777b268a 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -76,9 +76,9 @@ static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data) /* Write a value to a sequence register with a mask */ -static inline void svga_wseq_mask(u8 index, u8 data, u8 mask) +static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) { - vga_wseq(NULL, index, (data & mask) | (vga_rseq(NULL, index) & ~mask)); + vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask)); } /* Write a value to a CRT register with a mask */ -- cgit v1.2.3-70-g09d2 From ea770789dce2d27afab39c3891a475624acbd82f Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:51:26 +0000 Subject: svga: Make svga_wcrt_mask() take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 40 ++++++++++---------- drivers/video/s3fb.c | 98 ++++++++++++++++++++++++------------------------ drivers/video/svgalib.c | 8 ++-- drivers/video/vt8623fb.c | 36 +++++++++--------- include/linux/svga.h | 4 +- 5 files changed, 93 insertions(+), 93 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index c351b184b1bd..f24151e01da3 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -646,11 +646,11 @@ static int arkfb_set_par(struct fb_info *info) info->var.activate = FB_ACTIVATE_NOW; /* Unlock registers */ - svga_wcrt_mask(0x11, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); /* Blank screen and turn off sync */ svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); - svga_wcrt_mask(0x17, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); @@ -679,17 +679,17 @@ static int arkfb_set_par(struct fb_info *info) svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); /* fix for hi-res textmode */ - svga_wcrt_mask(0x40, 0x08, 0x08); + svga_wcrt_mask(par->state.vgabase, 0x40, 0x08, 0x08); if (info->var.vmode & FB_VMODE_DOUBLE) - svga_wcrt_mask(0x09, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); else - svga_wcrt_mask(0x09, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); if (info->var.vmode & FB_VMODE_INTERLACED) - svga_wcrt_mask(0x44, 0x04, 0x04); + svga_wcrt_mask(par->state.vgabase, 0x44, 0x04, 0x04); else - svga_wcrt_mask(0x44, 0x00, 0x04); + svga_wcrt_mask(par->state.vgabase, 0x44, 0x00, 0x04); hmul = 1; hdiv = 1; @@ -702,7 +702,7 @@ static int arkfb_set_par(struct fb_info *info) svga_set_textmode_vga_regs(); vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ - svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_8); break; @@ -711,14 +711,14 @@ static int arkfb_set_par(struct fb_info *info) vga_wgfx(NULL, VGA_GFX_MODE, 0x40); vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ - svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_8); break; case 2: pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ - svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_8); break; case 3: @@ -728,11 +728,11 @@ static int arkfb_set_par(struct fb_info *info) if (info->var.pixclock > 20000) { pr_debug("fb%d: not using multiplex\n", info->node); - svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_8); } else { pr_debug("fb%d: using multiplex\n", info->node); - svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_PSEUDO8_16); hdiv = 2; } @@ -741,21 +741,21 @@ static int arkfb_set_par(struct fb_info *info) pr_debug("fb%d: 5/5/5 truecolor\n", info->node); vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */ - svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_RGB1555_16); break; case 5: pr_debug("fb%d: 5/6/5 truecolor\n", info->node); vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */ - svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_RGB0565_16); break; case 6: pr_debug("fb%d: 8/8/8 truecolor\n", info->node); vga_wseq(NULL, 0x11, 0x16); /* 8bpp accel mode ??? */ - svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_RGB0888_16); hmul = 3; hdiv = 2; @@ -764,7 +764,7 @@ static int arkfb_set_par(struct fb_info *info) pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); vga_wseq(NULL, 0x11, 0x1E); /* 32bpp accel mode */ - svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ + svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */ dac_set_mode(par->dac, DAC_RGB8888_16); hmul = 2; break; @@ -786,7 +786,7 @@ static int arkfb_set_par(struct fb_info *info) memset_io(info->screen_base, 0x00, screen_size); /* Device and screen back on */ - svga_wcrt_mask(0x17, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); return 0; @@ -863,19 +863,19 @@ static int arkfb_blank(int blank_mode, struct fb_info *info) case FB_BLANK_UNBLANK: pr_debug("fb%d: unblank\n", info->node); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); - svga_wcrt_mask(0x17, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); break; case FB_BLANK_NORMAL: pr_debug("fb%d: blank\n", info->node); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); - svga_wcrt_mask(0x17, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); break; case FB_BLANK_POWERDOWN: case FB_BLANK_HSYNC_SUSPEND: case FB_BLANK_VSYNC_SUSPEND: pr_debug("fb%d: sync down\n", info->node); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); - svga_wcrt_mask(0x17, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); break; } return 0; diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index efe77b683bfa..ece99f2044f4 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -507,11 +507,11 @@ static int s3fb_set_par(struct fb_info *info) vga_wcrt(NULL, 0x38, 0x48); vga_wcrt(NULL, 0x39, 0xA5); vga_wseq(NULL, 0x08, 0x06); - svga_wcrt_mask(0x11, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); /* Blank screen and turn off sync */ svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); - svga_wcrt_mask(0x17, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); @@ -522,20 +522,20 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0); /* S3 specific initialization */ - svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */ - svga_wcrt_mask(0x31, 0x08, 0x08); /* enable sequencer access to framebuffer above 256 kB */ + svga_wcrt_mask(par->state.vgabase, 0x58, 0x10, 0x10); /* enable linear framebuffer */ + svga_wcrt_mask(par->state.vgabase, 0x31, 0x08, 0x08); /* enable sequencer access to framebuffer above 256 kB */ -/* svga_wcrt_mask(0x33, 0x08, 0x08); */ /* DDR ? */ -/* svga_wcrt_mask(0x43, 0x01, 0x01); */ /* DDR ? */ - svga_wcrt_mask(0x33, 0x00, 0x08); /* no DDR ? */ - svga_wcrt_mask(0x43, 0x00, 0x01); /* no DDR ? */ +/* svga_wcrt_mask(par->state.vgabase, 0x33, 0x08, 0x08); */ /* DDR ? */ +/* svga_wcrt_mask(par->state.vgabase, 0x43, 0x01, 0x01); */ /* DDR ? */ + svga_wcrt_mask(par->state.vgabase, 0x33, 0x00, 0x08); /* no DDR ? */ + svga_wcrt_mask(par->state.vgabase, 0x43, 0x00, 0x01); /* no DDR ? */ - svga_wcrt_mask(0x5D, 0x00, 0x28); /* Clear strange HSlen bits */ + svga_wcrt_mask(par->state.vgabase, 0x5D, 0x00, 0x28); /* Clear strange HSlen bits */ -/* svga_wcrt_mask(0x58, 0x03, 0x03); */ +/* svga_wcrt_mask(par->state.vgabase, 0x58, 0x03, 0x03); */ -/* svga_wcrt_mask(0x53, 0x12, 0x13); */ /* enable MMIO */ -/* svga_wcrt_mask(0x40, 0x08, 0x08); */ /* enable write buffer */ +/* svga_wcrt_mask(par->state.vgabase, 0x53, 0x12, 0x13); */ /* enable MMIO */ +/* svga_wcrt_mask(par->state.vgabase, 0x40, 0x08, 0x08); */ /* enable write buffer */ /* Set the offset register */ @@ -555,19 +555,19 @@ static int s3fb_set_par(struct fb_info *info) svga_wattr(par->state.vgabase, 0x33, 0x00); if (info->var.vmode & FB_VMODE_DOUBLE) - svga_wcrt_mask(0x09, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); else - svga_wcrt_mask(0x09, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); if (info->var.vmode & FB_VMODE_INTERLACED) - svga_wcrt_mask(0x42, 0x20, 0x20); + svga_wcrt_mask(par->state.vgabase, 0x42, 0x20, 0x20); else - svga_wcrt_mask(0x42, 0x00, 0x20); + svga_wcrt_mask(par->state.vgabase, 0x42, 0x00, 0x20); /* Disable hardware graphics cursor */ - svga_wcrt_mask(0x45, 0x00, 0x01); + svga_wcrt_mask(par->state.vgabase, 0x45, 0x00, 0x01); /* Disable Streams engine */ - svga_wcrt_mask(0x67, 0x00, 0x0C); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0x0C); mode = svga_match_format(s3fb_formats, &(info->var), &(info->fix)); @@ -596,7 +596,7 @@ static int s3fb_set_par(struct fb_info *info) vga_wcrt(NULL, 0x66, 0x81); } - svga_wcrt_mask(0x31, 0x00, 0x40); + svga_wcrt_mask(par->state.vgabase, 0x31, 0x00, 0x40); multiplex = 0; hmul = 1; @@ -607,15 +607,15 @@ static int s3fb_set_par(struct fb_info *info) svga_set_textmode_vga_regs(); /* Set additional registers like in 8-bit mode */ - svga_wcrt_mask(0x50, 0x00, 0x30); - svga_wcrt_mask(0x67, 0x00, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0); /* Disable enhanced mode */ - svga_wcrt_mask(0x3A, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); if (fasttext) { pr_debug("fb%d: high speed text mode set\n", info->node); - svga_wcrt_mask(0x31, 0x40, 0x40); + svga_wcrt_mask(par->state.vgabase, 0x31, 0x40, 0x40); } break; case 1: @@ -623,32 +623,32 @@ static int s3fb_set_par(struct fb_info *info) vga_wgfx(NULL, VGA_GFX_MODE, 0x40); /* Set additional registers like in 8-bit mode */ - svga_wcrt_mask(0x50, 0x00, 0x30); - svga_wcrt_mask(0x67, 0x00, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0); /* disable enhanced mode */ - svga_wcrt_mask(0x3A, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); break; case 2: pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); /* Set additional registers like in 8-bit mode */ - svga_wcrt_mask(0x50, 0x00, 0x30); - svga_wcrt_mask(0x67, 0x00, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0); /* disable enhanced mode */ - svga_wcrt_mask(0x3A, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30); break; case 3: pr_debug("fb%d: 8 bit pseudocolor\n", info->node); - svga_wcrt_mask(0x50, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); if (info->var.pixclock > 20000 || par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X) - svga_wcrt_mask(0x67, 0x00, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0); else { - svga_wcrt_mask(0x67, 0x10, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x10, 0xF0); multiplex = 1; } break; @@ -656,12 +656,12 @@ static int s3fb_set_par(struct fb_info *info) pr_debug("fb%d: 5/5/5 truecolor\n", info->node); if (par->chip == CHIP_988_VIRGE_VX) { if (info->var.pixclock > 20000) - svga_wcrt_mask(0x67, 0x20, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0); else - svga_wcrt_mask(0x67, 0x30, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0); } else { - svga_wcrt_mask(0x50, 0x10, 0x30); - svga_wcrt_mask(0x67, 0x30, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0); if (par->chip != CHIP_360_TRIO3D_1X && par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_368_TRIO3D_2X) @@ -672,12 +672,12 @@ static int s3fb_set_par(struct fb_info *info) pr_debug("fb%d: 5/6/5 truecolor\n", info->node); if (par->chip == CHIP_988_VIRGE_VX) { if (info->var.pixclock > 20000) - svga_wcrt_mask(0x67, 0x40, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0); else - svga_wcrt_mask(0x67, 0x50, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0); } else { - svga_wcrt_mask(0x50, 0x10, 0x30); - svga_wcrt_mask(0x67, 0x50, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0); if (par->chip != CHIP_360_TRIO3D_1X && par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_368_TRIO3D_2X) @@ -687,12 +687,12 @@ static int s3fb_set_par(struct fb_info *info) case 6: /* VIRGE VX case */ pr_debug("fb%d: 8/8/8 truecolor\n", info->node); - svga_wcrt_mask(0x67, 0xD0, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0); break; case 7: pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); - svga_wcrt_mask(0x50, 0x30, 0x30); - svga_wcrt_mask(0x67, 0xD0, 0xF0); + svga_wcrt_mask(par->state.vgabase, 0x50, 0x30, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0); break; default: printk(KERN_ERR "fb%d: unsupported mode - bug\n", info->node); @@ -717,7 +717,7 @@ static int s3fb_set_par(struct fb_info *info) memset_io(info->screen_base, 0x00, screen_size); /* Device and screen back on */ - svga_wcrt_mask(0x17, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); return 0; @@ -793,27 +793,27 @@ static int s3fb_blank(int blank_mode, struct fb_info *info) switch (blank_mode) { case FB_BLANK_UNBLANK: pr_debug("fb%d: unblank\n", info->node); - svga_wcrt_mask(0x56, 0x00, 0x06); + svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); break; case FB_BLANK_NORMAL: pr_debug("fb%d: blank\n", info->node); - svga_wcrt_mask(0x56, 0x00, 0x06); + svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_HSYNC_SUSPEND: pr_debug("fb%d: hsync\n", info->node); - svga_wcrt_mask(0x56, 0x02, 0x06); + svga_wcrt_mask(par->state.vgabase, 0x56, 0x02, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_VSYNC_SUSPEND: pr_debug("fb%d: vsync\n", info->node); - svga_wcrt_mask(0x56, 0x04, 0x06); + svga_wcrt_mask(par->state.vgabase, 0x56, 0x04, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_POWERDOWN: pr_debug("fb%d: sync down\n", info->node); - svga_wcrt_mask(0x56, 0x06, 0x06); + svga_wcrt_mask(par->state.vgabase, 0x56, 0x06, 0x06); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; } diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index ea7490490de6..3d07287e9322 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -130,9 +130,9 @@ void svga_set_default_seq_regs(void __iomem *regbase) void svga_set_default_crt_regs(void) { /* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */ - svga_wcrt_mask(0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ + svga_wcrt_mask(NULL, 0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ vga_wcrt(NULL, VGA_CRTC_PRESET_ROW, 0); - svga_wcrt_mask(VGA_CRTC_MAX_SCAN, 0, 0x1F); + svga_wcrt_mask(NULL, VGA_CRTC_MAX_SCAN, 0, 0x1F); vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0); vga_wcrt(NULL, VGA_CRTC_MODE, 0xE3); } @@ -145,7 +145,7 @@ void svga_set_textmode_vga_regs(void) vga_wcrt(NULL, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */ vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0x1f); - svga_wcrt_mask(VGA_CRTC_MODE, 0x23, 0x7f); + svga_wcrt_mask(NULL, VGA_CRTC_MODE, 0x23, 0x7f); vga_wcrt(NULL, VGA_CRTC_CURSOR_START, 0x0d); vga_wcrt(NULL, VGA_CRTC_CURSOR_END, 0x0e); @@ -310,7 +310,7 @@ void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) if (! cursor -> mode) return; - svga_wcrt_mask(0x0A, 0x20, 0x20); /* disable cursor */ + svga_wcrt_mask(NULL, 0x0A, 0x20, 0x20); /* disable cursor */ if (cursor -> shape == FB_TILE_CURSOR_NONE) return; diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index edcfee8bc90b..bc54b57db985 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -417,13 +417,13 @@ static int vt8623fb_set_par(struct fb_info *info) /* Unlock registers */ svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); - svga_wcrt_mask(0x11, 0x00, 0x80); - svga_wcrt_mask(0x47, 0x00, 0x01); + svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x47, 0x00, 0x01); /* Device, screen and sync off */ svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); - svga_wcrt_mask(0x36, 0x30, 0x30); - svga_wcrt_mask(0x17, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80); /* Set default values */ svga_set_default_gfx_regs(par->state.vgabase); @@ -437,13 +437,13 @@ static int vt8623fb_set_par(struct fb_info *info) svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value); /* Clear H/V Skew */ - svga_wcrt_mask(0x03, 0x00, 0x60); - svga_wcrt_mask(0x05, 0x00, 0x60); + svga_wcrt_mask(par->state.vgabase, 0x03, 0x00, 0x60); + svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60); if (info->var.vmode & FB_VMODE_DOUBLE) - svga_wcrt_mask(0x09, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80); else - svga_wcrt_mask(0x09, 0x00, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80); svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus @@ -468,18 +468,18 @@ static int vt8623fb_set_par(struct fb_info *info) pr_debug("fb%d: text mode\n", info->node); svga_set_textmode_vga_regs(); svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); - svga_wcrt_mask(0x11, 0x60, 0x70); + svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70); break; case 1: pr_debug("fb%d: 4 bit pseudocolor\n", info->node); vga_wgfx(NULL, VGA_GFX_MODE, 0x40); svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); - svga_wcrt_mask(0x11, 0x00, 0x70); + svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); break; case 2: pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); - svga_wcrt_mask(0x11, 0x00, 0x70); + svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70); break; case 3: pr_debug("fb%d: 8 bit pseudocolor\n", info->node); @@ -506,8 +506,8 @@ static int vt8623fb_set_par(struct fb_info *info) memset_io(info->screen_base, 0x00, screen_size); /* Device and screen back on */ - svga_wcrt_mask(0x17, 0x80, 0x80); - svga_wcrt_mask(0x36, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80); + svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); return 0; @@ -576,27 +576,27 @@ static int vt8623fb_blank(int blank_mode, struct fb_info *info) switch (blank_mode) { case FB_BLANK_UNBLANK: pr_debug("fb%d: unblank\n", info->node); - svga_wcrt_mask(0x36, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); break; case FB_BLANK_NORMAL: pr_debug("fb%d: blank\n", info->node); - svga_wcrt_mask(0x36, 0x00, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_HSYNC_SUSPEND: pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); - svga_wcrt_mask(0x36, 0x10, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_VSYNC_SUSPEND: pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); - svga_wcrt_mask(0x36, 0x20, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; case FB_BLANK_POWERDOWN: pr_debug("fb%d: DPMS off (no sync)\n", info->node); - svga_wcrt_mask(0x36, 0x30, 0x30); + svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); break; } diff --git a/include/linux/svga.h b/include/linux/svga.h index 93f7777b268a..5c5b41bddee4 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -83,9 +83,9 @@ static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 m /* Write a value to a CRT register with a mask */ -static inline void svga_wcrt_mask(u8 index, u8 data, u8 mask) +static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask) { - vga_wcrt(NULL, index, (data & mask) | (vga_rcrt(NULL, index) & ~mask)); + vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask)); } static inline int svga_primary_device(struct pci_dev *dev) -- cgit v1.2.3-70-g09d2 From 1d28fcadb0e277844ebffb528cdfd25d44591035 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:51:41 +0000 Subject: svga: Make svga_set_default_crt_regs() take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 2 +- drivers/video/s3fb.c | 2 +- drivers/video/svgalib.c | 12 ++++++------ drivers/video/vt8623fb.c | 2 +- include/linux/svga.h | 2 +- 5 files changed, 10 insertions(+), 10 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index f24151e01da3..51fd8affe0c7 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -656,7 +656,7 @@ static int arkfb_set_par(struct fb_info *info) svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(par->state.vgabase); svga_set_default_seq_regs(par->state.vgabase); - svga_set_default_crt_regs(); + svga_set_default_crt_regs(par->state.vgabase); svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index ece99f2044f4..a7a2463663c4 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -517,7 +517,7 @@ static int s3fb_set_par(struct fb_info *info) svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(par->state.vgabase); svga_set_default_seq_regs(par->state.vgabase); - svga_set_default_crt_regs(); + svga_set_default_crt_regs(par->state.vgabase); svga_wcrt_multi(par->state.vgabase, s3_line_compare_regs, 0xFFFFFFFF); svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0); diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 3d07287e9322..b0464977ed9b 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -127,14 +127,14 @@ void svga_set_default_seq_regs(void __iomem *regbase) } /* Set CRTC registers to sane values */ -void svga_set_default_crt_regs(void) +void svga_set_default_crt_regs(void __iomem *regbase) { /* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */ - svga_wcrt_mask(NULL, 0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ - vga_wcrt(NULL, VGA_CRTC_PRESET_ROW, 0); - svga_wcrt_mask(NULL, VGA_CRTC_MAX_SCAN, 0, 0x1F); - vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0); - vga_wcrt(NULL, VGA_CRTC_MODE, 0xE3); + svga_wcrt_mask(regbase, 0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ + vga_wcrt(regbase, VGA_CRTC_PRESET_ROW, 0); + svga_wcrt_mask(regbase, VGA_CRTC_MAX_SCAN, 0, 0x1F); + vga_wcrt(regbase, VGA_CRTC_UNDERLINE, 0); + vga_wcrt(regbase, VGA_CRTC_MODE, 0xE3); } void svga_set_textmode_vga_regs(void) diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index bc54b57db985..a2624a841ecc 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -429,7 +429,7 @@ static int vt8623fb_set_par(struct fb_info *info) svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_atc_regs(par->state.vgabase); svga_set_default_seq_regs(par->state.vgabase); - svga_set_default_crt_regs(); + svga_set_default_crt_regs(par->state.vgabase); svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); diff --git a/include/linux/svga.h b/include/linux/svga.h index 5c5b41bddee4..2a32dd55d1a0 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -102,7 +102,7 @@ void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 void svga_set_default_gfx_regs(void __iomem *regbase); void svga_set_default_atc_regs(void __iomem *regbase); void svga_set_default_seq_regs(void __iomem *regbase); -void svga_set_default_crt_regs(void); +void svga_set_default_crt_regs(void __iomem *regbase); void svga_set_textmode_vga_regs(void); void svga_settile(struct fb_info *info, struct fb_tilemap *map); -- cgit v1.2.3-70-g09d2 From 9c96394bb90f855d265116f37897294fa1bdb072 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:51:56 +0000 Subject: svga: Make svga_set_textmode_vga_regs() take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 2 +- drivers/video/s3fb.c | 2 +- drivers/video/svgalib.c | 40 ++++++++++++++++++++-------------------- drivers/video/vt8623fb.c | 2 +- include/linux/svga.h | 2 +- 5 files changed, 24 insertions(+), 24 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 51fd8affe0c7..658fff45332c 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -699,7 +699,7 @@ static int arkfb_set_par(struct fb_info *info) switch (mode) { case 0: pr_debug("fb%d: text mode\n", info->node); - svga_set_textmode_vga_regs(); + svga_set_textmode_vga_regs(par->state.vgabase); vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */ diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index a7a2463663c4..017219565800 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -604,7 +604,7 @@ static int s3fb_set_par(struct fb_info *info) switch (mode) { case 0: pr_debug("fb%d: text mode\n", info->node); - svga_set_textmode_vga_regs(); + svga_set_textmode_vga_regs(par->state.vgabase); /* Set additional registers like in 8-bit mode */ svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index b0464977ed9b..ecda90ec4056 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -137,33 +137,33 @@ void svga_set_default_crt_regs(void __iomem *regbase) vga_wcrt(regbase, VGA_CRTC_MODE, 0xE3); } -void svga_set_textmode_vga_regs(void) +void svga_set_textmode_vga_regs(void __iomem *regbase) { - /* svga_wseq_mask(NULL, 0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ - vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); - vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, 0x03); + /* svga_wseq_mask(regbase, 0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ + vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); + vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0x03); - vga_wcrt(NULL, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */ - vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0x1f); - svga_wcrt_mask(NULL, VGA_CRTC_MODE, 0x23, 0x7f); + vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */ + vga_wcrt(regbase, VGA_CRTC_UNDERLINE, 0x1f); + svga_wcrt_mask(regbase, VGA_CRTC_MODE, 0x23, 0x7f); - vga_wcrt(NULL, VGA_CRTC_CURSOR_START, 0x0d); - vga_wcrt(NULL, VGA_CRTC_CURSOR_END, 0x0e); - vga_wcrt(NULL, VGA_CRTC_CURSOR_HI, 0x00); - vga_wcrt(NULL, VGA_CRTC_CURSOR_LO, 0x00); + vga_wcrt(regbase, VGA_CRTC_CURSOR_START, 0x0d); + vga_wcrt(regbase, VGA_CRTC_CURSOR_END, 0x0e); + vga_wcrt(regbase, VGA_CRTC_CURSOR_HI, 0x00); + vga_wcrt(regbase, VGA_CRTC_CURSOR_LO, 0x00); - vga_wgfx(NULL, VGA_GFX_MODE, 0x10); /* Odd/even memory mode */ - vga_wgfx(NULL, VGA_GFX_MISC, 0x0E); /* Misc graphics register - text mode enable */ - vga_wgfx(NULL, VGA_GFX_COMPARE_MASK, 0x00); + vga_wgfx(regbase, VGA_GFX_MODE, 0x10); /* Odd/even memory mode */ + vga_wgfx(regbase, VGA_GFX_MISC, 0x0E); /* Misc graphics register - text mode enable */ + vga_wgfx(regbase, VGA_GFX_COMPARE_MASK, 0x00); - vga_r(NULL, 0x3DA); - vga_w(NULL, VGA_ATT_W, 0x00); + vga_r(regbase, 0x3DA); + vga_w(regbase, VGA_ATT_W, 0x00); - svga_wattr(NULL, 0x10, 0x0C); /* Attribute Mode Control Register - text mode, blinking and line graphics */ - svga_wattr(NULL, 0x13, 0x08); /* Horizontal Pixel Panning Register */ + svga_wattr(regbase, 0x10, 0x0C); /* Attribute Mode Control Register - text mode, blinking and line graphics */ + svga_wattr(regbase, 0x13, 0x08); /* Horizontal Pixel Panning Register */ - vga_r(NULL, 0x3DA); - vga_w(NULL, VGA_ATT_W, 0x20); + vga_r(regbase, 0x3DA); + vga_w(regbase, VGA_ATT_W, 0x20); } #if 0 diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index a2624a841ecc..e3bb7c5b1bd5 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -466,7 +466,7 @@ static int vt8623fb_set_par(struct fb_info *info) switch (mode) { case 0: pr_debug("fb%d: text mode\n", info->node); - svga_set_textmode_vga_regs(); + svga_set_textmode_vga_regs(par->state.vgabase); svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70); break; diff --git a/include/linux/svga.h b/include/linux/svga.h index 2a32dd55d1a0..767937d362d1 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -103,7 +103,7 @@ void svga_set_default_gfx_regs(void __iomem *regbase); void svga_set_default_atc_regs(void __iomem *regbase); void svga_set_default_seq_regs(void __iomem *regbase); void svga_set_default_crt_regs(void __iomem *regbase); -void svga_set_textmode_vga_regs(void); +void svga_set_textmode_vga_regs(void __iomem *regbase); void svga_settile(struct fb_info *info, struct fb_tilemap *map); void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area); -- cgit v1.2.3-70-g09d2 From 55db092388455457791cf00216b6b3965a8071f8 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:52:11 +0000 Subject: svga: Make svga_tilecursor() take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 9 ++++++++- drivers/video/s3fb.c | 11 +++++++++-- drivers/video/svgalib.c | 12 ++++++------ drivers/video/vt8623fb.c | 8 +++++++- include/linux/svga.h | 2 +- 5 files changed, 31 insertions(+), 11 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 658fff45332c..a4cfcf99ceb6 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -158,12 +158,19 @@ static void arkfb_settile(struct fb_info *info, struct fb_tilemap *map) } } +static void arkfb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) +{ + struct arkfb_info *par = info->par; + + svga_tilecursor(par->state.vgabase, info, cursor); +} + static struct fb_tile_ops arkfb_tile_ops = { .fb_settile = arkfb_settile, .fb_tilecopy = svga_tilecopy, .fb_tilefill = svga_tilefill, .fb_tileblit = svga_tileblit, - .fb_tilecursor = svga_tilecursor, + .fb_tilecursor = arkfb_tilecursor, .fb_get_tilemax = svga_get_tilemax, }; diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 017219565800..be3802e8108a 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -188,12 +188,19 @@ static void s3fb_settile_fast(struct fb_info *info, struct fb_tilemap *map) } } +static void s3fb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) +{ + struct s3fb_info *par = info->par; + + svga_tilecursor(par->state.vgabase, info, cursor); +} + static struct fb_tile_ops s3fb_tile_ops = { .fb_settile = svga_settile, .fb_tilecopy = svga_tilecopy, .fb_tilefill = svga_tilefill, .fb_tileblit = svga_tileblit, - .fb_tilecursor = svga_tilecursor, + .fb_tilecursor = s3fb_tilecursor, .fb_get_tilemax = svga_get_tilemax, }; @@ -202,7 +209,7 @@ static struct fb_tile_ops s3fb_fast_tile_ops = { .fb_tilecopy = svga_tilecopy, .fb_tilefill = svga_tilefill, .fb_tileblit = svga_tileblit, - .fb_tilecursor = svga_tilecursor, + .fb_tilecursor = s3fb_tilecursor, .fb_get_tilemax = svga_get_tilemax, }; diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index ecda90ec4056..4876be85ecfd 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -299,7 +299,7 @@ void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit) } /* Set cursor in text (tileblit) mode */ -void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) +void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor) { u8 cs = 0x0d; u8 ce = 0x0e; @@ -310,7 +310,7 @@ void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) if (! cursor -> mode) return; - svga_wcrt_mask(NULL, 0x0A, 0x20, 0x20); /* disable cursor */ + svga_wcrt_mask(regbase, 0x0A, 0x20, 0x20); /* disable cursor */ if (cursor -> shape == FB_TILE_CURSOR_NONE) return; @@ -334,11 +334,11 @@ void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) } /* set cursor position */ - vga_wcrt(NULL, 0x0E, pos >> 8); - vga_wcrt(NULL, 0x0F, pos & 0xFF); + vga_wcrt(regbase, 0x0E, pos >> 8); + vga_wcrt(regbase, 0x0F, pos & 0xFF); - vga_wcrt(NULL, 0x0B, ce); /* set cursor end */ - vga_wcrt(NULL, 0x0A, cs); /* set cursor start and enable it */ + vga_wcrt(regbase, 0x0B, ce); /* set cursor end */ + vga_wcrt(regbase, 0x0A, cs); /* set cursor start and enable it */ } int svga_get_tilemax(struct fb_info *info) diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index e3bb7c5b1bd5..cedac002fa4b 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -121,13 +121,19 @@ MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, d /* ------------------------------------------------------------------------- */ +static void vt8623fb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) +{ + struct vt8623fb_info *par = info->par; + + svga_tilecursor(par->state.vgabase, info, cursor); +} static struct fb_tile_ops vt8623fb_tile_ops = { .fb_settile = svga_settile, .fb_tilecopy = svga_tilecopy, .fb_tilefill = svga_tilefill, .fb_tileblit = svga_tileblit, - .fb_tilecursor = svga_tilecursor, + .fb_tilecursor = vt8623fb_tilecursor, .fb_get_tilemax = svga_get_tilemax, }; diff --git a/include/linux/svga.h b/include/linux/svga.h index 767937d362d1..87879500f75b 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -109,7 +109,7 @@ void svga_settile(struct fb_info *info, struct fb_tilemap *map); void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area); void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect); void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit); -void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor); +void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor); int svga_get_tilemax(struct fb_info *info); void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps, struct fb_var_screeninfo *var); -- cgit v1.2.3-70-g09d2 From 38d2620ea40c2f9a5f17d6488bf004973570279c Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:52:25 +0000 Subject: svga: Make svga_set_timings() take an iomem regbase pointer. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/arkfb.c | 2 +- drivers/video/s3fb.c | 2 +- drivers/video/svgalib.c | 33 +++++++++++++++++---------------- drivers/video/vt8623fb.c | 2 +- include/linux/svga.h | 2 +- 5 files changed, 21 insertions(+), 20 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index a4cfcf99ceb6..aded91b42c76 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c @@ -781,7 +781,7 @@ static int arkfb_set_par(struct fb_info *info) } ark_set_pixclock(info, (hdiv * info->var.pixclock) / hmul); - svga_set_timings(&ark_timing_regs, &(info->var), hmul, hdiv, + svga_set_timings(par->state.vgabase, &ark_timing_regs, &(info->var), hmul, hdiv, (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, (info->var.vmode & FB_VMODE_INTERLACED) ? 2 : 1, hmul, info->node); diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index be3802e8108a..23e4724bd439 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -712,7 +712,7 @@ static int s3fb_set_par(struct fb_info *info) } s3_set_pixclock(info, info->var.pixclock); - svga_set_timings(&s3_timing_regs, &(info->var), hmul, 1, + svga_set_timings(par->state.vgabase, &s3_timing_regs, &(info->var), hmul, 1, (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, (info->var.vmode & FB_VMODE_INTERLACED) ? 2 : 1, hmul, info->node); diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 4876be85ecfd..33df9ec91795 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c @@ -507,8 +507,9 @@ int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screenin } /* Set CRT timing registers */ -void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, - u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) +void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, + struct fb_var_screeninfo *var, + u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) { u8 regval; u32 value; @@ -516,66 +517,66 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf value = var->xres + var->left_margin + var->right_margin + var->hsync_len; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal total : %d\n", node, value); - svga_wcrt_multi(NULL, tm->h_total_regs, (value / 8) - 5); + svga_wcrt_multi(regbase, tm->h_total_regs, (value / 8) - 5); value = var->xres; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal display : %d\n", node, value); - svga_wcrt_multi(NULL, tm->h_display_regs, (value / 8) - 1); + svga_wcrt_multi(regbase, tm->h_display_regs, (value / 8) - 1); value = var->xres; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal blank start: %d\n", node, value); - svga_wcrt_multi(NULL, tm->h_blank_start_regs, (value / 8) - 1 + hborder); + svga_wcrt_multi(regbase, tm->h_blank_start_regs, (value / 8) - 1 + hborder); value = var->xres + var->left_margin + var->right_margin + var->hsync_len; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal blank end : %d\n", node, value); - svga_wcrt_multi(NULL, tm->h_blank_end_regs, (value / 8) - 1 - hborder); + svga_wcrt_multi(regbase, tm->h_blank_end_regs, (value / 8) - 1 - hborder); value = var->xres + var->right_margin; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal sync start : %d\n", node, value); - svga_wcrt_multi(NULL, tm->h_sync_start_regs, (value / 8)); + svga_wcrt_multi(regbase, tm->h_sync_start_regs, (value / 8)); value = var->xres + var->right_margin + var->hsync_len; value = (value * hmul) / hdiv; pr_debug("fb%d: horizontal sync end : %d\n", node, value); - svga_wcrt_multi(NULL, tm->h_sync_end_regs, (value / 8)); + svga_wcrt_multi(regbase, tm->h_sync_end_regs, (value / 8)); value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical total : %d\n", node, value); - svga_wcrt_multi(NULL, tm->v_total_regs, value - 2); + svga_wcrt_multi(regbase, tm->v_total_regs, value - 2); value = var->yres; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical display : %d\n", node, value); - svga_wcrt_multi(NULL, tm->v_display_regs, value - 1); + svga_wcrt_multi(regbase, tm->v_display_regs, value - 1); value = var->yres; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical blank start : %d\n", node, value); - svga_wcrt_multi(NULL, tm->v_blank_start_regs, value); + svga_wcrt_multi(regbase, tm->v_blank_start_regs, value); value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical blank end : %d\n", node, value); - svga_wcrt_multi(NULL, tm->v_blank_end_regs, value - 2); + svga_wcrt_multi(regbase, tm->v_blank_end_regs, value - 2); value = var->yres + var->lower_margin; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical sync start : %d\n", node, value); - svga_wcrt_multi(NULL, tm->v_sync_start_regs, value); + svga_wcrt_multi(regbase, tm->v_sync_start_regs, value); value = var->yres + var->lower_margin + var->vsync_len; value = (value * vmul) / vdiv; pr_debug("fb%d: vertical sync end : %d\n", node, value); - svga_wcrt_multi(NULL, tm->v_sync_end_regs, value); + svga_wcrt_multi(regbase, tm->v_sync_end_regs, value); /* Set horizontal and vertical sync pulse polarity in misc register */ - regval = vga_r(NULL, VGA_MIS_R); + regval = vga_r(regbase, VGA_MIS_R); if (var->sync & FB_SYNC_HOR_HIGH_ACT) { pr_debug("fb%d: positive horizontal sync\n", node); regval = regval & ~0x80; @@ -590,7 +591,7 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf pr_debug("fb%d: negative vertical sync\n\n", node); regval = regval | 0x40; } - vga_w(NULL, VGA_MIS_W, regval); + vga_w(regbase, VGA_MIS_W, regval); } diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index cedac002fa4b..4764fb2fffc0 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c @@ -505,7 +505,7 @@ static int vt8623fb_set_par(struct fb_info *info) } vt8623_set_pixclock(info, info->var.pixclock); - svga_set_timings(&vt8623_timing_regs, &(info->var), 1, 1, + svga_set_timings(par->state.vgabase, &vt8623_timing_regs, &(info->var), 1, 1, (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, 1, info->node); diff --git a/include/linux/svga.h b/include/linux/svga.h index 87879500f75b..bfa68e837d6a 100644 --- a/include/linux/svga.h +++ b/include/linux/svga.h @@ -116,7 +116,7 @@ void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps, int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node); int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node); -void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node); +void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node); int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix); -- cgit v1.2.3-70-g09d2 From f8645933513c65ac55f23c63b2649097289795c6 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:52:57 +0000 Subject: s3fb: Pass par->state.vgabase to vga_*() calls. Instead of just plain NULL. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 102 ++++++++++++++++++++++++++------------------------- 1 file changed, 52 insertions(+), 50 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 23e4724bd439..262490a74bb7 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -348,26 +348,26 @@ static void s3_set_pixclock(struct fb_info *info, u32 pixclock) } /* Set VGA misc register */ - regval = vga_r(NULL, VGA_MIS_R); - vga_w(NULL, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); + regval = vga_r(par->state.vgabase, VGA_MIS_R); + vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); /* Set S3 clock registers */ if (par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X) { - vga_wseq(NULL, 0x12, (n - 2) | ((r & 3) << 6)); /* n and two bits of r */ - vga_wseq(NULL, 0x29, r >> 2); /* remaining highest bit of r */ + vga_wseq(par->state.vgabase, 0x12, (n - 2) | ((r & 3) << 6)); /* n and two bits of r */ + vga_wseq(par->state.vgabase, 0x29, r >> 2); /* remaining highest bit of r */ } else - vga_wseq(NULL, 0x12, (n - 2) | (r << 5)); - vga_wseq(NULL, 0x13, m - 2); + vga_wseq(par->state.vgabase, 0x12, (n - 2) | (r << 5)); + vga_wseq(par->state.vgabase, 0x13, m - 2); udelay(1000); /* Activate clock - write 0, 1, 0 to seq/15 bit 5 */ - regval = vga_rseq (NULL, 0x15); /* | 0x80; */ - vga_wseq(NULL, 0x15, regval & ~(1<<5)); - vga_wseq(NULL, 0x15, regval | (1<<5)); - vga_wseq(NULL, 0x15, regval & ~(1<<5)); + regval = vga_rseq (par->state.vgabase, 0x15); /* | 0x80; */ + vga_wseq(par->state.vgabase, 0x15, regval & ~(1<<5)); + vga_wseq(par->state.vgabase, 0x15, regval | (1<<5)); + vga_wseq(par->state.vgabase, 0x15, regval & ~(1<<5)); } @@ -511,9 +511,9 @@ static int s3fb_set_par(struct fb_info *info) info->var.activate = FB_ACTIVATE_NOW; /* Unlock registers */ - vga_wcrt(NULL, 0x38, 0x48); - vga_wcrt(NULL, 0x39, 0xA5); - vga_wseq(NULL, 0x08, 0x06); + vga_wcrt(par->state.vgabase, 0x38, 0x48); + vga_wcrt(par->state.vgabase, 0x39, 0xA5); + vga_wseq(par->state.vgabase, 0x08, 0x06); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); /* Blank screen and turn off sync */ @@ -552,13 +552,13 @@ static int s3fb_set_par(struct fb_info *info) if (par->chip != CHIP_360_TRIO3D_1X && par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_368_TRIO3D_2X) { - vga_wcrt(NULL, 0x54, 0x18); /* M parameter */ - vga_wcrt(NULL, 0x60, 0xff); /* N parameter */ - vga_wcrt(NULL, 0x61, 0xff); /* L parameter */ - vga_wcrt(NULL, 0x62, 0xff); /* L parameter */ + vga_wcrt(par->state.vgabase, 0x54, 0x18); /* M parameter */ + vga_wcrt(par->state.vgabase, 0x60, 0xff); /* N parameter */ + vga_wcrt(par->state.vgabase, 0x61, 0xff); /* L parameter */ + vga_wcrt(par->state.vgabase, 0x62, 0xff); /* L parameter */ } - vga_wcrt(NULL, 0x3A, 0x35); + vga_wcrt(par->state.vgabase, 0x3A, 0x35); svga_wattr(par->state.vgabase, 0x33, 0x00); if (info->var.vmode & FB_VMODE_DOUBLE) @@ -580,27 +580,27 @@ static int s3fb_set_par(struct fb_info *info) /* S3 virge DX hack */ if (par->chip == CHIP_375_VIRGE_DX) { - vga_wcrt(NULL, 0x86, 0x80); - vga_wcrt(NULL, 0x90, 0x00); + vga_wcrt(par->state.vgabase, 0x86, 0x80); + vga_wcrt(par->state.vgabase, 0x90, 0x00); } /* S3 virge VX hack */ if (par->chip == CHIP_988_VIRGE_VX) { - vga_wcrt(NULL, 0x50, 0x00); - vga_wcrt(NULL, 0x67, 0x50); + vga_wcrt(par->state.vgabase, 0x50, 0x00); + vga_wcrt(par->state.vgabase, 0x67, 0x50); - vga_wcrt(NULL, 0x63, (mode <= 2) ? 0x90 : 0x09); - vga_wcrt(NULL, 0x66, 0x90); + vga_wcrt(par->state.vgabase, 0x63, (mode <= 2) ? 0x90 : 0x09); + vga_wcrt(par->state.vgabase, 0x66, 0x90); } if (par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X) { dbytes = info->var.xres * ((bpp+7)/8); - vga_wcrt(NULL, 0x91, (dbytes + 7) / 8); - vga_wcrt(NULL, 0x90, (((dbytes + 7) / 8) >> 8) | 0x80); + vga_wcrt(par->state.vgabase, 0x91, (dbytes + 7) / 8); + vga_wcrt(par->state.vgabase, 0x90, (((dbytes + 7) / 8) >> 8) | 0x80); - vga_wcrt(NULL, 0x66, 0x81); + vga_wcrt(par->state.vgabase, 0x66, 0x81); } svga_wcrt_mask(par->state.vgabase, 0x31, 0x00, 0x40); @@ -627,7 +627,7 @@ static int s3fb_set_par(struct fb_info *info) break; case 1: pr_debug("fb%d: 4 bit pseudocolor\n", info->node); - vga_wgfx(NULL, VGA_GFX_MODE, 0x40); + vga_wgfx(par->state.vgabase, VGA_GFX_MODE, 0x40); /* Set additional registers like in 8-bit mode */ svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); @@ -720,7 +720,7 @@ static int s3fb_set_par(struct fb_info *info) /* Set interlaced mode start/end register */ value = info->var.xres + info->var.left_margin + info->var.right_margin + info->var.hsync_len; value = ((value * hmul) / 8) - 5; - vga_wcrt(NULL, 0x3C, (value + 1) / 2); + vga_wcrt(par->state.vgabase, 0x3C, (value + 1) / 2); memset_io(info->screen_base, 0x00, screen_size); /* Device and screen back on */ @@ -873,12 +873,14 @@ static struct fb_ops s3fb_ops = { /* ------------------------------------------------------------------------- */ -static int __devinit s3_identification(int chip) +static int __devinit s3_identification(struct s3fb_info *par) { + int chip = par->chip; + if (chip == CHIP_XXX_TRIO) { - u8 cr30 = vga_rcrt(NULL, 0x30); - u8 cr2e = vga_rcrt(NULL, 0x2e); - u8 cr2f = vga_rcrt(NULL, 0x2f); + u8 cr30 = vga_rcrt(par->state.vgabase, 0x30); + u8 cr2e = vga_rcrt(par->state.vgabase, 0x2e); + u8 cr2f = vga_rcrt(par->state.vgabase, 0x2f); if ((cr30 == 0xE0) || (cr30 == 0xE1)) { if (cr2e == 0x10) @@ -893,7 +895,7 @@ static int __devinit s3_identification(int chip) } if (chip == CHIP_XXX_TRIO64V2_DXGX) { - u8 cr6f = vga_rcrt(NULL, 0x6f); + u8 cr6f = vga_rcrt(par->state.vgabase, 0x6f); if (! (cr6f & 0x01)) return CHIP_775_TRIO64V2_DX; @@ -902,7 +904,7 @@ static int __devinit s3_identification(int chip) } if (chip == CHIP_XXX_VIRGE_DXGX) { - u8 cr6f = vga_rcrt(NULL, 0x6f); + u8 cr6f = vga_rcrt(par->state.vgabase, 0x6f); if (! (cr6f & 0x01)) return CHIP_375_VIRGE_DX; @@ -911,7 +913,7 @@ static int __devinit s3_identification(int chip) } if (chip == CHIP_36X_TRIO3D_1X_2X) { - switch (vga_rcrt(NULL, 0x2f)) { + switch (vga_rcrt(par->state.vgabase, 0x2f)) { case 0x00: return CHIP_360_TRIO3D_1X; case 0x01: @@ -979,21 +981,21 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i } /* Unlock regs */ - cr38 = vga_rcrt(NULL, 0x38); - cr39 = vga_rcrt(NULL, 0x39); - vga_wseq(NULL, 0x08, 0x06); - vga_wcrt(NULL, 0x38, 0x48); - vga_wcrt(NULL, 0x39, 0xA5); + cr38 = vga_rcrt(par->state.vgabase, 0x38); + cr39 = vga_rcrt(par->state.vgabase, 0x39); + vga_wseq(par->state.vgabase, 0x08, 0x06); + vga_wcrt(par->state.vgabase, 0x38, 0x48); + vga_wcrt(par->state.vgabase, 0x39, 0xA5); /* Identify chip type */ par->chip = id->driver_data & CHIP_MASK; - par->rev = vga_rcrt(NULL, 0x2f); + par->rev = vga_rcrt(par->state.vgabase, 0x2f); if (par->chip & CHIP_UNDECIDED_FLAG) - par->chip = s3_identification(par->chip); + par->chip = s3_identification(par); /* Find how many physical memory there is on card */ /* 0x36 register is accessible even if other registers are locked */ - regval = vga_rcrt(NULL, 0x36); + regval = vga_rcrt(par->state.vgabase, 0x36); if (par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X) { @@ -1012,13 +1014,13 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i info->fix.smem_len = info->screen_size; /* Find MCLK frequency */ - regval = vga_rseq(NULL, 0x10); - par->mclk_freq = ((vga_rseq(NULL, 0x11) + 2) * 14318) / ((regval & 0x1F) + 2); + regval = vga_rseq(par->state.vgabase, 0x10); + par->mclk_freq = ((vga_rseq(par->state.vgabase, 0x11) + 2) * 14318) / ((regval & 0x1F) + 2); par->mclk_freq = par->mclk_freq >> (regval >> 5); /* Restore locks */ - vga_wcrt(NULL, 0x38, cr38); - vga_wcrt(NULL, 0x39, cr39); + vga_wcrt(par->state.vgabase, 0x38, cr38); + vga_wcrt(par->state.vgabase, 0x39, cr39); strcpy(info->fix.id, s3_names [par->chip]); info->fix.mmio_start = 0; @@ -1054,8 +1056,8 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i if (par->chip == CHIP_UNKNOWN) printk(KERN_INFO "fb%d: unknown chip, CR2D=%x, CR2E=%x, CRT2F=%x, CRT30=%x\n", - info->node, vga_rcrt(NULL, 0x2d), vga_rcrt(NULL, 0x2e), - vga_rcrt(NULL, 0x2f), vga_rcrt(NULL, 0x30)); + info->node, vga_rcrt(par->state.vgabase, 0x2d), vga_rcrt(par->state.vgabase, 0x2e), + vga_rcrt(par->state.vgabase, 0x2f), vga_rcrt(par->state.vgabase, 0x30)); /* Record a reference to the driver data */ pci_set_drvdata(dev, info); -- cgit v1.2.3-70-g09d2 From 3ff259f2ed21e4438dc7937348710397e5ebd71e Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:53:53 +0000 Subject: s3fb: Don't clobber par->state.vgabase during open method. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 262490a74bb7..b2286f916b5d 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -379,7 +379,10 @@ static int s3fb_open(struct fb_info *info, int user) mutex_lock(&(par->open_lock)); if (par->ref_count == 0) { + void __iomem *vgabase = par->state.vgabase; + memset(&(par->state), 0, sizeof(struct vgastate)); + par->state.vgabase = vgabase; par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; par->state.num_crtc = 0x70; par->state.num_seq = 0x20; -- cgit v1.2.3-70-g09d2 From 94c322c30bd14ae6cdd369cb4a1f94c5c3809ac9 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 11 Jan 2011 23:54:21 +0000 Subject: s3fb: Compute VGA base iomem pointer explicitly. This allows the driver to work in multi-domain PCI configurations. Signed-off-by: David S. Miller Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index b2286f916b5d..55a94b94a326 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -934,6 +934,8 @@ static int __devinit s3_identification(struct s3fb_info *par) static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { + struct pci_bus_region bus_reg; + struct resource vga_res; struct fb_info *info; struct s3fb_info *par; int rc; @@ -983,6 +985,15 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i goto err_iomap; } + bus_reg.start = 0; + bus_reg.end = 64 * 1024; + + vga_res.flags = IORESOURCE_IO; + + pcibios_bus_to_resource(dev, &vga_res, &bus_reg); + + par->state.vgabase = (void __iomem *) vga_res.start; + /* Unlock regs */ cr38 = vga_rcrt(par->state.vgabase, 0x38); cr39 = vga_rcrt(par->state.vgabase, 0x39); -- cgit v1.2.3-70-g09d2 From 99d054d8253b1dbc6ab2d4ebcb25ad4a4e6ba1c8 Mon Sep 17 00:00:00 2001 From: Ondrej Zary Date: Tue, 1 Mar 2011 19:18:08 +0000 Subject: s3fb: maximize virtual vertical size for fast scrolling Maximize virtual vertical framebuffer size during init to allow fast scrolling (accelerated by panning). Signed-off-by: Ondrej Zary Acked-by: Ondrej Zajicek Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 55a94b94a326..9f9be9f37f2e 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -1053,6 +1053,14 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i goto err_find_mode; } + /* maximize virtual vertical size for fast scrolling */ + info->var.yres_virtual = info->fix.smem_len * 8 / + (info->var.bits_per_pixel * info->var.xres_virtual); + if (info->var.yres_virtual < info->var.yres) { + dev_err(info->device, "virtual vertical size smaller than real\n"); + goto err_find_mode; + } + rc = fb_alloc_cmap(&info->cmap, 256, 0); if (rc < 0) { dev_err(info->device, "cannot allocate colormap\n"); -- cgit v1.2.3-70-g09d2 From 5694f9ce5801d58bfc1b011592a5e460cc0a274b Mon Sep 17 00:00:00 2001 From: Ondrej Zary Date: Tue, 1 Mar 2011 19:18:17 +0000 Subject: s3fb: add support for 86C365 Trio3D Add support for S3 Trio3D (86C365) cards to s3fb driver. Tested with one 4MB card. Signed-off-by: Ondrej Zary Acked-by: Ondrej Zajicek Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 9f9be9f37f2e..be12145681f6 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -64,6 +64,8 @@ static const struct svga_fb_format s3fb_formats[] = { static const struct svga_pll s3_pll = {3, 129, 3, 33, 0, 3, 35000, 240000, 14318}; +static const struct svga_pll s3_trio3d_pll = {3, 129, 3, 31, 0, 4, + 230000, 460000, 14318}; static const int s3_memsizes[] = {4096, 0, 3072, 8192, 2048, 6144, 1024, 512}; @@ -72,7 +74,8 @@ static const char * const s3_names[] = {"S3 Unknown", "S3 Trio32", "S3 Trio64", "S3 Plato/PX", "S3 Aurora64VP", "S3 Virge", "S3 Virge/VX", "S3 Virge/DX", "S3 Virge/GX", "S3 Virge/GX2", "S3 Virge/GX2P", "S3 Virge/GX2P", - "S3 Trio3D/1X", "S3 Trio3D/2X", "S3 Trio3D/2X"}; + "S3 Trio3D/1X", "S3 Trio3D/2X", "S3 Trio3D/2X", + "S3 Trio3D"}; #define CHIP_UNKNOWN 0x00 #define CHIP_732_TRIO32 0x01 @@ -93,6 +96,7 @@ static const char * const s3_names[] = {"S3 Unknown", "S3 Trio32", "S3 Trio64", #define CHIP_360_TRIO3D_1X 0x10 #define CHIP_362_TRIO3D_2X 0x11 #define CHIP_368_TRIO3D_2X 0x12 +#define CHIP_365_TRIO3D 0x13 #define CHIP_XXX_TRIO 0x80 #define CHIP_XXX_TRIO64V2_DXGX 0x81 @@ -341,7 +345,8 @@ static void s3_set_pixclock(struct fb_info *info, u32 pixclock) u8 regval; int rv; - rv = svga_compute_pll(&s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node); + rv = svga_compute_pll((par->chip == CHIP_365_TRIO3D) ? &s3_trio3d_pll : &s3_pll, + 1000000000 / pixclock, &m, &n, &r, info->node); if (rv < 0) { printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node); return; @@ -598,7 +603,8 @@ static int s3fb_set_par(struct fb_info *info) if (par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || - par->chip == CHIP_368_TRIO3D_2X) { + par->chip == CHIP_368_TRIO3D_2X || + par->chip == CHIP_365_TRIO3D) { dbytes = info->var.xres * ((bpp+7)/8); vga_wcrt(par->state.vgabase, 0x91, (dbytes + 7) / 8); vga_wcrt(par->state.vgabase, 0x90, (((dbytes + 7) / 8) >> 8) | 0x80); @@ -1012,13 +1018,15 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i regval = vga_rcrt(par->state.vgabase, 0x36); if (par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || - par->chip == CHIP_368_TRIO3D_2X) { + par->chip == CHIP_368_TRIO3D_2X || + par->chip == CHIP_365_TRIO3D) { switch ((regval & 0xE0) >> 5) { case 0: /* 8MB -- only 4MB usable for display */ case 1: /* 4MB with 32-bit bus */ case 2: /* 4MB */ info->screen_size = 4 << 20; break; + case 4: /* 2MB on 365 Trio3D */ case 6: /* 2MB */ info->screen_size = 2 << 20; break; @@ -1226,6 +1234,7 @@ static struct pci_device_id s3_devices[] __devinitdata = { {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A11), .driver_data = CHIP_357_VIRGE_GX2P}, {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A12), .driver_data = CHIP_359_VIRGE_GX2P}, {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A13), .driver_data = CHIP_36X_TRIO3D_1X_2X}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8904), .driver_data = CHIP_365_TRIO3D}, {0, 0, 0, 0, 0, 0, 0} }; -- cgit v1.2.3-70-g09d2 From 3827d10ed4278323b75bf25d09c146c050519254 Mon Sep 17 00:00:00 2001 From: Ondrej Zary Date: Tue, 1 Mar 2011 19:18:27 +0000 Subject: s3fb: fix 15/16bpp modes with over 115MHz pixclocks on 86C365 Trio3D Enable pixel multiplexing in 15/16bpp modes when pixclock is over 115MHz on Trio3D (86C365) cards to fix artifacts on the left side of screen. Signed-off-by: Ondrej Zary Acked-by: Ondrej Zajicek Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index be12145681f6..7b8fdc6d9d55 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -675,6 +675,15 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0); else svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0); + } else if (par->chip == CHIP_365_TRIO3D) { + svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); + if (info->var.pixclock > 8695) { + svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0); + hmul = 2; + } else { + svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0); + multiplex = 1; + } } else { svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0); @@ -691,6 +700,15 @@ static int s3fb_set_par(struct fb_info *info) svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0); else svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0); + } else if (par->chip == CHIP_365_TRIO3D) { + svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); + if (info->var.pixclock > 8695) { + svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0); + hmul = 2; + } else { + svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0); + multiplex = 1; + } } else { svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0); -- cgit v1.2.3-70-g09d2 From cb11c048928b519548dbfb7da149dd2521500db0 Mon Sep 17 00:00:00 2001 From: Ondrej Zary Date: Tue, 1 Mar 2011 19:18:35 +0000 Subject: s3fb: enable DTPC Enable Data Transfer Position Control (DTPC). This is needed at least on Virge/DX to correctly display at higher pixclocks. Signed-off-by: Ondrej Zary Acked-by: Ondrej Zajicek Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 7b8fdc6d9d55..808db19aa5de 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -126,6 +126,8 @@ static const struct vga_regset s3_line_compare_regs[] = {{0x18, 0, 7}, {0x07, static const struct vga_regset s3_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x31, 4, 5}, {0x51, 0, 1}, VGA_REGSET_END}; static const struct vga_regset s3_offset_regs[] = {{0x13, 0, 7}, {0x51, 4, 5}, VGA_REGSET_END}; /* set 0x43 bit 2 to 0 */ +static const struct vga_regset s3_dtpc_regs[] = {{0x3B, 0, 7}, {0x5D, 6, 6}, VGA_REGSET_END}; + static const struct svga_timing_regs s3_timing_regs = { s3_h_total_regs, s3_h_display_regs, s3_h_blank_start_regs, s3_h_blank_end_regs, s3_h_sync_start_regs, s3_h_sync_end_regs, @@ -485,6 +487,7 @@ static int s3fb_set_par(struct fb_info *info) struct s3fb_info *par = info->par; u32 value, mode, hmul, offset_value, screen_size, multiplex, dbytes; u32 bpp = info->var.bits_per_pixel; + u32 htotal, hsstart; if (bpp != 0) { info->fix.ypanstep = 1; @@ -604,7 +607,9 @@ static int s3fb_set_par(struct fb_info *info) if (par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X || - par->chip == CHIP_365_TRIO3D) { + par->chip == CHIP_365_TRIO3D || + par->chip == CHIP_375_VIRGE_DX || + par->chip == CHIP_385_VIRGE_GX) { dbytes = info->var.xres * ((bpp+7)/8); vga_wcrt(par->state.vgabase, 0x91, (dbytes + 7) / 8); vga_wcrt(par->state.vgabase, 0x90, (((dbytes + 7) / 8) >> 8) | 0x80); @@ -612,6 +617,16 @@ static int s3fb_set_par(struct fb_info *info) vga_wcrt(par->state.vgabase, 0x66, 0x81); } + if (par->chip == CHIP_356_VIRGE_GX2 || + par->chip == CHIP_357_VIRGE_GX2P || + par->chip == CHIP_359_VIRGE_GX2P || + par->chip == CHIP_360_TRIO3D_1X || + par->chip == CHIP_362_TRIO3D_2X || + par->chip == CHIP_368_TRIO3D_2X) + vga_wcrt(par->state.vgabase, 0x34, 0x00); + else /* enable Data Transfer Position Control (DTPC) */ + vga_wcrt(par->state.vgabase, 0x34, 0x10); + svga_wcrt_mask(par->state.vgabase, 0x31, 0x00, 0x40); multiplex = 0; hmul = 1; @@ -745,9 +760,14 @@ static int s3fb_set_par(struct fb_info *info) hmul, info->node); /* Set interlaced mode start/end register */ - value = info->var.xres + info->var.left_margin + info->var.right_margin + info->var.hsync_len; - value = ((value * hmul) / 8) - 5; - vga_wcrt(par->state.vgabase, 0x3C, (value + 1) / 2); + htotal = info->var.xres + info->var.left_margin + info->var.right_margin + info->var.hsync_len; + htotal = ((htotal * hmul) / 8) - 5; + vga_wcrt(par->state.vgabase, 0x3C, (htotal + 1) / 2); + + /* Set Data Transfer Position */ + hsstart = ((info->var.xres + info->var.right_margin) * hmul) / 8; + value = clamp((htotal + hsstart + 1) / 2, hsstart + 4, htotal + 1); + svga_wcrt_multi(par->state.vgabase, s3_dtpc_regs, value); memset_io(info->screen_base, 0x00, screen_size); /* Device and screen back on */ -- cgit v1.2.3-70-g09d2 From 7fe029df4245b7765efeebbcfd1b3dfda1432a8e Mon Sep 17 00:00:00 2001 From: Ondrej Zary Date: Tue, 1 Mar 2011 19:18:43 +0000 Subject: s3fb: use new start address register Use "new" start address register 0x69 (bits 16-20) instead of "old" 0x31 (bits 16-17) and 0x51 (bits 18-19). This is needed for panning to work correctly on Trio3D/2X cards (and does no harm on other ones). Signed-off-by: Ondrej Zary Acked-by: Ondrej Zajicek Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 808db19aa5de..ddedad9cd069 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -123,7 +123,7 @@ static const struct vga_regset s3_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, static const struct vga_regset s3_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; static const struct vga_regset s3_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x5E, 6, 6}, VGA_REGSET_END}; -static const struct vga_regset s3_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x31, 4, 5}, {0x51, 0, 1}, VGA_REGSET_END}; +static const struct vga_regset s3_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x69, 0, 4}, VGA_REGSET_END}; static const struct vga_regset s3_offset_regs[] = {{0x13, 0, 7}, {0x51, 4, 5}, VGA_REGSET_END}; /* set 0x43 bit 2 to 0 */ static const struct vga_regset s3_dtpc_regs[] = {{0x3B, 0, 7}, {0x5D, 6, 6}, VGA_REGSET_END}; -- cgit v1.2.3-70-g09d2 From 94e948e6e43cd34e0e2ca496d5e90e4ff0d884f9 Mon Sep 17 00:00:00 2001 From: Ondrej Zary Date: Tue, 29 Mar 2011 19:07:08 +0000 Subject: s3fb: fix Virge/GX2 Fix Virge/GX2 support in s3fb: - fix IDs: 86C357 is GX2, 86C359 is GX2+, 86C356 probably does not exist - add memory size detection - drive it the same way as Trio3D/2X The original IDs most likely came from S3 website which claims that: - 356 is Virge/GX2 with ID=8A10, driver included in Windows 2K, XP - 357 is Virge/GX2+ with ID=8A11, driver included in Windows ME - 359 is Virge/GX2+ with ID=8A12, driver included in Windows ME but: - google search for 86C356 only reveals references to Trio3D (probably because of a typo - Trio3D is 86C365) - my card is clearly marked as 86C357, Virge/GX2 and has ID=8A10 - there is no driver for IDs 8A11 and 8A12 in Windows ME - there is a driver for ID 8A10 in Windows ME that says it's GX2 (357) Tested with #9 Reality 334 (86C357 Virge/GX2, ID=0x8A10). Signed-off-by: Ondrej Zary Signed-off-by: Paul Mundt --- drivers/video/s3fb.c | 48 ++++++++++++++++++++++++++++++++++-------------- 1 file changed, 34 insertions(+), 14 deletions(-) (limited to 'drivers/video/s3fb.c') diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index ddedad9cd069..c4482f2e5799 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c @@ -71,9 +71,9 @@ static const int s3_memsizes[] = {4096, 0, 3072, 8192, 2048, 6144, 1024, 512}; static const char * const s3_names[] = {"S3 Unknown", "S3 Trio32", "S3 Trio64", "S3 Trio64V+", "S3 Trio64UV+", "S3 Trio64V2/DX", "S3 Trio64V2/GX", - "S3 Plato/PX", "S3 Aurora64VP", "S3 Virge", + "S3 Plato/PX", "S3 Aurora64V+", "S3 Virge", "S3 Virge/VX", "S3 Virge/DX", "S3 Virge/GX", - "S3 Virge/GX2", "S3 Virge/GX2P", "S3 Virge/GX2P", + "S3 Virge/GX2", "S3 Virge/GX2+", "", "S3 Trio3D/1X", "S3 Trio3D/2X", "S3 Trio3D/2X", "S3 Trio3D"}; @@ -90,9 +90,8 @@ static const char * const s3_names[] = {"S3 Unknown", "S3 Trio32", "S3 Trio64", #define CHIP_988_VIRGE_VX 0x0A #define CHIP_375_VIRGE_DX 0x0B #define CHIP_385_VIRGE_GX 0x0C -#define CHIP_356_VIRGE_GX2 0x0D -#define CHIP_357_VIRGE_GX2P 0x0E -#define CHIP_359_VIRGE_GX2P 0x0F +#define CHIP_357_VIRGE_GX2 0x0D +#define CHIP_359_VIRGE_GX2P 0x0E #define CHIP_360_TRIO3D_1X 0x10 #define CHIP_362_TRIO3D_2X 0x11 #define CHIP_368_TRIO3D_2X 0x12 @@ -359,7 +358,9 @@ static void s3_set_pixclock(struct fb_info *info, u32 pixclock) vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); /* Set S3 clock registers */ - if (par->chip == CHIP_360_TRIO3D_1X || + if (par->chip == CHIP_357_VIRGE_GX2 || + par->chip == CHIP_359_VIRGE_GX2P || + par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X) { vga_wseq(par->state.vgabase, 0x12, (n - 2) | ((r & 3) << 6)); /* n and two bits of r */ @@ -560,7 +561,9 @@ static int s3fb_set_par(struct fb_info *info) pr_debug("fb%d: offset register : %d\n", info->node, offset_value); svga_wcrt_multi(par->state.vgabase, s3_offset_regs, offset_value); - if (par->chip != CHIP_360_TRIO3D_1X && + if (par->chip != CHIP_357_VIRGE_GX2 && + par->chip != CHIP_359_VIRGE_GX2P && + par->chip != CHIP_360_TRIO3D_1X && par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_368_TRIO3D_2X) { vga_wcrt(par->state.vgabase, 0x54, 0x18); /* M parameter */ @@ -604,7 +607,9 @@ static int s3fb_set_par(struct fb_info *info) vga_wcrt(par->state.vgabase, 0x66, 0x90); } - if (par->chip == CHIP_360_TRIO3D_1X || + if (par->chip == CHIP_357_VIRGE_GX2 || + par->chip == CHIP_359_VIRGE_GX2P || + par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X || par->chip == CHIP_365_TRIO3D || @@ -617,8 +622,7 @@ static int s3fb_set_par(struct fb_info *info) vga_wcrt(par->state.vgabase, 0x66, 0x81); } - if (par->chip == CHIP_356_VIRGE_GX2 || - par->chip == CHIP_357_VIRGE_GX2P || + if (par->chip == CHIP_357_VIRGE_GX2 || par->chip == CHIP_359_VIRGE_GX2P || par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || @@ -674,6 +678,8 @@ static int s3fb_set_par(struct fb_info *info) pr_debug("fb%d: 8 bit pseudocolor\n", info->node); svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30); if (info->var.pixclock > 20000 || + par->chip == CHIP_357_VIRGE_GX2 || + par->chip == CHIP_359_VIRGE_GX2P || par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_368_TRIO3D_2X) @@ -702,7 +708,9 @@ static int s3fb_set_par(struct fb_info *info) } else { svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0); - if (par->chip != CHIP_360_TRIO3D_1X && + if (par->chip != CHIP_357_VIRGE_GX2 && + par->chip != CHIP_359_VIRGE_GX2P && + par->chip != CHIP_360_TRIO3D_1X && par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_368_TRIO3D_2X) hmul = 2; @@ -727,7 +735,9 @@ static int s3fb_set_par(struct fb_info *info) } else { svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30); svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0); - if (par->chip != CHIP_360_TRIO3D_1X && + if (par->chip != CHIP_357_VIRGE_GX2 && + par->chip != CHIP_359_VIRGE_GX2P && + par->chip != CHIP_360_TRIO3D_1X && par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_368_TRIO3D_2X) hmul = 2; @@ -1069,6 +1079,16 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i info->screen_size = 2 << 20; break; } + } else if (par->chip == CHIP_357_VIRGE_GX2 || + par->chip == CHIP_359_VIRGE_GX2P) { + switch ((regval & 0xC0) >> 6) { + case 1: /* 4MB */ + info->screen_size = 4 << 20; + break; + case 3: /* 2MB */ + info->screen_size = 2 << 20; + break; + } } else info->screen_size = s3_memsizes[regval >> 5] << 10; info->fix.smem_len = info->screen_size; @@ -1268,8 +1288,8 @@ static struct pci_device_id s3_devices[] __devinitdata = { {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x5631), .driver_data = CHIP_325_VIRGE}, {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x883D), .driver_data = CHIP_988_VIRGE_VX}, {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A01), .driver_data = CHIP_XXX_VIRGE_DXGX}, - {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A10), .driver_data = CHIP_356_VIRGE_GX2}, - {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A11), .driver_data = CHIP_357_VIRGE_GX2P}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A10), .driver_data = CHIP_357_VIRGE_GX2}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A11), .driver_data = CHIP_359_VIRGE_GX2P}, {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A12), .driver_data = CHIP_359_VIRGE_GX2P}, {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A13), .driver_data = CHIP_36X_TRIO3D_1X_2X}, {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8904), .driver_data = CHIP_365_TRIO3D}, -- cgit v1.2.3-70-g09d2