From 9f879fb1a7b6c964dcde96c4cca8eb4444318560 Mon Sep 17 00:00:00 2001 From: Vijendar Mukunda Date: Mon, 10 Oct 2022 15:09:40 +0530 Subject: ASoC: amd: Update Pink Sardine platform ACP register header Update Pink Sardine platform ACP register header with Soundwire Controller specific registers and other ACP registers. Signed-off-by: Vijendar Mukunda Link: https://lore.kernel.org/r/20221010093941.2354783-1-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown --- include/sound/acp62_chip_offset_byte.h | 214 +++++++++++++++++++++++++++++++++ 1 file changed, 214 insertions(+) (limited to 'include/sound') diff --git a/include/sound/acp62_chip_offset_byte.h b/include/sound/acp62_chip_offset_byte.h index f03992f81168..ca38f8a0966e 100644 --- a/include/sound/acp62_chip_offset_byte.h +++ b/include/sound/acp62_chip_offset_byte.h @@ -131,6 +131,23 @@ #define ACP_I2S_WAKE_EN 0x000145C #define ACP_SW1_WAKE_EN 0x0001460 +#define ACP_SW_I2S_ERROR_REASON 0x00018B4 +#define ACP_SW_POS_TRACK_I2S_TX_CTRL 0x00018B8 +#define ACP_SW_I2S_TX_DMA_POS 0x00018BC +#define ACP_SW_POS_TRACK_BT_TX_CTRL 0x00018C0 +#define ACP_SW_BT_TX_DMA_POS 0x00018C4 +#define ACP_SW_POS_TRACK_HS_TX_CTRL 0x00018C8 +#define ACP_SW_HS_TX_DMA_POS 0x00018CC +#define ACP_SW_POS_TRACK_I2S_RX_CTRL 0x00018D0 +#define ACP_SW_I2S_RX_DMA_POS 0x00018D4 +#define ACP_SW_POS_TRACK_BT_RX_CTRL 0x00018D8 +#define ACP_SW_BT_RX_DMA_POS 0x00018DC +#define ACP_SW_POS_TRACK_HS_RX_CTRL 0x00018E0 +#define ACP_SW_HS_RX_DMA_POS 0x00018E4 +#define ACP_ERROR_INTR_MASK1 0X0001974 +#define ACP_ERROR_INTR_MASK2 0X0001978 +#define ACP_ERROR_INTR_MASK3 0X000197C + /* Registers from ACP_P1_MISC block */ #define ACP_EXTERNAL_INTR_ENB 0x0001A00 #define ACP_EXTERNAL_INTR_CNTL 0x0001A04 @@ -154,6 +171,8 @@ #define ACP_P1_SW_BT_RX_DMA_POS 0x0001A9C #define ACP_P1_SW_POS_TRACK_HS_RX_CTRL 0x0001AA0 #define ACP_P1_SW_HS_RX_DMA_POS 0x0001AA4 +#define ACP_ERROR_INTR_MASK4 0X0001AEC +#define ACP_ERROR_INTR_MASK5 0X0001AF0 /* Registers from ACP_AUDIO_BUFFERS block */ #define ACP_I2S_RX_RINGBUFADDR 0x0002000 @@ -210,6 +229,24 @@ #define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x00020CC #define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x00020D0 #define ACP_HS_TX_INTR_WATERMARK_SIZE 0x00020D4 +#define ACP_AUDIO_RX_RINGBUFADDR ACP_I2S_RX_RINGBUFADDR +#define ACP_AUDIO_RX_RINGBUFSIZE ACP_I2S_RX_RINGBUFSIZE +#define ACP_AUDIO_RX_LINKPOSITIONCNTR ACP_I2S_RX_LINKPOSITIONCNTR +#define ACP_AUDIO_RX_FIFOADDR ACP_I2S_RX_FIFOADDR +#define ACP_AUDIO_RX_FIFOSIZE ACP_I2S_RX_FIFOSIZE +#define ACP_AUDIO_RX_DMA_SIZE ACP_I2S_RX_DMA_SIZE +#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH +#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_I2S_RX_LINEARPOSITIONCNTR_LOW +#define ACP_AUDIO_RX_INTR_WATERMARK_SIZE ACP_I2S_RX_INTR_WATERMARK_SIZE +#define ACP_AUDIO_TX_RINGBUFADDR ACP_I2S_TX_RINGBUFADDR +#define ACP_AUDIO_TX_RINGBUFSIZE ACP_I2S_TX_RINGBUFSIZE +#define ACP_AUDIO_TX_LINKPOSITIONCNTR ACP_I2S_TX_LINKPOSITIONCNTR +#define ACP_AUDIO_TX_FIFOADDR ACP_I2S_TX_FIFOADDR +#define ACP_AUDIO_TX_FIFOSIZE ACP_I2S_TX_FIFOSIZE +#define ACP_AUDIO_TX_DMA_SIZE ACP_I2S_TX_DMA_SIZE +#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH +#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_I2S_TX_LINEARPOSITIONCNTR_LOW +#define ACP_AUDIO_TX_INTR_WATERMARK_SIZE ACP_I2S_TX_INTR_WATERMARK_SIZE /* Registers from ACP_I2S_TDM block */ #define ACP_I2STDM_IER 0x0002400 @@ -255,6 +292,102 @@ #define ACP_WOV_ERROR_STATUS_REGISTER 0x0002C68 #define ACP_PDM_CLKDIV 0x0002C6C +/* Registers from ACP_SW_SWCLK block */ +#define ACP_SW_EN 0x0003000 +#define ACP_SW_EN_STATUS 0x0003004 +#define ACP_SW_FRAMESIZE 0x0003008 +#define ACP_SW_SSP_COUNTER 0x000300C +#define ACP_SW_AUDIO_TX_EN 0x0003010 +#define ACP_SW_AUDIO_TX_EN_STATUS 0x0003014 +#define ACP_SW_AUDIO_TX_FRAME_FORMAT 0x0003018 +#define ACP_SW_AUDIO_TX_SAMPLEINTERVAL 0x000301C +#define ACP_SW_AUDIO_TX_HCTRL_DP0 0x0003020 +#define ACP_SW_AUDIO_TX_HCTRL_DP1 0x0003024 +#define ACP_SW_AUDIO_TX_HCTRL_DP2 0x0003028 +#define ACP_SW_AUDIO_TX_HCTRL_DP3 0x000302C +#define ACP_SW_AUDIO_TX_OFFSET_DP0 0x0003030 +#define ACP_SW_AUDIO_TX_OFFSET_DP1 0x0003034 +#define ACP_SW_AUDIO_TX_OFFSET_DP2 0x0003038 +#define ACP_SW_AUDIO_TX_OFFSET_DP3 0x000303C +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP0 0x0003040 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP1 0x0003044 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP2 0x0003048 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP3 0x000304C +#define ACP_SW_BT_TX_EN 0x0003050 +#define ACP_SW_BT_TX_EN_STATUS 0x0003054 +#define ACP_SW_BT_TX_FRAME_FORMAT 0x0003058 +#define ACP_SW_BT_TX_SAMPLEINTERVAL 0x000305C +#define ACP_SW_BT_TX_HCTRL 0x0003060 +#define ACP_SW_BT_TX_OFFSET 0x0003064 +#define ACP_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003068 +#define ACP_SW_HEADSET_TX_EN 0x000306C +#define ACP_SW_HEADSET_TX_EN_STATUS 0x0003070 +#define ACP_SW_HEADSET_TX_FRAME_FORMAT 0x0003074 +#define ACP_SW_HEADSET_TX_SAMPLEINTERVAL 0x0003078 +#define ACP_SW_HEADSET_TX_HCTRL 0x000307C +#define ACP_SW_HEADSET_TX_OFFSET 0x0003080 +#define ACP_SW_HEADSET_TX_CHANNEL_ENABLE_DP0 0x0003084 +#define ACP_SW_AUDIO_RX_EN 0x0003088 +#define ACP_SW_AUDIO_RX_EN_STATUS 0x000308C +#define ACP_SW_AUDIO_RX_FRAME_FORMAT 0x0003090 +#define ACP_SW_AUDIO_RX_SAMPLEINTERVAL 0x0003094 +#define ACP_SW_AUDIO_RX_HCTRL_DP0 0x0003098 +#define ACP_SW_AUDIO_RX_HCTRL_DP1 0x000309C +#define ACP_SW_AUDIO_RX_HCTRL_DP2 0x0003100 +#define ACP_SW_AUDIO_RX_HCTRL_DP3 0x0003104 +#define ACP_SW_AUDIO_RX_OFFSET_DP0 0x0003108 +#define ACP_SW_AUDIO_RX_OFFSET_DP1 0x000310C +#define ACP_SW_AUDIO_RX_OFFSET_DP2 0x0003110 +#define ACP_SW_AUDIO_RX_OFFSET_DP3 0x0003114 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP0 0x0003118 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP1 0x000311C +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP2 0x0003120 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP3 0x0003124 +#define ACP_SW_BT_RX_EN 0x0003128 +#define ACP_SW_BT_RX_EN_STATUS 0x000312C +#define ACP_SW_BT_RX_FRAME_FORMAT 0x0003130 +#define ACP_SW_BT_RX_SAMPLEINTERVAL 0x0003134 +#define ACP_SW_BT_RX_HCTRL 0x0003138 +#define ACP_SW_BT_RX_OFFSET 0x000313C +#define ACP_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003140 +#define ACP_SW_HEADSET_RX_EN 0x0003144 +#define ACP_SW_HEADSET_RX_EN_STATUS 0x0003148 +#define ACP_SW_HEADSET_RX_FRAME_FORMAT 0x000314C +#define ACP_SW_HEADSET_RX_SAMPLEINTERVAL 0x0003150 +#define ACP_SW_HEADSET_RX_HCTRL 0x0003154 +#define ACP_SW_HEADSET_RX_OFFSET 0x0003158 +#define ACP_SW_HEADSET_RX_CHANNEL_ENABLE_DP0 0x000315C +#define ACP_SW_BPT_PORT_EN 0x0003160 +#define ACP_SW_BPT_PORT_EN_STATUS 0x0003164 +#define ACP_SW_BPT_PORT_FRAME_FORMAT 0x0003168 +#define ACP_SW_BPT_PORT_SAMPLEINTERVAL 0x000316C +#define ACP_SW_BPT_PORT_HCTRL 0x0003170 +#define ACP_SW_BPT_PORT_OFFSET 0x0003174 +#define ACP_SW_BPT_PORT_CHANNEL_ENABLE 0x0003178 +#define ACP_SW_BPT_PORT_FIRST_BYTE_ADDR 0x000317C +#define ACP_SW_CLK_RESUME_CTRL 0x0003180 +#define ACP_SW_CLK_RESUME_DELAY_CNTR 0x0003184 +#define ACP_SW_BUS_RESET_CTRL 0x0003188 +#define ACP_SW_PRBS_ERR_STATUS 0x000318C +#define SW_IMM_CMD_UPPER_WORD 0x0003230 +#define SW_IMM_CMD_LOWER_QWORD 0x0003234 +#define SW_IMM_RESP_UPPER_WORD 0x0003238 +#define SW_IMM_RESP_LOWER_QWORD 0x000323C +#define SW_IMM_CMD_STS 0x0003240 +#define SW_BRA_BASE_ADDRESS 0x0003244 +#define SW_BRA_TRANSFER_SIZE 0x0003248 +#define SW_BRA_DMA_BUSY 0x000324C +#define SW_BRA_RESP 0x0003250 +#define SW_BRA_RESP_FRAME_ADDR 0x0003254 +#define SW_BRA_CURRENT_TRANSFER_SIZE 0x0003258 +#define SW_STATE_CHANGE_STATUS_0TO7 0x000325C +#define SW_STATE_CHANGE_STATUS_8TO11 0x0003260 +#define SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003264 +#define SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003268 +#define SW_CLK_FREQUENCY_CTRL 0x000326C +#define SW_ERROR_INTR_MASK 0x0003270 +#define SW_PHY_TEST_MODE_DATA_OFF 0x0003274 + /* Registers from ACP_P1_AUDIO_BUFFERS block */ #define ACP_P1_I2S_RX_RINGBUFADDR 0x0003A00 #define ACP_P1_I2S_RX_RINGBUFSIZE 0x0003A04 @@ -310,6 +443,87 @@ #define ACP_P1_HS_TX_LINEARPOSITIONCNTR_HIGH 0x0003ACC #define ACP_P1_HS_TX_LINEARPOSITIONCNTR_LOW 0x0003AD0 #define ACP_P1_HS_TX_INTR_WATERMARK_SIZE 0x0003AD4 +#define ACP_P1_AUDIO_RX_RINGBUFADDR ACP_P1_I2S_RX_RINGBUFADDR +#define ACP_P1_AUDIO_RX_RINGBUFSIZE ACP_P1_I2S_RX_RINGBUFSIZE +#define ACP_P1_AUDIO_RX_LINKPOSITIONCNTR ACP_P1_I2S_RX_LINKPOSITIONCNTR +#define ACP_P1_AUDIO_RX_FIFOADDR ACP_P1_I2S_RX_FIFOADDR +#define ACP_P1_AUDIO_RX_FIFOSIZE ACP_P1_I2S_RX_FIFOSIZE +#define ACP_P1_AUDIO_RX_DMA_SIZE ACP_P1_I2S_RX_DMA_SIZE +#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH +#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW +#define ACP_P1_AUDIO_RX_INTR_WATERMARK_SIZE ACP_P1_I2S_RX_INTR_WATERMARK_SIZE +#define ACP_P1_AUDIO_TX_RINGBUFADDR ACP_P1_I2S_TX_RINGBUFADDR +#define ACP_P1_AUDIO_TX_RINGBUFSIZE ACP_P1_I2S_TX_RINGBUFSIZE +#define ACP_P1_AUDIO_TX_LINKPOSITIONCNTR ACP_P1_I2S_TX_LINKPOSITIONCNTR +#define ACP_P1_AUDIO_TX_FIFOADDR ACP_P1_I2S_TX_FIFOADDR +#define ACP_P1_AUDIO_TX_FIFOSIZE ACP_P1_I2S_TX_FIFOSIZE +#define ACP_P1_AUDIO_TX_DMA_SIZE ACP_P1_I2S_TX_DMA_SIZE +#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH +#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW +#define ACP_P1_AUDIO_TX_INTR_WATERMARK_SIZE ACP_P1_I2S_TX_INTR_WATERMARK_SIZE + +/* Registers from ACP_P1_SW_SWCLK block */ +#define ACP_P1_SW_EN 0x0003C00 +#define ACP_P1_SW_EN_STATUS 0x0003C04 +#define ACP_P1_SW_FRAMESIZE 0x0003C08 +#define ACP_P1_SW_SSP_COUNTER 0x0003C0C +#define ACP_P1_SW_BT_TX_EN 0x0003C50 +#define ACP_P1_SW_BT_TX_EN_STATUS 0x0003C54 +#define ACP_P1_SW_BT_TX_FRAME_FORMAT 0x0003C58 +#define ACP_P1_SW_BT_TX_SAMPLEINTERVAL 0x0003C5C +#define ACP_P1_SW_BT_TX_HCTRL 0x0003C60 +#define ACP_P1_SW_BT_TX_OFFSET 0x0003C64 +#define ACP_P1_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003C68 +#define ACP_P1_SW_BT_RX_EN 0x0003D28 +#define ACP_P1_SW_BT_RX_EN_STATUS 0x0003D2C +#define ACP_P1_SW_BT_RX_FRAME_FORMAT 0x0003D30 +#define ACP_P1_SW_BT_RX_SAMPLEINTERVAL 0x0003D34 +#define ACP_P1_SW_BT_RX_HCTRL 0x0003D38 +#define ACP_P1_SW_BT_RX_OFFSET 0x0003D3C +#define ACP_P1_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003D40 +#define ACP_P1_SW_BPT_PORT_EN 0x0003D60 +#define ACP_P1_SW_BPT_PORT_EN_STATUS 0x0003D64 +#define ACP_P1_SW_BPT_PORT_FRAME_FORMAT 0x0003D68 +#define ACP_P1_SW_BPT_PORT_SAMPLEINTERVAL 0x0003D6C +#define ACP_P1_SW_BPT_PORT_HCTRL 0x0003D70 +#define ACP_P1_SW_BPT_PORT_OFFSET 0x0003D74 +#define ACP_P1_SW_BPT_PORT_CHANNEL_ENABLE 0x0003D78 +#define ACP_P1_SW_BPT_PORT_FIRST_BYTE_ADDR 0x0003D7C +#define ACP_P1_SW_CLK_RESUME_CTRL 0x0003D80 +#define ACP_P1_SW_CLK_RESUME_DELAY_CNTR 0x0003D84 +#define ACP_P1_SW_BUS_RESET_CTRL 0x0003D88 +#define ACP_P1_SW_PRBS_ERR_STATUS 0x0003D8C + +/* Registers from ACP_P1_SW_ACLK block */ +#define P1_SW_CORB_BASE_ADDRESS 0x0003E00 +#define P1_SW_CORB_WRITE_POINTER 0x0003E04 +#define P1_SW_CORB_READ_POINTER 0x0003E08 +#define P1_SW_CORB_CONTROL 0x0003E0C +#define P1_SW_CORB_SIZE 0x0003E14 +#define P1_SW_RIRB_BASE_ADDRESS 0x0003E18 +#define P1_SW_RIRB_WRITE_POINTER 0x0003E1C +#define P1_SW_RIRB_RESPONSE_INTERRUPT_COUNT 0x0003E20 +#define P1_SW_RIRB_CONTROL 0x0003E24 +#define P1_SW_RIRB_SIZE 0x0003E28 +#define P1_SW_RIRB_FIFO_MIN_THDL 0x0003E2C +#define P1_SW_IMM_CMD_UPPER_WORD 0x0003E30 +#define P1_SW_IMM_CMD_LOWER_QWORD 0x0003E34 +#define P1_SW_IMM_RESP_UPPER_WORD 0x0003E38 +#define P1_SW_IMM_RESP_LOWER_QWORD 0x0003E3C +#define P1_SW_IMM_CMD_STS 0x0003E40 +#define P1_SW_BRA_BASE_ADDRESS 0x0003E44 +#define P1_SW_BRA_TRANSFER_SIZE 0x0003E48 +#define P1_SW_BRA_DMA_BUSY 0x0003E4C +#define P1_SW_BRA_RESP 0x0003E50 +#define P1_SW_BRA_RESP_FRAME_ADDR 0x0003E54 +#define P1_SW_BRA_CURRENT_TRANSFER_SIZE 0x0003E58 +#define P1_SW_STATE_CHANGE_STATUS_0TO7 0x0003E5C +#define P1_SW_STATE_CHANGE_STATUS_8TO11 0x0003E60 +#define P1_SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003E64 +#define P1_SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003E68 +#define P1_SW_CLK_FREQUENCY_CTRL 0x0003E6C +#define P1_SW_ERROR_INTR_MASK 0x0003E70 +#define P1_SW_PHY_TEST_MODE_DATA_OFF 0x0003E74 /* Registers from ACP_SCRATCH block */ #define ACP_SCRATCH_REG_0 0x0010000 -- cgit v1.2.3-70-g09d2 From 86b94c396bb25459affbf1160ee1efaa61e38be2 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 19 Oct 2022 00:35:57 +0000 Subject: ASoC: soc-dapm.c: replace snd_soc_dapm_wcache to snd_soc_dapm_widget MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Current ASoC has snd_soc_dapm_wcache, but its member is only snd_soc_dapm_widget. struct snd_soc_dapm_wcache { struct snd_soc_dapm_widget *widget; }; It is no meaning for now, and makes code unreadable. This patch replace snd_soc_dapm_wcache to snd_soc_dapm_widget directly. Signed-off-by: Kuninori Morimoto Reviewed-by: Amadeusz Sławiński Link: https://lore.kernel.org/r/87a65stztf.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc-dapm.h | 9 ++------- sound/soc/soc-dapm.c | 29 +++++++++-------------------- 2 files changed, 11 insertions(+), 27 deletions(-) (limited to 'include/sound') diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index ebb8e7a7fc29..29d5700393c6 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -450,7 +450,6 @@ int snd_soc_dapm_del_routes(struct snd_soc_dapm_context *dapm, int snd_soc_dapm_weak_routes(struct snd_soc_dapm_context *dapm, const struct snd_soc_dapm_route *route, int num); void snd_soc_dapm_free_widget(struct snd_soc_dapm_widget *w); -void snd_soc_dapm_reset_cache(struct snd_soc_dapm_context *dapm); /* dapm events */ void snd_soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream, @@ -680,10 +679,6 @@ struct snd_soc_dapm_update { bool has_second_set; }; -struct snd_soc_dapm_wcache { - struct snd_soc_dapm_widget *widget; -}; - /* DAPM context */ struct snd_soc_dapm_context { enum snd_soc_bias_level bias_level; @@ -699,8 +694,8 @@ struct snd_soc_dapm_context { enum snd_soc_bias_level target_bias_level; struct list_head list; - struct snd_soc_dapm_wcache path_sink_cache; - struct snd_soc_dapm_wcache path_source_cache; + struct snd_soc_dapm_widget *wcache_sink; + struct snd_soc_dapm_widget *wcache_source; #ifdef CONFIG_DEBUG_FS struct dentry *debugfs_dapm; diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index d515e7a78ea8..1796863bff1b 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -652,10 +652,8 @@ static void soc_dapm_async_complete(struct snd_soc_dapm_context *dapm) } static struct snd_soc_dapm_widget * -dapm_wcache_lookup(struct snd_soc_dapm_wcache *wcache, const char *name) +dapm_wcache_lookup(struct snd_soc_dapm_widget *w, const char *name) { - struct snd_soc_dapm_widget *w = wcache->widget; - if (w) { struct list_head *wlist = &w->dapm->card->widgets; const int depth = 2; @@ -673,12 +671,6 @@ dapm_wcache_lookup(struct snd_soc_dapm_wcache *wcache, const char *name) return NULL; } -static inline void dapm_wcache_update(struct snd_soc_dapm_wcache *wcache, - struct snd_soc_dapm_widget *w) -{ - wcache->widget = w; -} - /** * snd_soc_dapm_force_bias_level() - Sets the DAPM bias level * @dapm: The DAPM context for which to set the level @@ -2516,12 +2508,6 @@ void snd_soc_dapm_free_widget(struct snd_soc_dapm_widget *w) } EXPORT_SYMBOL_GPL(snd_soc_dapm_free_widget); -void snd_soc_dapm_reset_cache(struct snd_soc_dapm_context *dapm) -{ - dapm->path_sink_cache.widget = NULL; - dapm->path_source_cache.widget = NULL; -} - /* free all dapm widgets and resources */ static void dapm_free_widgets(struct snd_soc_dapm_context *dapm) { @@ -2532,7 +2518,9 @@ static void dapm_free_widgets(struct snd_soc_dapm_context *dapm) continue; snd_soc_dapm_free_widget(w); } - snd_soc_dapm_reset_cache(dapm); + + dapm->wcache_sink = NULL; + dapm->wcache_source = NULL; } static struct snd_soc_dapm_widget *dapm_find_widget( @@ -2961,8 +2949,8 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, source = route->source; } - wsource = dapm_wcache_lookup(&dapm->path_source_cache, source); - wsink = dapm_wcache_lookup(&dapm->path_sink_cache, sink); + wsource = dapm_wcache_lookup(dapm->wcache_source, source); + wsink = dapm_wcache_lookup(dapm->wcache_sink, sink); if (wsink && wsource) goto skip_search; @@ -3018,8 +3006,9 @@ static int snd_soc_dapm_add_route(struct snd_soc_dapm_context *dapm, } skip_search: - dapm_wcache_update(&dapm->path_sink_cache, wsink); - dapm_wcache_update(&dapm->path_source_cache, wsource); + /* update cache */ + dapm->wcache_sink = wsink; + dapm->wcache_source = wsource; ret = snd_soc_dapm_add_path(dapm, wsource, wsink, route->control, route->connected); -- cgit v1.2.3-70-g09d2 From f3779b161938182fa3c67f8daebfe82ef65bf1ab Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 19 Oct 2022 00:37:13 +0000 Subject: ASoC: soc-dapm.h: cleanup white space MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit soc-dapm.h defines many things, but it is using randam white space and tag. This patch do nothing, but cleanup its white space. This patch cleanup also 100 char in 1 line. Signed-off-by: Kuninori Morimoto Reviewed-by: Amadeusz Sławiński Link: https://lore.kernel.org/r/87y1tcsl6u.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc-dapm.h | 173 +++++++++++++++++++---------------------------- 1 file changed, 71 insertions(+), 102 deletions(-) (limited to 'include/sound') diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 29d5700393c6..44597e63344d 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -341,31 +341,27 @@ struct soc_enum; #define SND_SOC_DAPM_STREAM_STOP 0x2 #define SND_SOC_DAPM_STREAM_SUSPEND 0x4 #define SND_SOC_DAPM_STREAM_RESUME 0x8 -#define SND_SOC_DAPM_STREAM_PAUSE_PUSH 0x10 +#define SND_SOC_DAPM_STREAM_PAUSE_PUSH 0x10 #define SND_SOC_DAPM_STREAM_PAUSE_RELEASE 0x20 /* dapm event types */ -#define SND_SOC_DAPM_PRE_PMU 0x1 /* before widget power up */ -#define SND_SOC_DAPM_POST_PMU 0x2 /* after widget power up */ -#define SND_SOC_DAPM_PRE_PMD 0x4 /* before widget power down */ -#define SND_SOC_DAPM_POST_PMD 0x8 /* after widget power down */ -#define SND_SOC_DAPM_PRE_REG 0x10 /* before audio path setup */ -#define SND_SOC_DAPM_POST_REG 0x20 /* after audio path setup */ -#define SND_SOC_DAPM_WILL_PMU 0x40 /* called at start of sequence */ -#define SND_SOC_DAPM_WILL_PMD 0x80 /* called at start of sequence */ -#define SND_SOC_DAPM_PRE_POST_PMD \ - (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD) -#define SND_SOC_DAPM_PRE_POST_PMU \ - (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU) +#define SND_SOC_DAPM_PRE_PMU 0x1 /* before widget power up */ +#define SND_SOC_DAPM_POST_PMU 0x2 /* after widget power up */ +#define SND_SOC_DAPM_PRE_PMD 0x4 /* before widget power down */ +#define SND_SOC_DAPM_POST_PMD 0x8 /* after widget power down */ +#define SND_SOC_DAPM_PRE_REG 0x10 /* before audio path setup */ +#define SND_SOC_DAPM_POST_REG 0x20 /* after audio path setup */ +#define SND_SOC_DAPM_WILL_PMU 0x40 /* called at start of sequence */ +#define SND_SOC_DAPM_WILL_PMD 0x80 /* called at start of sequence */ +#define SND_SOC_DAPM_PRE_POST_PMD (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD) +#define SND_SOC_DAPM_PRE_POST_PMU (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU) /* convenience event type detection */ -#define SND_SOC_DAPM_EVENT_ON(e) \ - (e & (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU)) -#define SND_SOC_DAPM_EVENT_OFF(e) \ - (e & (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD)) +#define SND_SOC_DAPM_EVENT_ON(e) (e & (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU)) +#define SND_SOC_DAPM_EVENT_OFF(e) (e & (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD)) /* regulator widget flags */ -#define SND_SOC_DAPM_REGULATOR_BYPASS 0x1 /* bypass when disabled */ +#define SND_SOC_DAPM_REGULATOR_BYPASS 0x1 /* bypass when disabled */ struct snd_soc_dapm_widget; enum snd_soc_dapm_type; @@ -396,18 +392,13 @@ enum snd_soc_bias_level { SND_SOC_BIAS_ON = 3, }; -int dapm_regulator_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); -int dapm_clock_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); -int dapm_pinctrl_event(struct snd_soc_dapm_widget *w, - struct snd_kcontrol *kcontrol, int event); +int dapm_regulator_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +int dapm_clock_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); +int dapm_pinctrl_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event); /* dapm controls */ -int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); -int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_dapm_get_enum_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol, @@ -419,30 +410,24 @@ int snd_soc_dapm_get_pin_switch(struct snd_kcontrol *kcontrol, int snd_soc_dapm_put_pin_switch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *uncontrol); int snd_soc_dapm_new_controls(struct snd_soc_dapm_context *dapm, - const struct snd_soc_dapm_widget *widget, - int num); -struct snd_soc_dapm_widget *snd_soc_dapm_new_control( - struct snd_soc_dapm_context *dapm, + const struct snd_soc_dapm_widget *widget, int num); +struct snd_soc_dapm_widget *snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm, const struct snd_soc_dapm_widget *widget); -struct snd_soc_dapm_widget *snd_soc_dapm_new_control_unlocked( - struct snd_soc_dapm_context *dapm, +struct snd_soc_dapm_widget *snd_soc_dapm_new_control_unlocked(struct snd_soc_dapm_context *dapm, const struct snd_soc_dapm_widget *widget); -int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, - struct snd_soc_dai *dai); +int snd_soc_dapm_new_dai_widgets(struct snd_soc_dapm_context *dapm, struct snd_soc_dai *dai); void snd_soc_dapm_free_widget(struct snd_soc_dapm_widget *w); int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card); void snd_soc_dapm_connect_dai_link_widgets(struct snd_soc_card *card); int snd_soc_dapm_update_dai(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params, - struct snd_soc_dai *dai); + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai); /* dapm path setup */ int snd_soc_dapm_new_widgets(struct snd_soc_card *card); void snd_soc_dapm_free(struct snd_soc_dapm_context *dapm); void snd_soc_dapm_init(struct snd_soc_dapm_context *dapm, - struct snd_soc_card *card, - struct snd_soc_component *component); + struct snd_soc_card *card, struct snd_soc_component *component); int snd_soc_dapm_add_routes(struct snd_soc_dapm_context *dapm, const struct snd_soc_dapm_route *route, int num); int snd_soc_dapm_del_routes(struct snd_soc_dapm_context *dapm, @@ -452,46 +437,34 @@ int snd_soc_dapm_weak_routes(struct snd_soc_dapm_context *dapm, void snd_soc_dapm_free_widget(struct snd_soc_dapm_widget *w); /* dapm events */ -void snd_soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream, - int event); +void snd_soc_dapm_stream_event(struct snd_soc_pcm_runtime *rtd, int stream, int event); void snd_soc_dapm_stream_stop(struct snd_soc_pcm_runtime *rtd, int stream); void snd_soc_dapm_shutdown(struct snd_soc_card *card); /* external DAPM widget events */ int snd_soc_dapm_mixer_update_power(struct snd_soc_dapm_context *dapm, - struct snd_kcontrol *kcontrol, int connect, - struct snd_soc_dapm_update *update); + struct snd_kcontrol *kcontrol, int connect, struct snd_soc_dapm_update *update); int snd_soc_dapm_mux_update_power(struct snd_soc_dapm_context *dapm, struct snd_kcontrol *kcontrol, int mux, struct soc_enum *e, struct snd_soc_dapm_update *update); /* dapm sys fs - used by the core */ extern struct attribute *soc_dapm_dev_attrs[]; -void snd_soc_dapm_debugfs_init(struct snd_soc_dapm_context *dapm, - struct dentry *parent); +void snd_soc_dapm_debugfs_init(struct snd_soc_dapm_context *dapm, struct dentry *parent); /* dapm audio pin control and status */ -int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm, - const char *pin); -int snd_soc_dapm_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, - const char *pin); -int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm, - const char *pin); -int snd_soc_dapm_disable_pin_unlocked(struct snd_soc_dapm_context *dapm, - const char *pin); +int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm, const char *pin); +int snd_soc_dapm_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin); +int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm, const char *pin); +int snd_soc_dapm_disable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin); int snd_soc_dapm_nc_pin(struct snd_soc_dapm_context *dapm, const char *pin); -int snd_soc_dapm_nc_pin_unlocked(struct snd_soc_dapm_context *dapm, - const char *pin); -int snd_soc_dapm_get_pin_status(struct snd_soc_dapm_context *dapm, - const char *pin); +int snd_soc_dapm_nc_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin); +int snd_soc_dapm_get_pin_status(struct snd_soc_dapm_context *dapm, const char *pin); int snd_soc_dapm_sync(struct snd_soc_dapm_context *dapm); int snd_soc_dapm_sync_unlocked(struct snd_soc_dapm_context *dapm); -int snd_soc_dapm_force_enable_pin(struct snd_soc_dapm_context *dapm, - const char *pin); -int snd_soc_dapm_force_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, - const char *pin); -int snd_soc_dapm_ignore_suspend(struct snd_soc_dapm_context *dapm, - const char *pin); +int snd_soc_dapm_force_enable_pin(struct snd_soc_dapm_context *dapm, const char *pin); +int snd_soc_dapm_force_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin); +int snd_soc_dapm_ignore_suspend(struct snd_soc_dapm_context *dapm, const char *pin); unsigned int dapm_kcontrol_get_value(const struct snd_kcontrol *kcontrol); /* Mostly internal - should not normally be used */ @@ -500,40 +473,35 @@ void dapm_mark_endpoints_dirty(struct snd_soc_card *card); /* dapm path query */ int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, struct snd_soc_dapm_widget_list **list, - bool (*custom_stop_condition)(struct snd_soc_dapm_widget *, - enum snd_soc_dapm_direction)); + bool (*custom_stop_condition)(struct snd_soc_dapm_widget *, enum snd_soc_dapm_direction)); void snd_soc_dapm_dai_free_widgets(struct snd_soc_dapm_widget_list **list); -struct snd_soc_dapm_context *snd_soc_dapm_kcontrol_dapm( - struct snd_kcontrol *kcontrol); +struct snd_soc_dapm_context *snd_soc_dapm_kcontrol_dapm(struct snd_kcontrol *kcontrol); +struct snd_soc_dapm_widget *snd_soc_dapm_kcontrol_widget(struct snd_kcontrol *kcontrol); -struct snd_soc_dapm_widget *snd_soc_dapm_kcontrol_widget( - struct snd_kcontrol *kcontrol); - -int snd_soc_dapm_force_bias_level(struct snd_soc_dapm_context *dapm, - enum snd_soc_bias_level level); +int snd_soc_dapm_force_bias_level(struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level); /* dapm widget types */ enum snd_soc_dapm_type { snd_soc_dapm_input = 0, /* input pin */ snd_soc_dapm_output, /* output pin */ - snd_soc_dapm_mux, /* selects 1 analog signal from many inputs */ - snd_soc_dapm_demux, /* connects the input to one of multiple outputs */ - snd_soc_dapm_mixer, /* mixes several analog signals together */ - snd_soc_dapm_mixer_named_ctl, /* mixer with named controls */ - snd_soc_dapm_pga, /* programmable gain/attenuation (volume) */ - snd_soc_dapm_out_drv, /* output driver */ - snd_soc_dapm_adc, /* analog to digital converter */ - snd_soc_dapm_dac, /* digital to analog converter */ + snd_soc_dapm_mux, /* selects 1 analog signal from many inputs */ + snd_soc_dapm_demux, /* connects the input to one of multiple outputs */ + snd_soc_dapm_mixer, /* mixes several analog signals together */ + snd_soc_dapm_mixer_named_ctl, /* mixer with named controls */ + snd_soc_dapm_pga, /* programmable gain/attenuation (volume) */ + snd_soc_dapm_out_drv, /* output driver */ + snd_soc_dapm_adc, /* analog to digital converter */ + snd_soc_dapm_dac, /* digital to analog converter */ snd_soc_dapm_micbias, /* microphone bias (power) - DEPRECATED: use snd_soc_dapm_supply */ - snd_soc_dapm_mic, /* microphone */ - snd_soc_dapm_hp, /* headphones */ - snd_soc_dapm_spk, /* speaker */ - snd_soc_dapm_line, /* line input/output */ + snd_soc_dapm_mic, /* microphone */ + snd_soc_dapm_hp, /* headphones */ + snd_soc_dapm_spk, /* speaker */ + snd_soc_dapm_line, /* line input/output */ snd_soc_dapm_switch, /* analog switch */ - snd_soc_dapm_vmid, /* codec bias/vmid - to minimise pops */ - snd_soc_dapm_pre, /* machine specific pre widget - exec first */ - snd_soc_dapm_post, /* machine specific post widget - exec last */ + snd_soc_dapm_vmid, /* codec bias/vmid - to minimise pops */ + snd_soc_dapm_pre, /* machine specific pre widget - exec first */ + snd_soc_dapm_post, /* machine specific post widget - exec last */ snd_soc_dapm_supply, /* power/clock supply */ snd_soc_dapm_pinctrl, /* pinctrl */ snd_soc_dapm_regulator_supply, /* external regulator */ @@ -599,9 +567,9 @@ struct snd_soc_dapm_path { }; /* status */ - u32 connect:1; /* source and sink widgets are connected */ - u32 walking:1; /* path is in the process of being walked */ - u32 weak:1; /* path ignored for power management */ + u32 connect:1; /* source and sink widgets are connected */ + u32 walking:1; /* path is in the process of being walked */ + u32 weak:1; /* path ignored for power management */ u32 is_supply:1; /* At least one of the connected widgets is a supply */ int (*connected)(struct snd_soc_dapm_widget *source, @@ -615,8 +583,8 @@ struct snd_soc_dapm_path { /* dapm widget */ struct snd_soc_dapm_widget { enum snd_soc_dapm_type id; - const char *name; /* widget name */ - const char *sname; /* stream name */ + const char *name; /* widget name */ + const char *sname; /* stream name */ struct list_head list; struct snd_soc_dapm_context *dapm; @@ -635,7 +603,7 @@ struct snd_soc_dapm_widget { unsigned char connected:1; /* connected codec pin */ unsigned char new:1; /* cnew complete */ unsigned char force:1; /* force state */ - unsigned char ignore_suspend:1; /* kept enabled over suspend */ + unsigned char ignore_suspend:1; /* kept enabled over suspend */ unsigned char new_power:1; /* power from this run */ unsigned char power_checked:1; /* power checked this run */ unsigned char is_supply:1; /* Widget is a supply type widget */ @@ -682,13 +650,14 @@ struct snd_soc_dapm_update { /* DAPM context */ struct snd_soc_dapm_context { enum snd_soc_bias_level bias_level; - unsigned int idle_bias_off:1; /* Use BIAS_OFF instead of STANDBY */ - /* Go to BIAS_OFF in suspend if the DAPM context is idle */ - unsigned int suspend_bias_off:1; - struct device *dev; /* from parent - for debug */ - struct snd_soc_component *component; /* parent component */ - struct snd_soc_card *card; /* parent card */ + /* bit field */ + unsigned int idle_bias_off:1; /* Use BIAS_OFF instead of STANDBY */ + unsigned int suspend_bias_off:1; /* Use BIAS_OFF in suspend if the DAPM is idle */ + + struct device *dev; /* from parent - for debug */ + struct snd_soc_component *component; /* parent component */ + struct snd_soc_card *card; /* parent card */ /* used during DAPM updates */ enum snd_soc_bias_level target_bias_level; @@ -762,8 +731,8 @@ enum snd_soc_dapm_direction { #define SND_SOC_DAPM_DIR_TO_EP(x) BIT(x) -#define SND_SOC_DAPM_EP_SOURCE SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_IN) -#define SND_SOC_DAPM_EP_SINK SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_OUT) +#define SND_SOC_DAPM_EP_SOURCE SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_IN) +#define SND_SOC_DAPM_EP_SINK SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_OUT) /** * snd_soc_dapm_widget_for_each_sink_path - Iterates over all paths in the -- cgit v1.2.3-70-g09d2 From c670a224d1367f5bb3cc40c6b6b1ba0591b26df9 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 19 Oct 2022 00:37:20 +0000 Subject: ASoC: soc-dapm.h: fixup comment for snd_soc_dapm_widget_for_each_path() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The comment of snd_soc_dapm_widget_for_each_path() (= X) has "_sink_" (= s), but this is typo. With "_sink_" is already exist at (A). This patch fixup it. /** (s) * snd_soc_dapm_widget_for_each_sink_path - ... * **** */ (X) #define snd_soc_dapm_widget_for_each_path(w, dir, p) /** (s) * snd_soc_dapm_widget_for_each_sink_path_safe - ... * **** */ (X) #define snd_soc_dapm_widget_for_each_path_safe(w, dir, p, next_p) (A) #define snd_soc_dapm_widget_for_each_sink_path(w, p) **** Signed-off-by: Kuninori Morimoto Reviewed-by: Amadeusz Sławiński Link: https://lore.kernel.org/r/87wn8wsl6n.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc-dapm.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include/sound') diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 44597e63344d..77495e5988c1 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -735,7 +735,7 @@ enum snd_soc_dapm_direction { #define SND_SOC_DAPM_EP_SINK SND_SOC_DAPM_DIR_TO_EP(SND_SOC_DAPM_DIR_OUT) /** - * snd_soc_dapm_widget_for_each_sink_path - Iterates over all paths in the + * snd_soc_dapm_widget_for_each_path - Iterates over all paths in the * specified direction of a widget * @w: The widget * @dir: Whether to iterate over the paths where the specified widget is the @@ -746,7 +746,7 @@ enum snd_soc_dapm_direction { list_for_each_entry(p, &w->edges[dir], list_node[dir]) /** - * snd_soc_dapm_widget_for_each_sink_path_safe - Iterates over all paths in the + * snd_soc_dapm_widget_for_each_path_safe - Iterates over all paths in the * specified direction of a widget * @w: The widget * @dir: Whether to iterate over the paths where the specified widget is the @@ -754,7 +754,7 @@ enum snd_soc_dapm_direction { * @p: The path iterator variable * @next_p: Temporary storage for the next path * - * This function works like snd_soc_dapm_widget_for_each_sink_path, expect that + * This function works like snd_soc_dapm_widget_for_each_path, expect that * it is safe to remove the current path from the list while iterating */ #define snd_soc_dapm_widget_for_each_path_safe(w, dir, p, next_p) \ -- cgit v1.2.3-70-g09d2 From 25106550f1366bec8a9adefeada5e8ff5205c828 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 19 Oct 2022 00:37:26 +0000 Subject: ASoC: soc-dpcm.h: remove snd_soc_dpcm::hw_param MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Current soc-pcm.c is coping fe hw_param to dpcm->hw_param (A), fixup it (B), and copy it to be (C). int dpcm_be_dai_hw_params(...) { ... for_each_dpcm_be(fe, stream, dpcm) { ... /* copy params for each dpcm */ (A) memcpy(&dpcm->hw_params, &fe->dpcm[stream].hw_params, ...) ; /* perform any hw_params fixups */ (B) ret = snd_soc_link_be_hw_params_fixup(be, &dpcm->hw_params); ... /* copy the fixed-up hw params for BE dai */ (C) memcpy(&be->dpcm[stream].hw_params, &dpcm->hw_params, ...); ... } ... } But here, (1) it is coping hw_params without caring stream (Playback/Capture), (2) we can get same value from be. We don't need to have dpcm->hw_params. This patch removes it. Signed-off-by: Kuninori Morimoto Reviewed-by: Amadeusz Sławiński Link: https://lore.kernel.org/r/87v8ogsl6h.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/soc-dpcm.h | 2 -- sound/soc/sh/rcar/core.c | 3 ++- sound/soc/soc-pcm.c | 12 +++++++----- 3 files changed, 9 insertions(+), 8 deletions(-) (limited to 'include/sound') diff --git a/include/sound/soc-dpcm.h b/include/sound/soc-dpcm.h index 5b689c663290..2864aed72998 100644 --- a/include/sound/soc-dpcm.h +++ b/include/sound/soc-dpcm.h @@ -78,8 +78,6 @@ struct snd_soc_dpcm { struct list_head list_be; struct list_head list_fe; - /* hw params for this link - may be different for each link */ - struct snd_pcm_hw_params hw_params; #ifdef CONFIG_DEBUG_FS struct dentry *debugfs_state; #endif diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c index 4e21ebce03c6..2d269ac8c137 100644 --- a/sound/soc/sh/rcar/core.c +++ b/sound/soc/sh/rcar/core.c @@ -1518,7 +1518,8 @@ static int rsnd_hw_params(struct snd_soc_component *component, int stream = substream->stream; for_each_dpcm_be(fe, stream, dpcm) { - struct snd_pcm_hw_params *be_params = &dpcm->hw_params; + struct snd_soc_pcm_runtime *be = dpcm->be; + struct snd_pcm_hw_params *be_params = &be->dpcm[stream].hw_params; if (params_channels(hw_params) != params_channels(be_params)) io->converted_chan = params_channels(be_params); diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index fb87d6d23408..d8e4677f3002 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c @@ -155,7 +155,7 @@ static ssize_t dpcm_show_state(struct snd_soc_pcm_runtime *fe, for_each_dpcm_be(fe, stream, dpcm) { struct snd_soc_pcm_runtime *be = dpcm->be; - params = &dpcm->hw_params; + params = &be->dpcm[stream].hw_params; offset += scnprintf(buf + offset, size - offset, "- %s\n", be->dai_link->name); @@ -1980,6 +1980,8 @@ int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) int ret; for_each_dpcm_be(fe, stream, dpcm) { + struct snd_pcm_hw_params hw_params; + be = dpcm->be; be_substream = snd_soc_dpcm_get_substream(be, stream); @@ -1988,16 +1990,16 @@ int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) continue; /* copy params for each dpcm */ - memcpy(&dpcm->hw_params, &fe->dpcm[stream].hw_params, + memcpy(&hw_params, &fe->dpcm[stream].hw_params, sizeof(struct snd_pcm_hw_params)); /* perform any hw_params fixups */ - ret = snd_soc_link_be_hw_params_fixup(be, &dpcm->hw_params); + ret = snd_soc_link_be_hw_params_fixup(be, &hw_params); if (ret < 0) goto unwind; /* copy the fixed-up hw params for BE dai */ - memcpy(&be->dpcm[stream].hw_params, &dpcm->hw_params, + memcpy(&be->dpcm[stream].hw_params, &hw_params, sizeof(struct snd_pcm_hw_params)); /* only allow hw_params() if no connected FEs are running */ @@ -2012,7 +2014,7 @@ int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) dev_dbg(be->dev, "ASoC: hw_params BE %s\n", be->dai_link->name); - ret = __soc_pcm_hw_params(be, be_substream, &dpcm->hw_params); + ret = __soc_pcm_hw_params(be, be_substream, &hw_params); if (ret < 0) goto unwind; -- cgit v1.2.3-70-g09d2 From e3775fda57d49984eaa2cfd86665a152806bfd81 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 20 Oct 2022 15:12:25 +0300 Subject: ASoC: SOF: Drop the firmware and fw_offset from snd_sof_pdata The SOF stack now uses the sdev->basefw to work with the SOF firmware, the information from plat_data can be dropped. Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Reviewed-by: Chao Song Reviewed-by: Kai Vehmanen Link: https://lore.kernel.org/r/20221020121238.18339-7-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown --- include/sound/sof.h | 4 ---- sound/soc/sof/loader.c | 9 --------- 2 files changed, 13 deletions(-) (limited to 'include/sound') diff --git a/include/sound/sof.h b/include/sound/sof.h index 341fef19e612..e1f2f02666a7 100644 --- a/include/sound/sof.h +++ b/include/sound/sof.h @@ -59,15 +59,11 @@ enum sof_ipc_type { * SOF Platform data. */ struct snd_sof_pdata { - const struct firmware *fw; const char *name; const char *platform; struct device *dev; - /* indicate how many first bytes shouldn't be loaded into DSP memory. */ - size_t fw_offset; - /* * notification callback used if the hardware initialization * can take time or is handled in a workqueue. This callback diff --git a/sound/soc/sof/loader.c b/sound/soc/sof/loader.c index 1e31b7c296e7..723bd8267a3d 100644 --- a/sound/soc/sof/loader.c +++ b/sound/soc/sof/loader.c @@ -58,12 +58,6 @@ int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev) fw_filename, ret); } - /* - * Until the platform code is switched to use the new container the fw - * and payload offset must be set in plat_data - */ - plat_data->fw = sdev->basefw.fw; - plat_data->fw_offset = sdev->basefw.payload_offset; err: kfree(fw_filename); @@ -73,7 +67,6 @@ EXPORT_SYMBOL(snd_sof_load_firmware_raw); int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev) { - struct snd_sof_pdata *plat_data = sdev->pdata; int ret; ret = snd_sof_load_firmware_raw(sdev); @@ -108,7 +101,6 @@ int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev) error: release_firmware(sdev->basefw.fw); sdev->basefw.fw = NULL; - plat_data->fw = NULL; return ret; } @@ -194,6 +186,5 @@ void snd_sof_fw_unload(struct snd_sof_dev *sdev) /* TODO: support module unloading at runtime */ release_firmware(sdev->basefw.fw); sdev->basefw.fw = NULL; - sdev->pdata->fw = NULL; } EXPORT_SYMBOL(snd_sof_fw_unload); -- cgit v1.2.3-70-g09d2 From 25bbc0c59ee15cfc37acaaa831de447f2c2fbcb9 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 20 Oct 2022 15:12:30 +0300 Subject: ASoC: SOF: Add path definition for external firmware libraries IPC4 based firmware supports dynamically loaded external libraries. The libraries will be not stored alongside of the firmware or tplg files. For intel platforms the default path will be: intel/avs-lib|sof-ipc4-lib// if a community key is used on the given machine then the libraries will be under 'community' directory, like it is done for the firmware itself. Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Reviewed-by: Chao Song Reviewed-by: Kai Vehmanen Link: https://lore.kernel.org/r/20221020121238.18339-12-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown --- include/sound/sof.h | 6 +++++- sound/soc/sof/intel/pci-tgl.c | 3 +++ sound/soc/sof/sof-pci-dev.c | 26 ++++++++++++++++++++++++++ 3 files changed, 34 insertions(+), 1 deletion(-) (limited to 'include/sound') diff --git a/include/sound/sof.h b/include/sound/sof.h index e1f2f02666a7..266e66318f9c 100644 --- a/include/sound/sof.h +++ b/include/sound/sof.h @@ -82,6 +82,9 @@ struct snd_sof_pdata { const char *tplg_filename_prefix; const char *tplg_filename; + /* loadable external libraries available under this directory */ + const char *fw_lib_prefix; + /* machine */ struct platform_device *pdev_mach; const struct snd_soc_acpi_mach *machine; @@ -127,8 +130,9 @@ struct sof_dev_desc { unsigned int ipc_supported_mask; enum sof_ipc_type ipc_default; - /* defaults paths for firmware and topology files */ + /* defaults paths for firmware, library and topology files */ const char *default_fw_path[SOF_IPC_TYPE_COUNT]; + const char *default_lib_path[SOF_IPC_TYPE_COUNT]; const char *default_tplg_path[SOF_IPC_TYPE_COUNT]; /* default firmware name */ diff --git a/sound/soc/sof/intel/pci-tgl.c b/sound/soc/sof/intel/pci-tgl.c index 4cfe4f242fc5..757a7c6bb770 100644 --- a/sound/soc/sof/intel/pci-tgl.c +++ b/sound/soc/sof/intel/pci-tgl.c @@ -174,6 +174,9 @@ static const struct sof_dev_desc adl_n_desc = { [SOF_IPC] = "intel/sof", [SOF_INTEL_IPC4] = "intel/avs/adl-n", }, + .default_lib_path = { + [SOF_INTEL_IPC4] = "intel/avs-lib/adl-n", + }, .default_tplg_path = { [SOF_IPC] = "intel/sof-tplg", [SOF_INTEL_IPC4] = "intel/avs-tplg", diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c index 643fd1036d60..f5ece43d0ec2 100644 --- a/sound/soc/sof/sof-pci-dev.c +++ b/sound/soc/sof/sof-pci-dev.c @@ -28,6 +28,10 @@ static char *fw_filename; module_param(fw_filename, charp, 0444); MODULE_PARM_DESC(fw_filename, "alternate filename for SOF firmware."); +static char *lib_path; +module_param(lib_path, charp, 0444); +MODULE_PARM_DESC(lib_path, "alternate path for SOF firmware libraries."); + static char *tplg_path; module_param(tplg_path, charp, 0444); MODULE_PARM_DESC(tplg_path, "alternate path for SOF topology."); @@ -272,6 +276,28 @@ int sof_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) sof_pdata->desc->default_fw_path[sof_pdata->ipc_type]; } + if (lib_path) { + sof_pdata->fw_lib_prefix = lib_path; + + dev_dbg(dev, "Module parameter used, changed fw_lib path to %s\n", + sof_pdata->fw_lib_prefix); + + } else if (sof_pdata->desc->default_lib_path[sof_pdata->ipc_type]) { + if (dmi_check_system(community_key_platforms) && sof_dmi_use_community_key) { + sof_pdata->fw_lib_prefix = + devm_kasprintf(dev, GFP_KERNEL, "%s/%s", + sof_pdata->desc->default_lib_path[sof_pdata->ipc_type], + "community"); + + dev_dbg(dev, + "Platform uses community key, changed fw_lib path to %s\n", + sof_pdata->fw_lib_prefix); + } else { + sof_pdata->fw_lib_prefix = + sof_pdata->desc->default_lib_path[sof_pdata->ipc_type]; + } + } + if (tplg_path) sof_pdata->tplg_filename_prefix = tplg_path; else -- cgit v1.2.3-70-g09d2 From 3ab2c21e65188cac151de1fbe6adf841f2ecb082 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Thu, 20 Oct 2022 15:12:34 +0300 Subject: ASoC: SOF: Intel: Add ipc4 library loading implementation On Intel HDA platforms the library loading is done via DMA and an IPC message is also need to be sent to initiate the downloading of the new library. Co-developed-by: Ranjani Sridharan Signed-off-by: Ranjani Sridharan Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Reviewed-by: Chao Song Reviewed-by: Kai Vehmanen Link: https://lore.kernel.org/r/20221020121238.18339-16-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown --- include/sound/sof/ipc4/header.h | 4 +++ sound/soc/sof/intel/apl.c | 3 ++ sound/soc/sof/intel/cnl.c | 3 ++ sound/soc/sof/intel/hda-loader.c | 66 ++++++++++++++++++++++++++++++++++++++++ sound/soc/sof/intel/hda.h | 3 ++ sound/soc/sof/intel/icl.c | 3 ++ sound/soc/sof/intel/mtl.c | 3 ++ sound/soc/sof/intel/tgl.c | 3 ++ 8 files changed, 88 insertions(+) (limited to 'include/sound') diff --git a/include/sound/sof/ipc4/header.h b/include/sound/sof/ipc4/header.h index 99efe0ef1784..622193be7ac4 100644 --- a/include/sound/sof/ipc4/header.h +++ b/include/sound/sof/ipc4/header.h @@ -185,6 +185,10 @@ enum sof_ipc4_pipeline_state { #define SOF_IPC4_GLB_PIPE_STATE_MASK GENMASK(15, 0) #define SOF_IPC4_GLB_PIPE_STATE(x) ((x) << SOF_IPC4_GLB_PIPE_STATE_SHIFT) +/* load library ipc msg */ +#define SOF_IPC4_GLB_LOAD_LIBRARY_LIB_ID_SHIFT 16 +#define SOF_IPC4_GLB_LOAD_LIBRARY_LIB_ID(x) ((x) << SOF_IPC4_GLB_LOAD_LIBRARY_LIB_ID_SHIFT) + enum sof_ipc4_channel_config { /* one channel only. */ SOF_IPC4_CHANNEL_CONFIG_MONO, diff --git a/sound/soc/sof/intel/apl.c b/sound/soc/sof/intel/apl.c index 1549ca7587a4..d93b4ead3c37 100644 --- a/sound/soc/sof/intel/apl.c +++ b/sound/soc/sof/intel/apl.c @@ -62,6 +62,9 @@ int sof_apl_ops_init(struct snd_sof_dev *sdev) ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_1_5; + /* External library loading support */ + ipc4_data->load_library = hda_dsp_ipc4_load_library; + /* doorbell */ sof_apl_ops.irq_thread = hda_dsp_ipc4_irq_thread; diff --git a/sound/soc/sof/intel/cnl.c b/sound/soc/sof/intel/cnl.c index 19d0b1909bfd..f1e74b49deda 100644 --- a/sound/soc/sof/intel/cnl.c +++ b/sound/soc/sof/intel/cnl.c @@ -389,6 +389,9 @@ int sof_cnl_ops_init(struct snd_sof_dev *sdev) ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_1_8; + /* External library loading support */ + ipc4_data->load_library = hda_dsp_ipc4_load_library; + /* doorbell */ sof_cnl_ops.irq_thread = cnl_ipc4_irq_thread; diff --git a/sound/soc/sof/intel/hda-loader.c b/sound/soc/sof/intel/hda-loader.c index 5ed524e166d2..38204541fc5d 100644 --- a/sound/soc/sof/intel/hda-loader.c +++ b/sound/soc/sof/intel/hda-loader.c @@ -19,7 +19,9 @@ #include #include #include +#include #include "ext_manifest.h" +#include "../ipc4-priv.h" #include "../ops.h" #include "../sof-priv.h" #include "hda.h" @@ -518,6 +520,70 @@ cleanup: return ret; } +int hda_dsp_ipc4_load_library(struct snd_sof_dev *sdev, + struct sof_ipc4_fw_library *fw_lib, bool reload) +{ + struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; + struct hdac_ext_stream *hext_stream; + struct firmware stripped_firmware; + struct sof_ipc4_msg msg = {}; + struct snd_dma_buffer dmab; + int ret, ret1; + + /* IMR booting will restore the libraries as well, skip the loading */ + if (reload && hda->booted_from_imr) + return 0; + + /* the fw_lib has been verified during loading, we can trust the validity here */ + stripped_firmware.data = fw_lib->sof_fw.fw->data + fw_lib->sof_fw.payload_offset; + stripped_firmware.size = fw_lib->sof_fw.fw->size - fw_lib->sof_fw.payload_offset; + + /* prepare DMA for code loader stream */ + hext_stream = hda_cl_stream_prepare(sdev, HDA_CL_STREAM_FORMAT, + stripped_firmware.size, + &dmab, SNDRV_PCM_STREAM_PLAYBACK); + if (IS_ERR(hext_stream)) { + dev_err(sdev->dev, "%s: DMA prepare failed\n", __func__); + return PTR_ERR(hext_stream); + } + + memcpy(dmab.area, stripped_firmware.data, stripped_firmware.size); + + msg.primary = hext_stream->hstream.stream_tag - 1; + msg.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_GLB_LOAD_LIBRARY); + msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); + msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_FW_GEN_MSG); + msg.primary |= SOF_IPC4_GLB_LOAD_LIBRARY_LIB_ID(fw_lib->id); + + ret = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_START); + if (ret < 0) { + dev_err(sdev->dev, "%s: DMA trigger start failed\n", __func__); + goto cleanup; + } + + ret = sof_ipc_tx_message(sdev->ipc, &msg, 0, NULL, 0); + + ret1 = cl_trigger(sdev, hext_stream, SNDRV_PCM_TRIGGER_STOP); + if (ret1 < 0) { + dev_err(sdev->dev, "%s: DMA trigger stop failed\n", __func__); + if (!ret) + ret = ret1; + } + +cleanup: + /* clean up even in case of error and return the first error */ + ret1 = hda_cl_cleanup(sdev, &dmab, hext_stream); + if (ret1 < 0) { + dev_err(sdev->dev, "%s: Code loader DSP cleanup failed\n", __func__); + + /* set return value to indicate cleanup failure */ + if (!ret) + ret = ret1; + } + + return ret; +} + /* pre fw run operations */ int hda_dsp_pre_fw_run(struct snd_sof_dev *sdev) { diff --git a/sound/soc/sof/intel/hda.h b/sound/soc/sof/intel/hda.h index d004bcbb6326..4b9f3819f644 100644 --- a/sound/soc/sof/intel/hda.h +++ b/sound/soc/sof/intel/hda.h @@ -857,4 +857,7 @@ int hda_dsp_ipc4_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) void hda_ipc4_dump(struct snd_sof_dev *sdev); extern struct sdw_intel_ops sdw_callback; +struct sof_ipc4_fw_library; +int hda_dsp_ipc4_load_library(struct snd_sof_dev *sdev, + struct sof_ipc4_fw_library *fw_lib, bool reload); #endif diff --git a/sound/soc/sof/intel/icl.c b/sound/soc/sof/intel/icl.c index 6d5877108a3d..f95b2ec57077 100644 --- a/sound/soc/sof/intel/icl.c +++ b/sound/soc/sof/intel/icl.c @@ -130,6 +130,9 @@ int sof_icl_ops_init(struct snd_sof_dev *sdev) ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_2; + /* External library loading support */ + ipc4_data->load_library = hda_dsp_ipc4_load_library; + /* doorbell */ sof_icl_ops.irq_thread = cnl_ipc4_irq_thread; diff --git a/sound/soc/sof/intel/mtl.c b/sound/soc/sof/intel/mtl.c index 10298532816f..459da05f4d7a 100644 --- a/sound/soc/sof/intel/mtl.c +++ b/sound/soc/sof/intel/mtl.c @@ -641,6 +641,9 @@ int sof_mtl_ops_init(struct snd_sof_dev *sdev) ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_2; + /* External library loading support */ + ipc4_data->load_library = hda_dsp_ipc4_load_library; + /* set DAI ops */ hda_set_dai_drv_ops(sdev, &sof_mtl_ops); diff --git a/sound/soc/sof/intel/tgl.c b/sound/soc/sof/intel/tgl.c index 9ae2890e9dac..143447f7c1ac 100644 --- a/sound/soc/sof/intel/tgl.c +++ b/sound/soc/sof/intel/tgl.c @@ -85,6 +85,9 @@ int sof_tgl_ops_init(struct snd_sof_dev *sdev) ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_2; + /* External library loading support */ + ipc4_data->load_library = hda_dsp_ipc4_load_library; + /* doorbell */ sof_tgl_ops.irq_thread = cnl_ipc4_irq_thread; -- cgit v1.2.3-70-g09d2 From 2b9a50ea845ebe95473f5b85dfcc9b806c252fac Mon Sep 17 00:00:00 2001 From: Cezary Rojewski Date: Thu, 27 Oct 2022 14:46:55 +0200 Subject: ASoC: Intel: avs: Introduce PCM power management routines Implement suspend/resume() operations for component drivers. For most scenarios, the PM flow is similar to standard streaming one, except for the part where the position register are being saved and the lack of PCM pages freeing. To reduce code duplication, all avs_dai_suspend_XXX() and avs_dai_resume_XXX() functions reuse their non-PM equivalents. Given that path binding/unbinding happens only in FE part of the stream, the order of suspend() goes: 1. hw_free() all FE DAIs, paths are unbound here 2. hw_free() all BE DAIs Consequently, for resume() its: 1. hw_params() all BE DAIs 2. hw_params() all FE DAIs, paths are bound here 3. prepare() all BE DAIs 4. prepare() all FE DAIs As component->suspend/resume() do not provide substream pointer, store it ourselves so that the PM flow has all the necessary information to proceed. Signed-off-by: Cezary Rojewski Link: https://lore.kernel.org/r/20221027124702.1761002-3-cezary.rojewski@intel.com Signed-off-by: Mark Brown --- include/sound/hdaudio_ext.h | 5 ++ sound/soc/intel/avs/pcm.c | 214 +++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 215 insertions(+), 4 deletions(-) (limited to 'include/sound') diff --git a/include/sound/hdaudio_ext.h b/include/sound/hdaudio_ext.h index 90fd47e05370..68ab89211de2 100644 --- a/include/sound/hdaudio_ext.h +++ b/include/sound/hdaudio_ext.h @@ -51,6 +51,11 @@ struct hdac_ext_stream { void __iomem *pphc_addr; void __iomem *pplc_addr; + u32 pphcllpl; + u32 pphcllpu; + u32 pphcldpl; + u32 pphcldpu; + bool decoupled:1; bool link_locked:1; bool link_prepared; diff --git a/sound/soc/intel/avs/pcm.c b/sound/soc/intel/avs/pcm.c index fea801243d37..df965dbb8d12 100644 --- a/sound/soc/intel/avs/pcm.c +++ b/sound/soc/intel/avs/pcm.c @@ -28,6 +28,8 @@ struct avs_dma_data { * host stream assigned */ struct hdac_ext_stream *host_stream; + + struct snd_pcm_substream *substream; }; static struct avs_tplg_path_template * @@ -55,7 +57,8 @@ avs_dai_find_path_template(struct snd_soc_dai *dai, bool is_fe, int direction) return dw->priv; } -static int avs_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai, bool is_fe) +static int avs_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai, bool is_fe, + const struct snd_soc_dai_ops *ops) { struct avs_tplg_path_template *template; struct avs_dma_data *data; @@ -71,6 +74,7 @@ static int avs_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_d if (!data) return -ENOMEM; + data->substream = substream; data->template = template; snd_soc_dai_set_dma_data(dai, substream, data); @@ -151,9 +155,11 @@ static int avs_dai_prepare(struct avs_dev *adev, struct snd_pcm_substream *subst return ret; } +static const struct snd_soc_dai_ops avs_dai_nonhda_be_ops; + static int avs_dai_nonhda_be_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - return avs_dai_startup(substream, dai, false); + return avs_dai_startup(substream, dai, false, &avs_dai_nonhda_be_ops); } static void avs_dai_nonhda_be_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) @@ -245,9 +251,11 @@ static const struct snd_soc_dai_ops avs_dai_nonhda_be_ops = { .trigger = avs_dai_nonhda_be_trigger, }; +static const struct snd_soc_dai_ops avs_dai_hda_be_ops; + static int avs_dai_hda_be_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - return avs_dai_startup(substream, dai, false); + return avs_dai_startup(substream, dai, false, &avs_dai_hda_be_ops); } static void avs_dai_hda_be_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) @@ -407,6 +415,8 @@ static const struct snd_pcm_hw_constraint_list hw_rates = { .mask = 0, }; +const struct snd_soc_dai_ops avs_dai_fe_ops; + static int avs_dai_fe_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct snd_pcm_runtime *runtime = substream->runtime; @@ -416,7 +426,7 @@ static int avs_dai_fe_startup(struct snd_pcm_substream *substream, struct snd_so struct hdac_ext_stream *host_stream; int ret; - ret = avs_dai_startup(substream, dai, true); + ret = avs_dai_startup(substream, dai, true, &avs_dai_fe_ops); if (ret) return ret; @@ -758,6 +768,198 @@ static void avs_component_remove(struct snd_soc_component *component) } } +static int avs_dai_resume_hw_params(struct snd_soc_dai *dai, struct avs_dma_data *data) +{ + struct snd_pcm_substream *substream; + struct snd_soc_pcm_runtime *rtd; + int ret; + + substream = data->substream; + rtd = snd_pcm_substream_chip(substream); + + ret = dai->driver->ops->hw_params(substream, &rtd->dpcm[substream->stream].hw_params, dai); + if (ret) + dev_err(dai->dev, "hw_params on resume failed: %d\n", ret); + + return ret; +} + +static int avs_dai_resume_fe_prepare(struct snd_soc_dai *dai, struct avs_dma_data *data) +{ + struct hdac_ext_stream *host_stream; + struct hdac_stream *hstream; + struct hdac_bus *bus; + int ret; + + host_stream = data->host_stream; + hstream = hdac_stream(host_stream); + bus = hdac_stream(host_stream)->bus; + + /* Set DRSM before programming stream and position registers. */ + snd_hdac_stream_drsm_enable(bus, true, hstream->index); + + ret = dai->driver->ops->prepare(data->substream, dai); + if (ret) { + dev_err(dai->dev, "prepare FE on resume failed: %d\n", ret); + return ret; + } + + writel(host_stream->pphcllpl, host_stream->pphc_addr + AZX_REG_PPHCLLPL); + writel(host_stream->pphcllpu, host_stream->pphc_addr + AZX_REG_PPHCLLPU); + writel(host_stream->pphcldpl, host_stream->pphc_addr + AZX_REG_PPHCLDPL); + writel(host_stream->pphcldpu, host_stream->pphc_addr + AZX_REG_PPHCLDPU); + + /* As per HW spec recommendation, program LPIB and DPIB to the same value. */ + snd_hdac_stream_set_lpib(hstream, hstream->lpib); + snd_hdac_stream_set_dpibr(bus, hstream, hstream->lpib); + + return 0; +} + +static int avs_dai_resume_be_prepare(struct snd_soc_dai *dai, struct avs_dma_data *data) +{ + int ret; + + ret = dai->driver->ops->prepare(data->substream, dai); + if (ret) + dev_err(dai->dev, "prepare BE on resume failed: %d\n", ret); + + return ret; +} + +static int avs_dai_suspend_fe_hw_free(struct snd_soc_dai *dai, struct avs_dma_data *data) +{ + struct hdac_ext_stream *host_stream; + int ret; + + host_stream = data->host_stream; + + /* Store position addresses so we can resume from them later on. */ + hdac_stream(host_stream)->lpib = snd_hdac_stream_get_pos_lpib(hdac_stream(host_stream)); + host_stream->pphcllpl = readl(host_stream->pphc_addr + AZX_REG_PPHCLLPL); + host_stream->pphcllpu = readl(host_stream->pphc_addr + AZX_REG_PPHCLLPU); + host_stream->pphcldpl = readl(host_stream->pphc_addr + AZX_REG_PPHCLDPL); + host_stream->pphcldpu = readl(host_stream->pphc_addr + AZX_REG_PPHCLDPU); + + ret = __avs_dai_fe_hw_free(data->substream, dai); + if (ret < 0) + dev_err(dai->dev, "hw_free FE on suspend failed: %d\n", ret); + + return ret; +} + +static int avs_dai_suspend_be_hw_free(struct snd_soc_dai *dai, struct avs_dma_data *data) +{ + int ret; + + ret = dai->driver->ops->hw_free(data->substream, dai); + if (ret < 0) + dev_err(dai->dev, "hw_free BE on suspend failed: %d\n", ret); + + return ret; +} + +static int avs_component_pm_op(struct snd_soc_component *component, bool be, + int (*op)(struct snd_soc_dai *, struct avs_dma_data *)) +{ + struct snd_soc_pcm_runtime *rtd; + struct avs_dma_data *data; + struct snd_soc_dai *dai; + int ret; + + for_each_component_dais(component, dai) { + data = dai->playback_dma_data; + if (data) { + rtd = snd_pcm_substream_chip(data->substream); + if (rtd->dai_link->no_pcm == be && !rtd->dai_link->ignore_suspend) { + ret = op(dai, data); + if (ret < 0) + return ret; + } + } + + data = dai->capture_dma_data; + if (data) { + rtd = snd_pcm_substream_chip(data->substream); + if (rtd->dai_link->no_pcm == be && !rtd->dai_link->ignore_suspend) { + ret = op(dai, data); + if (ret < 0) + return ret; + } + } + } + + return 0; +} + +static int avs_component_resume_hw_params(struct snd_soc_component *component, bool be) +{ + return avs_component_pm_op(component, be, &avs_dai_resume_hw_params); +} + +static int avs_component_resume_prepare(struct snd_soc_component *component, bool be) +{ + int (*prepare_cb)(struct snd_soc_dai *dai, struct avs_dma_data *data); + + if (be) + prepare_cb = &avs_dai_resume_be_prepare; + else + prepare_cb = &avs_dai_resume_fe_prepare; + + return avs_component_pm_op(component, be, prepare_cb); +} + +static int avs_component_suspend_hw_free(struct snd_soc_component *component, bool be) +{ + int (*hw_free_cb)(struct snd_soc_dai *dai, struct avs_dma_data *data); + + if (be) + hw_free_cb = &avs_dai_suspend_be_hw_free; + else + hw_free_cb = &avs_dai_suspend_fe_hw_free; + + return avs_component_pm_op(component, be, hw_free_cb); +} + +static int avs_component_suspend(struct snd_soc_component *component) +{ + int ret; + + /* + * When freeing paths, FEs need to be first as they perform + * path unbinding. + */ + ret = avs_component_suspend_hw_free(component, false); + if (ret) + return ret; + + return avs_component_suspend_hw_free(component, true); +} + +static int avs_component_resume(struct snd_soc_component *component) +{ + int ret; + + /* + * When creating paths, FEs need to be last as they perform + * path binding. + */ + ret = avs_component_resume_hw_params(component, true); + if (ret) + return ret; + + ret = avs_component_resume_hw_params(component, false); + if (ret) + return ret; + + /* It is expected that the LINK stream is prepared first. */ + ret = avs_component_resume_prepare(component, true); + if (ret) + return ret; + + return avs_component_resume_prepare(component, false); +} + static int avs_component_open(struct snd_soc_component *component, struct snd_pcm_substream *substream) { @@ -846,6 +1048,8 @@ static const struct snd_soc_component_driver avs_component_driver = { .name = "avs-pcm", .probe = avs_component_probe, .remove = avs_component_remove, + .suspend = avs_component_suspend, + .resume = avs_component_resume, .open = avs_component_open, .pointer = avs_component_pointer, .mmap = avs_component_mmap, @@ -1161,6 +1365,8 @@ static const struct snd_soc_component_driver avs_hda_component_driver = { .name = "avs-hda-pcm", .probe = avs_component_hda_probe, .remove = avs_component_hda_remove, + .suspend = avs_component_suspend, + .resume = avs_component_resume, .open = avs_component_hda_open, .close = avs_component_hda_close, .pointer = avs_component_pointer, -- cgit v1.2.3-70-g09d2 From efffb014478e76c35b1a9e279d7010f70ff517e2 Mon Sep 17 00:00:00 2001 From: Cezary Rojewski Date: Thu, 27 Oct 2022 14:46:56 +0200 Subject: ALSA: hda: Introduce snd_hdac_stream_wait_drsm() Allow for waiting for DRSM bit for specified stream to be cleared from HDAudio library level. Drivers may utilize this optional step during the stream resume procedure. Suggested-by: Pierre-Louis Bossart Signed-off-by: Cezary Rojewski Reviewed-by: Takashi Iwai Link: https://lore.kernel.org/r/20221027124702.1761002-4-cezary.rojewski@intel.com Signed-off-by: Mark Brown --- include/sound/hdaudio.h | 1 + sound/hda/hdac_stream.c | 22 ++++++++++++++++++++++ 2 files changed, 23 insertions(+) (limited to 'include/sound') diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h index 78f1809a4ad6..a6872537724d 100644 --- a/include/sound/hdaudio.h +++ b/include/sound/hdaudio.h @@ -597,6 +597,7 @@ int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus, struct hdac_stream *azx_dev); void snd_hdac_stream_drsm_enable(struct hdac_bus *bus, bool enable, int index); +int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev); int snd_hdac_stream_set_dpibr(struct hdac_bus *bus, struct hdac_stream *azx_dev, u32 value); int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value); diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c index 35fe2bd582ac..3b250ee7f6a7 100644 --- a/sound/hda/hdac_stream.c +++ b/sound/hda/hdac_stream.c @@ -821,6 +821,28 @@ void snd_hdac_stream_drsm_enable(struct hdac_bus *bus, } EXPORT_SYMBOL_GPL(snd_hdac_stream_drsm_enable); +/* + * snd_hdac_stream_wait_drsm - wait for HW to clear RSM for a stream + * @azx_dev: HD-audio core stream to await RSM for + * + * Returns 0 on success and -ETIMEDOUT upon a timeout. + */ +int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev) +{ + struct hdac_bus *bus = azx_dev->bus; + u32 mask, reg; + int ret; + + mask = 1 << azx_dev->index; + + ret = read_poll_timeout(snd_hdac_reg_readl, reg, !(reg & mask), 250, 2000, false, bus, + bus->drsmcap + AZX_REG_DRSM_CTL); + if (ret) + dev_dbg(bus->dev, "polling RSM 0x%08x failed: %d\n", mask, ret); + return ret; +} +EXPORT_SYMBOL_GPL(snd_hdac_stream_wait_drsm); + /** * snd_hdac_stream_set_dpibr - sets the dpibr value of a stream * @bus: HD-audio core bus -- cgit v1.2.3-70-g09d2 From 426c7bf45f207ac7a962e012dd482f7aaa3a3d5f Mon Sep 17 00:00:00 2001 From: Dmitry Torokhov Date: Wed, 2 Nov 2022 16:20:03 -0700 Subject: ASoC: tlv320aic3x: remove support for platform data Signed-off-by: Dmitry Torokhov Link: https://lore.kernel.org/r/20221102232004.1721864-2-dmitry.torokhov@gmail.com Signed-off-by: Mark Brown --- include/sound/tlv320aic3x.h | 65 ------------------------------------------ sound/soc/codecs/tlv320aic3x.c | 12 ++++---- sound/soc/codecs/tlv320aic3x.h | 43 ++++++++++++++++++++++++++++ 3 files changed, 48 insertions(+), 72 deletions(-) delete mode 100644 include/sound/tlv320aic3x.h (limited to 'include/sound') diff --git a/include/sound/tlv320aic3x.h b/include/sound/tlv320aic3x.h deleted file mode 100644 index b660a9ed05ec..000000000000 --- a/include/sound/tlv320aic3x.h +++ /dev/null @@ -1,65 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Platform data for Texas Instruments TLV320AIC3x codec - * - * Author: Jarkko Nikula - */ -#ifndef __TLV320AIC3x_H__ -#define __TLV320AIC3x_H__ - -/* GPIO API */ -enum { - AIC3X_GPIO1_FUNC_DISABLED = 0, - AIC3X_GPIO1_FUNC_AUDIO_WORDCLK_ADC = 1, - AIC3X_GPIO1_FUNC_CLOCK_MUX = 2, - AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV2 = 3, - AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV4 = 4, - AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV8 = 5, - AIC3X_GPIO1_FUNC_SHORT_CIRCUIT_IRQ = 6, - AIC3X_GPIO1_FUNC_AGC_NOISE_IRQ = 7, - AIC3X_GPIO1_FUNC_INPUT = 8, - AIC3X_GPIO1_FUNC_OUTPUT = 9, - AIC3X_GPIO1_FUNC_DIGITAL_MIC_MODCLK = 10, - AIC3X_GPIO1_FUNC_AUDIO_WORDCLK = 11, - AIC3X_GPIO1_FUNC_BUTTON_IRQ = 12, - AIC3X_GPIO1_FUNC_HEADSET_DETECT_IRQ = 13, - AIC3X_GPIO1_FUNC_HEADSET_DETECT_OR_BUTTON_IRQ = 14, - AIC3X_GPIO1_FUNC_ALL_IRQ = 16 -}; - -enum { - AIC3X_GPIO2_FUNC_DISABLED = 0, - AIC3X_GPIO2_FUNC_HEADSET_DETECT_IRQ = 2, - AIC3X_GPIO2_FUNC_INPUT = 3, - AIC3X_GPIO2_FUNC_OUTPUT = 4, - AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT = 5, - AIC3X_GPIO2_FUNC_AUDIO_BITCLK = 8, - AIC3X_GPIO2_FUNC_HEADSET_DETECT_OR_BUTTON_IRQ = 9, - AIC3X_GPIO2_FUNC_ALL_IRQ = 10, - AIC3X_GPIO2_FUNC_SHORT_CIRCUIT_OR_AGC_IRQ = 11, - AIC3X_GPIO2_FUNC_HEADSET_OR_BUTTON_PRESS_OR_SHORT_CIRCUIT_IRQ = 12, - AIC3X_GPIO2_FUNC_SHORT_CIRCUIT_IRQ = 13, - AIC3X_GPIO2_FUNC_AGC_NOISE_IRQ = 14, - AIC3X_GPIO2_FUNC_BUTTON_PRESS_IRQ = 15 -}; - -enum aic3x_micbias_voltage { - AIC3X_MICBIAS_OFF = 0, - AIC3X_MICBIAS_2_0V = 1, - AIC3X_MICBIAS_2_5V = 2, - AIC3X_MICBIAS_AVDDV = 3, -}; - -struct aic3x_setup_data { - unsigned int gpio_func[2]; -}; - -struct aic3x_pdata { - int gpio_reset; /* < 0 if not used */ - struct aic3x_setup_data *setup; - - /* Selects the micbias voltage */ - enum aic3x_micbias_voltage micbias_vg; -}; - -#endif diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index 08938801daec..9b2bb99cc165 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -45,7 +45,6 @@ #include #include #include -#include #include "tlv320aic3x.h" @@ -66,6 +65,10 @@ struct aic3x_disable_nb { struct aic3x_priv *aic3x; }; +struct aic3x_setup_data { + unsigned int gpio_func[2]; +}; + /* codec private data */ struct aic3x_priv { struct snd_soc_component *component; @@ -1748,7 +1751,6 @@ static const struct reg_sequence aic3007_class_d[] = { int aic3x_probe(struct device *dev, struct regmap *regmap, kernel_ulong_t driver_data) { - struct aic3x_pdata *pdata = dev->platform_data; struct aic3x_priv *aic3x; struct aic3x_setup_data *ai3x_setup; struct device_node *np = dev->of_node; @@ -1768,11 +1770,7 @@ int aic3x_probe(struct device *dev, struct regmap *regmap, kernel_ulong_t driver regcache_cache_only(aic3x->regmap, true); dev_set_drvdata(dev, aic3x); - if (pdata) { - aic3x->gpio_reset = pdata->gpio_reset; - aic3x->setup = pdata->setup; - aic3x->micbias_vg = pdata->micbias_vg; - } else if (np) { + if (np) { ai3x_setup = devm_kzalloc(dev, sizeof(*ai3x_setup), GFP_KERNEL); if (!ai3x_setup) return -ENOMEM; diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h index 14298f9e6d9b..066e5a6322b8 100644 --- a/sound/soc/codecs/tlv320aic3x.h +++ b/sound/soc/codecs/tlv320aic3x.h @@ -298,4 +298,47 @@ enum { #define AIC3X_BUTTON_DEBOUNCE_SHIFT 0 #define AIC3X_BUTTON_DEBOUNCE_MASK 3 +/* GPIO API */ +enum { + AIC3X_GPIO1_FUNC_DISABLED = 0, + AIC3X_GPIO1_FUNC_AUDIO_WORDCLK_ADC = 1, + AIC3X_GPIO1_FUNC_CLOCK_MUX = 2, + AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV2 = 3, + AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV4 = 4, + AIC3X_GPIO1_FUNC_CLOCK_MUX_DIV8 = 5, + AIC3X_GPIO1_FUNC_SHORT_CIRCUIT_IRQ = 6, + AIC3X_GPIO1_FUNC_AGC_NOISE_IRQ = 7, + AIC3X_GPIO1_FUNC_INPUT = 8, + AIC3X_GPIO1_FUNC_OUTPUT = 9, + AIC3X_GPIO1_FUNC_DIGITAL_MIC_MODCLK = 10, + AIC3X_GPIO1_FUNC_AUDIO_WORDCLK = 11, + AIC3X_GPIO1_FUNC_BUTTON_IRQ = 12, + AIC3X_GPIO1_FUNC_HEADSET_DETECT_IRQ = 13, + AIC3X_GPIO1_FUNC_HEADSET_DETECT_OR_BUTTON_IRQ = 14, + AIC3X_GPIO1_FUNC_ALL_IRQ = 16 +}; + +enum { + AIC3X_GPIO2_FUNC_DISABLED = 0, + AIC3X_GPIO2_FUNC_HEADSET_DETECT_IRQ = 2, + AIC3X_GPIO2_FUNC_INPUT = 3, + AIC3X_GPIO2_FUNC_OUTPUT = 4, + AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT = 5, + AIC3X_GPIO2_FUNC_AUDIO_BITCLK = 8, + AIC3X_GPIO2_FUNC_HEADSET_DETECT_OR_BUTTON_IRQ = 9, + AIC3X_GPIO2_FUNC_ALL_IRQ = 10, + AIC3X_GPIO2_FUNC_SHORT_CIRCUIT_OR_AGC_IRQ = 11, + AIC3X_GPIO2_FUNC_HEADSET_OR_BUTTON_PRESS_OR_SHORT_CIRCUIT_IRQ = 12, + AIC3X_GPIO2_FUNC_SHORT_CIRCUIT_IRQ = 13, + AIC3X_GPIO2_FUNC_AGC_NOISE_IRQ = 14, + AIC3X_GPIO2_FUNC_BUTTON_PRESS_IRQ = 15 +}; + +enum aic3x_micbias_voltage { + AIC3X_MICBIAS_OFF = 0, + AIC3X_MICBIAS_2_0V = 1, + AIC3X_MICBIAS_2_5V = 2, + AIC3X_MICBIAS_AVDDV = 3, +}; + #endif /* _AIC3X_H */ -- cgit v1.2.3-70-g09d2 From 4b19211435950a78af032c26ad64a5268e6012be Mon Sep 17 00:00:00 2001 From: syed saba kareem Date: Fri, 4 Nov 2022 17:39:07 +0530 Subject: ASoC: amd: fix ACP version typo mistake Pink Sardine is based on ACP6.3 architecture. This patch fixes the typo mistake acp6.2 -> acp6.3 Signed-off-by: syed saba kareem Link: https://lore.kernel.org/r/20221104121001.207992-1-Syed.SabaKareem@amd.com Signed-off-by: Mark Brown --- include/sound/acp62_chip_offset_byte.h | 658 --------------------------------- include/sound/acp63_chip_offset_byte.h | 658 +++++++++++++++++++++++++++++++++ sound/soc/amd/Kconfig | 4 +- sound/soc/amd/ps/acp62.h | 98 ----- sound/soc/amd/ps/acp63.h | 98 +++++ sound/soc/amd/ps/pci-ps.c | 132 +++---- sound/soc/amd/ps/ps-mach.c | 30 +- sound/soc/amd/ps/ps-pdm-dma.c | 188 +++++----- 8 files changed, 933 insertions(+), 933 deletions(-) delete mode 100644 include/sound/acp62_chip_offset_byte.h create mode 100644 include/sound/acp63_chip_offset_byte.h delete mode 100644 sound/soc/amd/ps/acp62.h create mode 100644 sound/soc/amd/ps/acp63.h (limited to 'include/sound') diff --git a/include/sound/acp62_chip_offset_byte.h b/include/sound/acp62_chip_offset_byte.h deleted file mode 100644 index ca38f8a0966e..000000000000 --- a/include/sound/acp62_chip_offset_byte.h +++ /dev/null @@ -1,658 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * AMD ACP 6.2 Register Documentation - * - * Copyright 2022 Advanced Micro Devices, Inc. - */ - -#ifndef _acp_ip_OFFSET_HEADER -#define _acp_ip_OFFSET_HEADER - -/* Registers from ACP_DMA block */ -#define ACP_DMA_CNTL_0 0x0000000 -#define ACP_DMA_CNTL_1 0x0000004 -#define ACP_DMA_CNTL_2 0x0000008 -#define ACP_DMA_CNTL_3 0x000000C -#define ACP_DMA_CNTL_4 0x0000010 -#define ACP_DMA_CNTL_5 0x0000014 -#define ACP_DMA_CNTL_6 0x0000018 -#define ACP_DMA_CNTL_7 0x000001C -#define ACP_DMA_DSCR_STRT_IDX_0 0x0000020 -#define ACP_DMA_DSCR_STRT_IDX_1 0x0000024 -#define ACP_DMA_DSCR_STRT_IDX_2 0x0000028 -#define ACP_DMA_DSCR_STRT_IDX_3 0x000002C -#define ACP_DMA_DSCR_STRT_IDX_4 0x0000030 -#define ACP_DMA_DSCR_STRT_IDX_5 0x0000034 -#define ACP_DMA_DSCR_STRT_IDX_6 0x0000038 -#define ACP_DMA_DSCR_STRT_IDX_7 0x000003C -#define ACP_DMA_DSCR_CNT_0 0x0000040 -#define ACP_DMA_DSCR_CNT_1 0x0000044 -#define ACP_DMA_DSCR_CNT_2 0x0000048 -#define ACP_DMA_DSCR_CNT_3 0x000004C -#define ACP_DMA_DSCR_CNT_4 0x0000050 -#define ACP_DMA_DSCR_CNT_5 0x0000054 -#define ACP_DMA_DSCR_CNT_6 0x0000058 -#define ACP_DMA_DSCR_CNT_7 0x000005C -#define ACP_DMA_PRIO_0 0x0000060 -#define ACP_DMA_PRIO_1 0x0000064 -#define ACP_DMA_PRIO_2 0x0000068 -#define ACP_DMA_PRIO_3 0x000006C -#define ACP_DMA_PRIO_4 0x0000070 -#define ACP_DMA_PRIO_5 0x0000074 -#define ACP_DMA_PRIO_6 0x0000078 -#define ACP_DMA_PRIO_7 0x000007C -#define ACP_DMA_CUR_DSCR_0 0x0000080 -#define ACP_DMA_CUR_DSCR_1 0x0000084 -#define ACP_DMA_CUR_DSCR_2 0x0000088 -#define ACP_DMA_CUR_DSCR_3 0x000008C -#define ACP_DMA_CUR_DSCR_4 0x0000090 -#define ACP_DMA_CUR_DSCR_5 0x0000094 -#define ACP_DMA_CUR_DSCR_6 0x0000098 -#define ACP_DMA_CUR_DSCR_7 0x000009C -#define ACP_DMA_CUR_TRANS_CNT_0 0x00000A0 -#define ACP_DMA_CUR_TRANS_CNT_1 0x00000A4 -#define ACP_DMA_CUR_TRANS_CNT_2 0x00000A8 -#define ACP_DMA_CUR_TRANS_CNT_3 0x00000AC -#define ACP_DMA_CUR_TRANS_CNT_4 0x00000B0 -#define ACP_DMA_CUR_TRANS_CNT_5 0x00000B4 -#define ACP_DMA_CUR_TRANS_CNT_6 0x00000B8 -#define ACP_DMA_CUR_TRANS_CNT_7 0x00000BC -#define ACP_DMA_ERR_STS_0 0x00000C0 -#define ACP_DMA_ERR_STS_1 0x00000C4 -#define ACP_DMA_ERR_STS_2 0x00000C8 -#define ACP_DMA_ERR_STS_3 0x00000CC -#define ACP_DMA_ERR_STS_4 0x00000D0 -#define ACP_DMA_ERR_STS_5 0x00000D4 -#define ACP_DMA_ERR_STS_6 0x00000D8 -#define ACP_DMA_ERR_STS_7 0x00000DC -#define ACP_DMA_DESC_BASE_ADDR 0x00000E0 -#define ACP_DMA_DESC_MAX_NUM_DSCR 0x00000E4 -#define ACP_DMA_CH_STS 0x00000E8 -#define ACP_DMA_CH_GROUP 0x00000EC -#define ACP_DMA_CH_RST_STS 0x00000F0 - -/* Registers from ACP_AXI2AXIATU block */ -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x0000C00 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x0000C04 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x0000C08 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x0000C0C -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x0000C10 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x0000C14 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x0000C18 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x0000C1C -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x0000C20 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x0000C24 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x0000C28 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x0000C2C -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x0000C30 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x0000C34 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x0000C38 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x0000C3C -#define ACPAXI2AXI_ATU_CTRL 0x0000C40 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_9 0x0000C44 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_9 0x0000C48 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_10 0x0000C4C -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_10 0x0000C50 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_11 0x0000C54 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_11 0x0000C58 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_12 0x0000C5C -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_12 0x0000C60 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_13 0x0000C64 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_13 0x0000C68 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_14 0x0000C6C -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_14 0x0000C70 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_15 0x0000C74 -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_15 0x0000C78 -#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_16 0x0000C7C -#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_16 0x0000C80 - -/* Registers from ACP_CLKRST block */ -#define ACP_SOFT_RESET 0x0001000 -#define ACP_CONTROL 0x0001004 -#define ACP_STATUS 0x0001008 -#define ACP_DYNAMIC_CG_MASTER_CONTROL 0x0001010 -#define ACP_ZSC_DSP_CTRL 0x0001014 -#define ACP_ZSC_STS 0x0001018 -#define ACP_PGFSM_CONTROL 0x0001024 -#define ACP_PGFSM_STATUS 0x0001028 -#define ACP_CLKMUX_SEL 0x000102C - -/* Registers from ACP_AON block */ -#define ACP_PME_EN 0x0001400 -#define ACP_DEVICE_STATE 0x0001404 -#define AZ_DEVICE_STATE 0x0001408 -#define ACP_PIN_CONFIG 0x0001440 -#define ACP_PAD_PULLUP_CTRL 0x0001444 -#define ACP_PAD_PULLDOWN_CTRL 0x0001448 -#define ACP_PAD_DRIVE_STRENGTH_CTRL 0x000144C -#define ACP_PAD_SCHMEN_CTRL 0x0001450 -#define ACP_SW_PAD_KEEPER_EN 0x0001454 -#define ACP_SW_WAKE_EN 0x0001458 -#define ACP_I2S_WAKE_EN 0x000145C -#define ACP_SW1_WAKE_EN 0x0001460 - -#define ACP_SW_I2S_ERROR_REASON 0x00018B4 -#define ACP_SW_POS_TRACK_I2S_TX_CTRL 0x00018B8 -#define ACP_SW_I2S_TX_DMA_POS 0x00018BC -#define ACP_SW_POS_TRACK_BT_TX_CTRL 0x00018C0 -#define ACP_SW_BT_TX_DMA_POS 0x00018C4 -#define ACP_SW_POS_TRACK_HS_TX_CTRL 0x00018C8 -#define ACP_SW_HS_TX_DMA_POS 0x00018CC -#define ACP_SW_POS_TRACK_I2S_RX_CTRL 0x00018D0 -#define ACP_SW_I2S_RX_DMA_POS 0x00018D4 -#define ACP_SW_POS_TRACK_BT_RX_CTRL 0x00018D8 -#define ACP_SW_BT_RX_DMA_POS 0x00018DC -#define ACP_SW_POS_TRACK_HS_RX_CTRL 0x00018E0 -#define ACP_SW_HS_RX_DMA_POS 0x00018E4 -#define ACP_ERROR_INTR_MASK1 0X0001974 -#define ACP_ERROR_INTR_MASK2 0X0001978 -#define ACP_ERROR_INTR_MASK3 0X000197C - -/* Registers from ACP_P1_MISC block */ -#define ACP_EXTERNAL_INTR_ENB 0x0001A00 -#define ACP_EXTERNAL_INTR_CNTL 0x0001A04 -#define ACP_EXTERNAL_INTR_CNTL1 0x0001A08 -#define ACP_EXTERNAL_INTR_STAT 0x0001A0C -#define ACP_EXTERNAL_INTR_STAT1 0x0001A10 -#define ACP_ERROR_STATUS 0x0001A4C -#define ACP_P1_SW_I2S_ERROR_REASON 0x0001A50 -#define ACP_P1_SW_POS_TRACK_I2S_TX_CTRL 0x0001A6C -#define ACP_P1_SW_I2S_TX_DMA_POS 0x0001A70 -#define ACP_P1_SW_POS_TRACK_I2S_RX_CTRL 0x0001A74 -#define ACP_P1_SW_I2S_RX_DMA_POS 0x0001A78 -#define ACP_P1_DMIC_I2S_GPIO_INTR_CTRL 0x0001A7C -#define ACP_P1_DMIC_I2S_GPIO_INTR_STATUS 0x0001A80 -#define ACP_SCRATCH_REG_BASE_ADDR 0x0001A84 -#define ACP_P1_SW_POS_TRACK_BT_TX_CTRL 0x0001A88 -#define ACP_P1_SW_BT_TX_DMA_POS 0x0001A8C -#define ACP_P1_SW_POS_TRACK_HS_TX_CTRL 0x0001A90 -#define ACP_P1_SW_HS_TX_DMA_POS 0x0001A94 -#define ACP_P1_SW_POS_TRACK_BT_RX_CTRL 0x0001A98 -#define ACP_P1_SW_BT_RX_DMA_POS 0x0001A9C -#define ACP_P1_SW_POS_TRACK_HS_RX_CTRL 0x0001AA0 -#define ACP_P1_SW_HS_RX_DMA_POS 0x0001AA4 -#define ACP_ERROR_INTR_MASK4 0X0001AEC -#define ACP_ERROR_INTR_MASK5 0X0001AF0 - -/* Registers from ACP_AUDIO_BUFFERS block */ -#define ACP_I2S_RX_RINGBUFADDR 0x0002000 -#define ACP_I2S_RX_RINGBUFSIZE 0x0002004 -#define ACP_I2S_RX_LINKPOSITIONCNTR 0x0002008 -#define ACP_I2S_RX_FIFOADDR 0x000200C -#define ACP_I2S_RX_FIFOSIZE 0x0002010 -#define ACP_I2S_RX_DMA_SIZE 0x0002014 -#define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0002018 -#define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x000201C -#define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x0002020 -#define ACP_I2S_TX_RINGBUFADDR 0x0002024 -#define ACP_I2S_TX_RINGBUFSIZE 0x0002028 -#define ACP_I2S_TX_LINKPOSITIONCNTR 0x000202C -#define ACP_I2S_TX_FIFOADDR 0x0002030 -#define ACP_I2S_TX_FIFOSIZE 0x0002034 -#define ACP_I2S_TX_DMA_SIZE 0x0002038 -#define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x000203C -#define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0002040 -#define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x0002044 -#define ACP_BT_RX_RINGBUFADDR 0x0002048 -#define ACP_BT_RX_RINGBUFSIZE 0x000204C -#define ACP_BT_RX_LINKPOSITIONCNTR 0x0002050 -#define ACP_BT_RX_FIFOADDR 0x0002054 -#define ACP_BT_RX_FIFOSIZE 0x0002058 -#define ACP_BT_RX_DMA_SIZE 0x000205C -#define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0002060 -#define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x0002064 -#define ACP_BT_RX_INTR_WATERMARK_SIZE 0x0002068 -#define ACP_BT_TX_RINGBUFADDR 0x000206C -#define ACP_BT_TX_RINGBUFSIZE 0x0002070 -#define ACP_BT_TX_LINKPOSITIONCNTR 0x0002074 -#define ACP_BT_TX_FIFOADDR 0x0002078 -#define ACP_BT_TX_FIFOSIZE 0x000207C -#define ACP_BT_TX_DMA_SIZE 0x0002080 -#define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0002084 -#define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x0002088 -#define ACP_BT_TX_INTR_WATERMARK_SIZE 0x000208C -#define ACP_HS_RX_RINGBUFADDR 0x0002090 -#define ACP_HS_RX_RINGBUFSIZE 0x0002094 -#define ACP_HS_RX_LINKPOSITIONCNTR 0x0002098 -#define ACP_HS_RX_FIFOADDR 0x000209C -#define ACP_HS_RX_FIFOSIZE 0x00020A0 -#define ACP_HS_RX_DMA_SIZE 0x00020A4 -#define ACP_HS_RX_LINEARPOSITIONCNTR_HIGH 0x00020A8 -#define ACP_HS_RX_LINEARPOSITIONCNTR_LOW 0x00020AC -#define ACP_HS_RX_INTR_WATERMARK_SIZE 0x00020B0 -#define ACP_HS_TX_RINGBUFADDR 0x00020B4 -#define ACP_HS_TX_RINGBUFSIZE 0x00020B8 -#define ACP_HS_TX_LINKPOSITIONCNTR 0x00020BC -#define ACP_HS_TX_FIFOADDR 0x00020C0 -#define ACP_HS_TX_FIFOSIZE 0x00020C4 -#define ACP_HS_TX_DMA_SIZE 0x00020C8 -#define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x00020CC -#define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x00020D0 -#define ACP_HS_TX_INTR_WATERMARK_SIZE 0x00020D4 -#define ACP_AUDIO_RX_RINGBUFADDR ACP_I2S_RX_RINGBUFADDR -#define ACP_AUDIO_RX_RINGBUFSIZE ACP_I2S_RX_RINGBUFSIZE -#define ACP_AUDIO_RX_LINKPOSITIONCNTR ACP_I2S_RX_LINKPOSITIONCNTR -#define ACP_AUDIO_RX_FIFOADDR ACP_I2S_RX_FIFOADDR -#define ACP_AUDIO_RX_FIFOSIZE ACP_I2S_RX_FIFOSIZE -#define ACP_AUDIO_RX_DMA_SIZE ACP_I2S_RX_DMA_SIZE -#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH -#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_I2S_RX_LINEARPOSITIONCNTR_LOW -#define ACP_AUDIO_RX_INTR_WATERMARK_SIZE ACP_I2S_RX_INTR_WATERMARK_SIZE -#define ACP_AUDIO_TX_RINGBUFADDR ACP_I2S_TX_RINGBUFADDR -#define ACP_AUDIO_TX_RINGBUFSIZE ACP_I2S_TX_RINGBUFSIZE -#define ACP_AUDIO_TX_LINKPOSITIONCNTR ACP_I2S_TX_LINKPOSITIONCNTR -#define ACP_AUDIO_TX_FIFOADDR ACP_I2S_TX_FIFOADDR -#define ACP_AUDIO_TX_FIFOSIZE ACP_I2S_TX_FIFOSIZE -#define ACP_AUDIO_TX_DMA_SIZE ACP_I2S_TX_DMA_SIZE -#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH -#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_I2S_TX_LINEARPOSITIONCNTR_LOW -#define ACP_AUDIO_TX_INTR_WATERMARK_SIZE ACP_I2S_TX_INTR_WATERMARK_SIZE - -/* Registers from ACP_I2S_TDM block */ -#define ACP_I2STDM_IER 0x0002400 -#define ACP_I2STDM_IRER 0x0002404 -#define ACP_I2STDM_RXFRMT 0x0002408 -#define ACP_I2STDM_ITER 0x000240C -#define ACP_I2STDM_TXFRMT 0x0002410 -#define ACP_I2STDM0_MSTRCLKGEN 0x0002414 -#define ACP_I2STDM1_MSTRCLKGEN 0x0002418 -#define ACP_I2STDM2_MSTRCLKGEN 0x000241C -#define ACP_I2STDM_REFCLKGEN 0x0002420 - -/* Registers from ACP_BT_TDM block */ -#define ACP_BTTDM_IER 0x0002800 -#define ACP_BTTDM_IRER 0x0002804 -#define ACP_BTTDM_RXFRMT 0x0002808 -#define ACP_BTTDM_ITER 0x000280C -#define ACP_BTTDM_TXFRMT 0x0002810 -#define ACP_HSTDM_IER 0x0002814 -#define ACP_HSTDM_IRER 0x0002818 -#define ACP_HSTDM_RXFRMT 0x000281C -#define ACP_HSTDM_ITER 0x0002820 -#define ACP_HSTDM_TXFRMT 0x0002824 - -/* Registers from ACP_WOV block */ -#define ACP_WOV_PDM_ENABLE 0x0002C04 -#define ACP_WOV_PDM_DMA_ENABLE 0x0002C08 -#define ACP_WOV_RX_RINGBUFADDR 0x0002C0C -#define ACP_WOV_RX_RINGBUFSIZE 0x0002C10 -#define ACP_WOV_RX_LINKPOSITIONCNTR 0x0002C14 -#define ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH 0x0002C18 -#define ACP_WOV_RX_LINEARPOSITIONCNTR_LOW 0x0002C1C -#define ACP_WOV_RX_INTR_WATERMARK_SIZE 0x0002C20 -#define ACP_WOV_PDM_FIFO_FLUSH 0x0002C24 -#define ACP_WOV_PDM_NO_OF_CHANNELS 0x0002C28 -#define ACP_WOV_PDM_DECIMATION_FACTOR 0x0002C2C -#define ACP_WOV_PDM_VAD_CTRL 0x0002C30 -#define ACP_WOV_WAKE 0x0002C54 -#define ACP_WOV_BUFFER_STATUS 0x0002C58 -#define ACP_WOV_MISC_CTRL 0x0002C5C -#define ACP_WOV_CLK_CTRL 0x0002C60 -#define ACP_PDM_VAD_DYNAMIC_CLK_GATING_EN 0x0002C64 -#define ACP_WOV_ERROR_STATUS_REGISTER 0x0002C68 -#define ACP_PDM_CLKDIV 0x0002C6C - -/* Registers from ACP_SW_SWCLK block */ -#define ACP_SW_EN 0x0003000 -#define ACP_SW_EN_STATUS 0x0003004 -#define ACP_SW_FRAMESIZE 0x0003008 -#define ACP_SW_SSP_COUNTER 0x000300C -#define ACP_SW_AUDIO_TX_EN 0x0003010 -#define ACP_SW_AUDIO_TX_EN_STATUS 0x0003014 -#define ACP_SW_AUDIO_TX_FRAME_FORMAT 0x0003018 -#define ACP_SW_AUDIO_TX_SAMPLEINTERVAL 0x000301C -#define ACP_SW_AUDIO_TX_HCTRL_DP0 0x0003020 -#define ACP_SW_AUDIO_TX_HCTRL_DP1 0x0003024 -#define ACP_SW_AUDIO_TX_HCTRL_DP2 0x0003028 -#define ACP_SW_AUDIO_TX_HCTRL_DP3 0x000302C -#define ACP_SW_AUDIO_TX_OFFSET_DP0 0x0003030 -#define ACP_SW_AUDIO_TX_OFFSET_DP1 0x0003034 -#define ACP_SW_AUDIO_TX_OFFSET_DP2 0x0003038 -#define ACP_SW_AUDIO_TX_OFFSET_DP3 0x000303C -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP0 0x0003040 -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP1 0x0003044 -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP2 0x0003048 -#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP3 0x000304C -#define ACP_SW_BT_TX_EN 0x0003050 -#define ACP_SW_BT_TX_EN_STATUS 0x0003054 -#define ACP_SW_BT_TX_FRAME_FORMAT 0x0003058 -#define ACP_SW_BT_TX_SAMPLEINTERVAL 0x000305C -#define ACP_SW_BT_TX_HCTRL 0x0003060 -#define ACP_SW_BT_TX_OFFSET 0x0003064 -#define ACP_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003068 -#define ACP_SW_HEADSET_TX_EN 0x000306C -#define ACP_SW_HEADSET_TX_EN_STATUS 0x0003070 -#define ACP_SW_HEADSET_TX_FRAME_FORMAT 0x0003074 -#define ACP_SW_HEADSET_TX_SAMPLEINTERVAL 0x0003078 -#define ACP_SW_HEADSET_TX_HCTRL 0x000307C -#define ACP_SW_HEADSET_TX_OFFSET 0x0003080 -#define ACP_SW_HEADSET_TX_CHANNEL_ENABLE_DP0 0x0003084 -#define ACP_SW_AUDIO_RX_EN 0x0003088 -#define ACP_SW_AUDIO_RX_EN_STATUS 0x000308C -#define ACP_SW_AUDIO_RX_FRAME_FORMAT 0x0003090 -#define ACP_SW_AUDIO_RX_SAMPLEINTERVAL 0x0003094 -#define ACP_SW_AUDIO_RX_HCTRL_DP0 0x0003098 -#define ACP_SW_AUDIO_RX_HCTRL_DP1 0x000309C -#define ACP_SW_AUDIO_RX_HCTRL_DP2 0x0003100 -#define ACP_SW_AUDIO_RX_HCTRL_DP3 0x0003104 -#define ACP_SW_AUDIO_RX_OFFSET_DP0 0x0003108 -#define ACP_SW_AUDIO_RX_OFFSET_DP1 0x000310C -#define ACP_SW_AUDIO_RX_OFFSET_DP2 0x0003110 -#define ACP_SW_AUDIO_RX_OFFSET_DP3 0x0003114 -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP0 0x0003118 -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP1 0x000311C -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP2 0x0003120 -#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP3 0x0003124 -#define ACP_SW_BT_RX_EN 0x0003128 -#define ACP_SW_BT_RX_EN_STATUS 0x000312C -#define ACP_SW_BT_RX_FRAME_FORMAT 0x0003130 -#define ACP_SW_BT_RX_SAMPLEINTERVAL 0x0003134 -#define ACP_SW_BT_RX_HCTRL 0x0003138 -#define ACP_SW_BT_RX_OFFSET 0x000313C -#define ACP_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003140 -#define ACP_SW_HEADSET_RX_EN 0x0003144 -#define ACP_SW_HEADSET_RX_EN_STATUS 0x0003148 -#define ACP_SW_HEADSET_RX_FRAME_FORMAT 0x000314C -#define ACP_SW_HEADSET_RX_SAMPLEINTERVAL 0x0003150 -#define ACP_SW_HEADSET_RX_HCTRL 0x0003154 -#define ACP_SW_HEADSET_RX_OFFSET 0x0003158 -#define ACP_SW_HEADSET_RX_CHANNEL_ENABLE_DP0 0x000315C -#define ACP_SW_BPT_PORT_EN 0x0003160 -#define ACP_SW_BPT_PORT_EN_STATUS 0x0003164 -#define ACP_SW_BPT_PORT_FRAME_FORMAT 0x0003168 -#define ACP_SW_BPT_PORT_SAMPLEINTERVAL 0x000316C -#define ACP_SW_BPT_PORT_HCTRL 0x0003170 -#define ACP_SW_BPT_PORT_OFFSET 0x0003174 -#define ACP_SW_BPT_PORT_CHANNEL_ENABLE 0x0003178 -#define ACP_SW_BPT_PORT_FIRST_BYTE_ADDR 0x000317C -#define ACP_SW_CLK_RESUME_CTRL 0x0003180 -#define ACP_SW_CLK_RESUME_DELAY_CNTR 0x0003184 -#define ACP_SW_BUS_RESET_CTRL 0x0003188 -#define ACP_SW_PRBS_ERR_STATUS 0x000318C -#define SW_IMM_CMD_UPPER_WORD 0x0003230 -#define SW_IMM_CMD_LOWER_QWORD 0x0003234 -#define SW_IMM_RESP_UPPER_WORD 0x0003238 -#define SW_IMM_RESP_LOWER_QWORD 0x000323C -#define SW_IMM_CMD_STS 0x0003240 -#define SW_BRA_BASE_ADDRESS 0x0003244 -#define SW_BRA_TRANSFER_SIZE 0x0003248 -#define SW_BRA_DMA_BUSY 0x000324C -#define SW_BRA_RESP 0x0003250 -#define SW_BRA_RESP_FRAME_ADDR 0x0003254 -#define SW_BRA_CURRENT_TRANSFER_SIZE 0x0003258 -#define SW_STATE_CHANGE_STATUS_0TO7 0x000325C -#define SW_STATE_CHANGE_STATUS_8TO11 0x0003260 -#define SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003264 -#define SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003268 -#define SW_CLK_FREQUENCY_CTRL 0x000326C -#define SW_ERROR_INTR_MASK 0x0003270 -#define SW_PHY_TEST_MODE_DATA_OFF 0x0003274 - -/* Registers from ACP_P1_AUDIO_BUFFERS block */ -#define ACP_P1_I2S_RX_RINGBUFADDR 0x0003A00 -#define ACP_P1_I2S_RX_RINGBUFSIZE 0x0003A04 -#define ACP_P1_I2S_RX_LINKPOSITIONCNTR 0x0003A08 -#define ACP_P1_I2S_RX_FIFOADDR 0x0003A0C -#define ACP_P1_I2S_RX_FIFOSIZE 0x0003A10 -#define ACP_P1_I2S_RX_DMA_SIZE 0x0003A14 -#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0003A18 -#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW 0x0003A1C -#define ACP_P1_I2S_RX_INTR_WATERMARK_SIZE 0x0003A20 -#define ACP_P1_I2S_TX_RINGBUFADDR 0x0003A24 -#define ACP_P1_I2S_TX_RINGBUFSIZE 0x0003A28 -#define ACP_P1_I2S_TX_LINKPOSITIONCNTR 0x0003A2C -#define ACP_P1_I2S_TX_FIFOADDR 0x0003A30 -#define ACP_P1_I2S_TX_FIFOSIZE 0x0003A34 -#define ACP_P1_I2S_TX_DMA_SIZE 0x0003A38 -#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x0003A3C -#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0003A40 -#define ACP_P1_I2S_TX_INTR_WATERMARK_SIZE 0x0003A44 -#define ACP_P1_BT_RX_RINGBUFADDR 0x0003A48 -#define ACP_P1_BT_RX_RINGBUFSIZE 0x0003A4C -#define ACP_P1_BT_RX_LINKPOSITIONCNTR 0x0003A50 -#define ACP_P1_BT_RX_FIFOADDR 0x0003A54 -#define ACP_P1_BT_RX_FIFOSIZE 0x0003A58 -#define ACP_P1_BT_RX_DMA_SIZE 0x0003A5C -#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0003A60 -#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_LOW 0x0003A64 -#define ACP_P1_BT_RX_INTR_WATERMARK_SIZE 0x0003A68 -#define ACP_P1_BT_TX_RINGBUFADDR 0x0003A6C -#define ACP_P1_BT_TX_RINGBUFSIZE 0x0003A70 -#define ACP_P1_BT_TX_LINKPOSITIONCNTR 0x0003A74 -#define ACP_P1_BT_TX_FIFOADDR 0x0003A78 -#define ACP_P1_BT_TX_FIFOSIZE 0x0003A7C -#define ACP_P1_BT_TX_DMA_SIZE 0x0003A80 -#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0003A84 -#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_LOW 0x0003A88 -#define ACP_P1_BT_TX_INTR_WATERMARK_SIZE 0x0003A8C -#define ACP_P1_HS_RX_RINGBUFADDR 0x0003A90 -#define ACP_P1_HS_RX_RINGBUFSIZE 0x0003A94 -#define ACP_P1_HS_RX_LINKPOSITIONCNTR 0x0003A98 -#define ACP_P1_HS_RX_FIFOADDR 0x0003A9C -#define ACP_P1_HS_RX_FIFOSIZE 0x0003AA0 -#define ACP_P1_HS_RX_DMA_SIZE 0x0003AA4 -#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_HIGH 0x0003AA8 -#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_LOW 0x0003AAC -#define ACP_P1_HS_RX_INTR_WATERMARK_SIZE 0x0003AB0 -#define ACP_P1_HS_TX_RINGBUFADDR 0x0003AB4 -#define ACP_P1_HS_TX_RINGBUFSIZE 0x0003AB8 -#define ACP_P1_HS_TX_LINKPOSITIONCNTR 0x0003ABC -#define ACP_P1_HS_TX_FIFOADDR 0x0003AC0 -#define ACP_P1_HS_TX_FIFOSIZE 0x0003AC4 -#define ACP_P1_HS_TX_DMA_SIZE 0x0003AC8 -#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_HIGH 0x0003ACC -#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_LOW 0x0003AD0 -#define ACP_P1_HS_TX_INTR_WATERMARK_SIZE 0x0003AD4 -#define ACP_P1_AUDIO_RX_RINGBUFADDR ACP_P1_I2S_RX_RINGBUFADDR -#define ACP_P1_AUDIO_RX_RINGBUFSIZE ACP_P1_I2S_RX_RINGBUFSIZE -#define ACP_P1_AUDIO_RX_LINKPOSITIONCNTR ACP_P1_I2S_RX_LINKPOSITIONCNTR -#define ACP_P1_AUDIO_RX_FIFOADDR ACP_P1_I2S_RX_FIFOADDR -#define ACP_P1_AUDIO_RX_FIFOSIZE ACP_P1_I2S_RX_FIFOSIZE -#define ACP_P1_AUDIO_RX_DMA_SIZE ACP_P1_I2S_RX_DMA_SIZE -#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH -#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW -#define ACP_P1_AUDIO_RX_INTR_WATERMARK_SIZE ACP_P1_I2S_RX_INTR_WATERMARK_SIZE -#define ACP_P1_AUDIO_TX_RINGBUFADDR ACP_P1_I2S_TX_RINGBUFADDR -#define ACP_P1_AUDIO_TX_RINGBUFSIZE ACP_P1_I2S_TX_RINGBUFSIZE -#define ACP_P1_AUDIO_TX_LINKPOSITIONCNTR ACP_P1_I2S_TX_LINKPOSITIONCNTR -#define ACP_P1_AUDIO_TX_FIFOADDR ACP_P1_I2S_TX_FIFOADDR -#define ACP_P1_AUDIO_TX_FIFOSIZE ACP_P1_I2S_TX_FIFOSIZE -#define ACP_P1_AUDIO_TX_DMA_SIZE ACP_P1_I2S_TX_DMA_SIZE -#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH -#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW -#define ACP_P1_AUDIO_TX_INTR_WATERMARK_SIZE ACP_P1_I2S_TX_INTR_WATERMARK_SIZE - -/* Registers from ACP_P1_SW_SWCLK block */ -#define ACP_P1_SW_EN 0x0003C00 -#define ACP_P1_SW_EN_STATUS 0x0003C04 -#define ACP_P1_SW_FRAMESIZE 0x0003C08 -#define ACP_P1_SW_SSP_COUNTER 0x0003C0C -#define ACP_P1_SW_BT_TX_EN 0x0003C50 -#define ACP_P1_SW_BT_TX_EN_STATUS 0x0003C54 -#define ACP_P1_SW_BT_TX_FRAME_FORMAT 0x0003C58 -#define ACP_P1_SW_BT_TX_SAMPLEINTERVAL 0x0003C5C -#define ACP_P1_SW_BT_TX_HCTRL 0x0003C60 -#define ACP_P1_SW_BT_TX_OFFSET 0x0003C64 -#define ACP_P1_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003C68 -#define ACP_P1_SW_BT_RX_EN 0x0003D28 -#define ACP_P1_SW_BT_RX_EN_STATUS 0x0003D2C -#define ACP_P1_SW_BT_RX_FRAME_FORMAT 0x0003D30 -#define ACP_P1_SW_BT_RX_SAMPLEINTERVAL 0x0003D34 -#define ACP_P1_SW_BT_RX_HCTRL 0x0003D38 -#define ACP_P1_SW_BT_RX_OFFSET 0x0003D3C -#define ACP_P1_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003D40 -#define ACP_P1_SW_BPT_PORT_EN 0x0003D60 -#define ACP_P1_SW_BPT_PORT_EN_STATUS 0x0003D64 -#define ACP_P1_SW_BPT_PORT_FRAME_FORMAT 0x0003D68 -#define ACP_P1_SW_BPT_PORT_SAMPLEINTERVAL 0x0003D6C -#define ACP_P1_SW_BPT_PORT_HCTRL 0x0003D70 -#define ACP_P1_SW_BPT_PORT_OFFSET 0x0003D74 -#define ACP_P1_SW_BPT_PORT_CHANNEL_ENABLE 0x0003D78 -#define ACP_P1_SW_BPT_PORT_FIRST_BYTE_ADDR 0x0003D7C -#define ACP_P1_SW_CLK_RESUME_CTRL 0x0003D80 -#define ACP_P1_SW_CLK_RESUME_DELAY_CNTR 0x0003D84 -#define ACP_P1_SW_BUS_RESET_CTRL 0x0003D88 -#define ACP_P1_SW_PRBS_ERR_STATUS 0x0003D8C - -/* Registers from ACP_P1_SW_ACLK block */ -#define P1_SW_CORB_BASE_ADDRESS 0x0003E00 -#define P1_SW_CORB_WRITE_POINTER 0x0003E04 -#define P1_SW_CORB_READ_POINTER 0x0003E08 -#define P1_SW_CORB_CONTROL 0x0003E0C -#define P1_SW_CORB_SIZE 0x0003E14 -#define P1_SW_RIRB_BASE_ADDRESS 0x0003E18 -#define P1_SW_RIRB_WRITE_POINTER 0x0003E1C -#define P1_SW_RIRB_RESPONSE_INTERRUPT_COUNT 0x0003E20 -#define P1_SW_RIRB_CONTROL 0x0003E24 -#define P1_SW_RIRB_SIZE 0x0003E28 -#define P1_SW_RIRB_FIFO_MIN_THDL 0x0003E2C -#define P1_SW_IMM_CMD_UPPER_WORD 0x0003E30 -#define P1_SW_IMM_CMD_LOWER_QWORD 0x0003E34 -#define P1_SW_IMM_RESP_UPPER_WORD 0x0003E38 -#define P1_SW_IMM_RESP_LOWER_QWORD 0x0003E3C -#define P1_SW_IMM_CMD_STS 0x0003E40 -#define P1_SW_BRA_BASE_ADDRESS 0x0003E44 -#define P1_SW_BRA_TRANSFER_SIZE 0x0003E48 -#define P1_SW_BRA_DMA_BUSY 0x0003E4C -#define P1_SW_BRA_RESP 0x0003E50 -#define P1_SW_BRA_RESP_FRAME_ADDR 0x0003E54 -#define P1_SW_BRA_CURRENT_TRANSFER_SIZE 0x0003E58 -#define P1_SW_STATE_CHANGE_STATUS_0TO7 0x0003E5C -#define P1_SW_STATE_CHANGE_STATUS_8TO11 0x0003E60 -#define P1_SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003E64 -#define P1_SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003E68 -#define P1_SW_CLK_FREQUENCY_CTRL 0x0003E6C -#define P1_SW_ERROR_INTR_MASK 0x0003E70 -#define P1_SW_PHY_TEST_MODE_DATA_OFF 0x0003E74 - -/* Registers from ACP_SCRATCH block */ -#define ACP_SCRATCH_REG_0 0x0010000 -#define ACP_SCRATCH_REG_1 0x0010004 -#define ACP_SCRATCH_REG_2 0x0010008 -#define ACP_SCRATCH_REG_3 0x001000C -#define ACP_SCRATCH_REG_4 0x0010010 -#define ACP_SCRATCH_REG_5 0x0010014 -#define ACP_SCRATCH_REG_6 0x0010018 -#define ACP_SCRATCH_REG_7 0x001001C -#define ACP_SCRATCH_REG_8 0x0010020 -#define ACP_SCRATCH_REG_9 0x0010024 -#define ACP_SCRATCH_REG_10 0x0010028 -#define ACP_SCRATCH_REG_11 0x001002C -#define ACP_SCRATCH_REG_12 0x0010030 -#define ACP_SCRATCH_REG_13 0x0010034 -#define ACP_SCRATCH_REG_14 0x0010038 -#define ACP_SCRATCH_REG_15 0x001003C -#define ACP_SCRATCH_REG_16 0x0010040 -#define ACP_SCRATCH_REG_17 0x0010044 -#define ACP_SCRATCH_REG_18 0x0010048 -#define ACP_SCRATCH_REG_19 0x001004C -#define ACP_SCRATCH_REG_20 0x0010050 -#define ACP_SCRATCH_REG_21 0x0010054 -#define ACP_SCRATCH_REG_22 0x0010058 -#define ACP_SCRATCH_REG_23 0x001005C -#define ACP_SCRATCH_REG_24 0x0010060 -#define ACP_SCRATCH_REG_25 0x0010064 -#define ACP_SCRATCH_REG_26 0x0010068 -#define ACP_SCRATCH_REG_27 0x001006C -#define ACP_SCRATCH_REG_28 0x0010070 -#define ACP_SCRATCH_REG_29 0x0010074 -#define ACP_SCRATCH_REG_30 0x0010078 -#define ACP_SCRATCH_REG_31 0x001007C -#define ACP_SCRATCH_REG_32 0x0010080 -#define ACP_SCRATCH_REG_33 0x0010084 -#define ACP_SCRATCH_REG_34 0x0010088 -#define ACP_SCRATCH_REG_35 0x001008C -#define ACP_SCRATCH_REG_36 0x0010090 -#define ACP_SCRATCH_REG_37 0x0010094 -#define ACP_SCRATCH_REG_38 0x0010098 -#define ACP_SCRATCH_REG_39 0x001009C -#define ACP_SCRATCH_REG_40 0x00100A0 -#define ACP_SCRATCH_REG_41 0x00100A4 -#define ACP_SCRATCH_REG_42 0x00100A8 -#define ACP_SCRATCH_REG_43 0x00100AC -#define ACP_SCRATCH_REG_44 0x00100B0 -#define ACP_SCRATCH_REG_45 0x00100B4 -#define ACP_SCRATCH_REG_46 0x00100B8 -#define ACP_SCRATCH_REG_47 0x00100BC -#define ACP_SCRATCH_REG_48 0x00100C0 -#define ACP_SCRATCH_REG_49 0x00100C4 -#define ACP_SCRATCH_REG_50 0x00100C8 -#define ACP_SCRATCH_REG_51 0x00100CC -#define ACP_SCRATCH_REG_52 0x00100D0 -#define ACP_SCRATCH_REG_53 0x00100D4 -#define ACP_SCRATCH_REG_54 0x00100D8 -#define ACP_SCRATCH_REG_55 0x00100DC -#define ACP_SCRATCH_REG_56 0x00100E0 -#define ACP_SCRATCH_REG_57 0x00100E4 -#define ACP_SCRATCH_REG_58 0x00100E8 -#define ACP_SCRATCH_REG_59 0x00100EC -#define ACP_SCRATCH_REG_60 0x00100F0 -#define ACP_SCRATCH_REG_61 0x00100F4 -#define ACP_SCRATCH_REG_62 0x00100F8 -#define ACP_SCRATCH_REG_63 0x00100FC -#define ACP_SCRATCH_REG_64 0x0010100 -#define ACP_SCRATCH_REG_65 0x0010104 -#define ACP_SCRATCH_REG_66 0x0010108 -#define ACP_SCRATCH_REG_67 0x001010C -#define ACP_SCRATCH_REG_68 0x0010110 -#define ACP_SCRATCH_REG_69 0x0010114 -#define ACP_SCRATCH_REG_70 0x0010118 -#define ACP_SCRATCH_REG_71 0x001011C -#define ACP_SCRATCH_REG_72 0x0010120 -#define ACP_SCRATCH_REG_73 0x0010124 -#define ACP_SCRATCH_REG_74 0x0010128 -#define ACP_SCRATCH_REG_75 0x001012C -#define ACP_SCRATCH_REG_76 0x0010130 -#define ACP_SCRATCH_REG_77 0x0010134 -#define ACP_SCRATCH_REG_78 0x0010138 -#define ACP_SCRATCH_REG_79 0x001013C -#define ACP_SCRATCH_REG_80 0x0010140 -#define ACP_SCRATCH_REG_81 0x0010144 -#define ACP_SCRATCH_REG_82 0x0010148 -#define ACP_SCRATCH_REG_83 0x001014C -#define ACP_SCRATCH_REG_84 0x0010150 -#define ACP_SCRATCH_REG_85 0x0010154 -#define ACP_SCRATCH_REG_86 0x0010158 -#define ACP_SCRATCH_REG_87 0x001015C -#define ACP_SCRATCH_REG_88 0x0010160 -#define ACP_SCRATCH_REG_89 0x0010164 -#define ACP_SCRATCH_REG_90 0x0010168 -#define ACP_SCRATCH_REG_91 0x001016C -#define ACP_SCRATCH_REG_92 0x0010170 -#define ACP_SCRATCH_REG_93 0x0010174 -#define ACP_SCRATCH_REG_94 0x0010178 -#define ACP_SCRATCH_REG_95 0x001017C -#define ACP_SCRATCH_REG_96 0x0010180 -#define ACP_SCRATCH_REG_97 0x0010184 -#define ACP_SCRATCH_REG_98 0x0010188 -#define ACP_SCRATCH_REG_99 0x001018C -#define ACP_SCRATCH_REG_100 0x0010190 -#define ACP_SCRATCH_REG_101 0x0010194 -#define ACP_SCRATCH_REG_102 0x0010198 -#define ACP_SCRATCH_REG_103 0x001019C -#define ACP_SCRATCH_REG_104 0x00101A0 -#define ACP_SCRATCH_REG_105 0x00101A4 -#define ACP_SCRATCH_REG_106 0x00101A8 -#define ACP_SCRATCH_REG_107 0x00101AC -#define ACP_SCRATCH_REG_108 0x00101B0 -#define ACP_SCRATCH_REG_109 0x00101B4 -#define ACP_SCRATCH_REG_110 0x00101B8 -#define ACP_SCRATCH_REG_111 0x00101BC -#define ACP_SCRATCH_REG_112 0x00101C0 -#define ACP_SCRATCH_REG_113 0x00101C4 -#define ACP_SCRATCH_REG_114 0x00101C8 -#define ACP_SCRATCH_REG_115 0x00101CC -#define ACP_SCRATCH_REG_116 0x00101D0 -#define ACP_SCRATCH_REG_117 0x00101D4 -#define ACP_SCRATCH_REG_118 0x00101D8 -#define ACP_SCRATCH_REG_119 0x00101DC -#define ACP_SCRATCH_REG_120 0x00101E0 -#define ACP_SCRATCH_REG_121 0x00101E4 -#define ACP_SCRATCH_REG_122 0x00101E8 -#define ACP_SCRATCH_REG_123 0x00101EC -#define ACP_SCRATCH_REG_124 0x00101F0 -#define ACP_SCRATCH_REG_125 0x00101F4 -#define ACP_SCRATCH_REG_126 0x00101F8 -#define ACP_SCRATCH_REG_127 0x00101FC -#define ACP_SCRATCH_REG_128 0x0010200 -#endif diff --git a/include/sound/acp63_chip_offset_byte.h b/include/sound/acp63_chip_offset_byte.h new file mode 100644 index 000000000000..c9260e1640ae --- /dev/null +++ b/include/sound/acp63_chip_offset_byte.h @@ -0,0 +1,658 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * AMD ACP 6.3 Register Documentation + * + * Copyright 2022 Advanced Micro Devices, Inc. + */ + +#ifndef _acp_ip_OFFSET_HEADER +#define _acp_ip_OFFSET_HEADER + +/* Registers from ACP_DMA block */ +#define ACP_DMA_CNTL_0 0x0000000 +#define ACP_DMA_CNTL_1 0x0000004 +#define ACP_DMA_CNTL_2 0x0000008 +#define ACP_DMA_CNTL_3 0x000000C +#define ACP_DMA_CNTL_4 0x0000010 +#define ACP_DMA_CNTL_5 0x0000014 +#define ACP_DMA_CNTL_6 0x0000018 +#define ACP_DMA_CNTL_7 0x000001C +#define ACP_DMA_DSCR_STRT_IDX_0 0x0000020 +#define ACP_DMA_DSCR_STRT_IDX_1 0x0000024 +#define ACP_DMA_DSCR_STRT_IDX_2 0x0000028 +#define ACP_DMA_DSCR_STRT_IDX_3 0x000002C +#define ACP_DMA_DSCR_STRT_IDX_4 0x0000030 +#define ACP_DMA_DSCR_STRT_IDX_5 0x0000034 +#define ACP_DMA_DSCR_STRT_IDX_6 0x0000038 +#define ACP_DMA_DSCR_STRT_IDX_7 0x000003C +#define ACP_DMA_DSCR_CNT_0 0x0000040 +#define ACP_DMA_DSCR_CNT_1 0x0000044 +#define ACP_DMA_DSCR_CNT_2 0x0000048 +#define ACP_DMA_DSCR_CNT_3 0x000004C +#define ACP_DMA_DSCR_CNT_4 0x0000050 +#define ACP_DMA_DSCR_CNT_5 0x0000054 +#define ACP_DMA_DSCR_CNT_6 0x0000058 +#define ACP_DMA_DSCR_CNT_7 0x000005C +#define ACP_DMA_PRIO_0 0x0000060 +#define ACP_DMA_PRIO_1 0x0000064 +#define ACP_DMA_PRIO_2 0x0000068 +#define ACP_DMA_PRIO_3 0x000006C +#define ACP_DMA_PRIO_4 0x0000070 +#define ACP_DMA_PRIO_5 0x0000074 +#define ACP_DMA_PRIO_6 0x0000078 +#define ACP_DMA_PRIO_7 0x000007C +#define ACP_DMA_CUR_DSCR_0 0x0000080 +#define ACP_DMA_CUR_DSCR_1 0x0000084 +#define ACP_DMA_CUR_DSCR_2 0x0000088 +#define ACP_DMA_CUR_DSCR_3 0x000008C +#define ACP_DMA_CUR_DSCR_4 0x0000090 +#define ACP_DMA_CUR_DSCR_5 0x0000094 +#define ACP_DMA_CUR_DSCR_6 0x0000098 +#define ACP_DMA_CUR_DSCR_7 0x000009C +#define ACP_DMA_CUR_TRANS_CNT_0 0x00000A0 +#define ACP_DMA_CUR_TRANS_CNT_1 0x00000A4 +#define ACP_DMA_CUR_TRANS_CNT_2 0x00000A8 +#define ACP_DMA_CUR_TRANS_CNT_3 0x00000AC +#define ACP_DMA_CUR_TRANS_CNT_4 0x00000B0 +#define ACP_DMA_CUR_TRANS_CNT_5 0x00000B4 +#define ACP_DMA_CUR_TRANS_CNT_6 0x00000B8 +#define ACP_DMA_CUR_TRANS_CNT_7 0x00000BC +#define ACP_DMA_ERR_STS_0 0x00000C0 +#define ACP_DMA_ERR_STS_1 0x00000C4 +#define ACP_DMA_ERR_STS_2 0x00000C8 +#define ACP_DMA_ERR_STS_3 0x00000CC +#define ACP_DMA_ERR_STS_4 0x00000D0 +#define ACP_DMA_ERR_STS_5 0x00000D4 +#define ACP_DMA_ERR_STS_6 0x00000D8 +#define ACP_DMA_ERR_STS_7 0x00000DC +#define ACP_DMA_DESC_BASE_ADDR 0x00000E0 +#define ACP_DMA_DESC_MAX_NUM_DSCR 0x00000E4 +#define ACP_DMA_CH_STS 0x00000E8 +#define ACP_DMA_CH_GROUP 0x00000EC +#define ACP_DMA_CH_RST_STS 0x00000F0 + +/* Registers from ACP_AXI2AXIATU block */ +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x0000C00 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x0000C04 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x0000C08 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x0000C0C +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x0000C10 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x0000C14 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x0000C18 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x0000C1C +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x0000C20 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x0000C24 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x0000C28 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x0000C2C +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x0000C30 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x0000C34 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x0000C38 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x0000C3C +#define ACPAXI2AXI_ATU_CTRL 0x0000C40 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_9 0x0000C44 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_9 0x0000C48 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_10 0x0000C4C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_10 0x0000C50 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_11 0x0000C54 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_11 0x0000C58 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_12 0x0000C5C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_12 0x0000C60 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_13 0x0000C64 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_13 0x0000C68 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_14 0x0000C6C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_14 0x0000C70 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_15 0x0000C74 +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_15 0x0000C78 +#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_16 0x0000C7C +#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_16 0x0000C80 + +/* Registers from ACP_CLKRST block */ +#define ACP_SOFT_RESET 0x0001000 +#define ACP_CONTROL 0x0001004 +#define ACP_STATUS 0x0001008 +#define ACP_DYNAMIC_CG_MASTER_CONTROL 0x0001010 +#define ACP_ZSC_DSP_CTRL 0x0001014 +#define ACP_ZSC_STS 0x0001018 +#define ACP_PGFSM_CONTROL 0x0001024 +#define ACP_PGFSM_STATUS 0x0001028 +#define ACP_CLKMUX_SEL 0x000102C + +/* Registers from ACP_AON block */ +#define ACP_PME_EN 0x0001400 +#define ACP_DEVICE_STATE 0x0001404 +#define AZ_DEVICE_STATE 0x0001408 +#define ACP_PIN_CONFIG 0x0001440 +#define ACP_PAD_PULLUP_CTRL 0x0001444 +#define ACP_PAD_PULLDOWN_CTRL 0x0001448 +#define ACP_PAD_DRIVE_STRENGTH_CTRL 0x000144C +#define ACP_PAD_SCHMEN_CTRL 0x0001450 +#define ACP_SW_PAD_KEEPER_EN 0x0001454 +#define ACP_SW_WAKE_EN 0x0001458 +#define ACP_I2S_WAKE_EN 0x000145C +#define ACP_SW1_WAKE_EN 0x0001460 + +#define ACP_SW_I2S_ERROR_REASON 0x00018B4 +#define ACP_SW_POS_TRACK_I2S_TX_CTRL 0x00018B8 +#define ACP_SW_I2S_TX_DMA_POS 0x00018BC +#define ACP_SW_POS_TRACK_BT_TX_CTRL 0x00018C0 +#define ACP_SW_BT_TX_DMA_POS 0x00018C4 +#define ACP_SW_POS_TRACK_HS_TX_CTRL 0x00018C8 +#define ACP_SW_HS_TX_DMA_POS 0x00018CC +#define ACP_SW_POS_TRACK_I2S_RX_CTRL 0x00018D0 +#define ACP_SW_I2S_RX_DMA_POS 0x00018D4 +#define ACP_SW_POS_TRACK_BT_RX_CTRL 0x00018D8 +#define ACP_SW_BT_RX_DMA_POS 0x00018DC +#define ACP_SW_POS_TRACK_HS_RX_CTRL 0x00018E0 +#define ACP_SW_HS_RX_DMA_POS 0x00018E4 +#define ACP_ERROR_INTR_MASK1 0X0001974 +#define ACP_ERROR_INTR_MASK2 0X0001978 +#define ACP_ERROR_INTR_MASK3 0X000197C + +/* Registers from ACP_P1_MISC block */ +#define ACP_EXTERNAL_INTR_ENB 0x0001A00 +#define ACP_EXTERNAL_INTR_CNTL 0x0001A04 +#define ACP_EXTERNAL_INTR_CNTL1 0x0001A08 +#define ACP_EXTERNAL_INTR_STAT 0x0001A0C +#define ACP_EXTERNAL_INTR_STAT1 0x0001A10 +#define ACP_ERROR_STATUS 0x0001A4C +#define ACP_P1_SW_I2S_ERROR_REASON 0x0001A50 +#define ACP_P1_SW_POS_TRACK_I2S_TX_CTRL 0x0001A6C +#define ACP_P1_SW_I2S_TX_DMA_POS 0x0001A70 +#define ACP_P1_SW_POS_TRACK_I2S_RX_CTRL 0x0001A74 +#define ACP_P1_SW_I2S_RX_DMA_POS 0x0001A78 +#define ACP_P1_DMIC_I2S_GPIO_INTR_CTRL 0x0001A7C +#define ACP_P1_DMIC_I2S_GPIO_INTR_STATUS 0x0001A80 +#define ACP_SCRATCH_REG_BASE_ADDR 0x0001A84 +#define ACP_P1_SW_POS_TRACK_BT_TX_CTRL 0x0001A88 +#define ACP_P1_SW_BT_TX_DMA_POS 0x0001A8C +#define ACP_P1_SW_POS_TRACK_HS_TX_CTRL 0x0001A90 +#define ACP_P1_SW_HS_TX_DMA_POS 0x0001A94 +#define ACP_P1_SW_POS_TRACK_BT_RX_CTRL 0x0001A98 +#define ACP_P1_SW_BT_RX_DMA_POS 0x0001A9C +#define ACP_P1_SW_POS_TRACK_HS_RX_CTRL 0x0001AA0 +#define ACP_P1_SW_HS_RX_DMA_POS 0x0001AA4 +#define ACP_ERROR_INTR_MASK4 0X0001AEC +#define ACP_ERROR_INTR_MASK5 0X0001AF0 + +/* Registers from ACP_AUDIO_BUFFERS block */ +#define ACP_I2S_RX_RINGBUFADDR 0x0002000 +#define ACP_I2S_RX_RINGBUFSIZE 0x0002004 +#define ACP_I2S_RX_LINKPOSITIONCNTR 0x0002008 +#define ACP_I2S_RX_FIFOADDR 0x000200C +#define ACP_I2S_RX_FIFOSIZE 0x0002010 +#define ACP_I2S_RX_DMA_SIZE 0x0002014 +#define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0002018 +#define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x000201C +#define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x0002020 +#define ACP_I2S_TX_RINGBUFADDR 0x0002024 +#define ACP_I2S_TX_RINGBUFSIZE 0x0002028 +#define ACP_I2S_TX_LINKPOSITIONCNTR 0x000202C +#define ACP_I2S_TX_FIFOADDR 0x0002030 +#define ACP_I2S_TX_FIFOSIZE 0x0002034 +#define ACP_I2S_TX_DMA_SIZE 0x0002038 +#define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x000203C +#define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0002040 +#define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x0002044 +#define ACP_BT_RX_RINGBUFADDR 0x0002048 +#define ACP_BT_RX_RINGBUFSIZE 0x000204C +#define ACP_BT_RX_LINKPOSITIONCNTR 0x0002050 +#define ACP_BT_RX_FIFOADDR 0x0002054 +#define ACP_BT_RX_FIFOSIZE 0x0002058 +#define ACP_BT_RX_DMA_SIZE 0x000205C +#define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0002060 +#define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x0002064 +#define ACP_BT_RX_INTR_WATERMARK_SIZE 0x0002068 +#define ACP_BT_TX_RINGBUFADDR 0x000206C +#define ACP_BT_TX_RINGBUFSIZE 0x0002070 +#define ACP_BT_TX_LINKPOSITIONCNTR 0x0002074 +#define ACP_BT_TX_FIFOADDR 0x0002078 +#define ACP_BT_TX_FIFOSIZE 0x000207C +#define ACP_BT_TX_DMA_SIZE 0x0002080 +#define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0002084 +#define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x0002088 +#define ACP_BT_TX_INTR_WATERMARK_SIZE 0x000208C +#define ACP_HS_RX_RINGBUFADDR 0x0002090 +#define ACP_HS_RX_RINGBUFSIZE 0x0002094 +#define ACP_HS_RX_LINKPOSITIONCNTR 0x0002098 +#define ACP_HS_RX_FIFOADDR 0x000209C +#define ACP_HS_RX_FIFOSIZE 0x00020A0 +#define ACP_HS_RX_DMA_SIZE 0x00020A4 +#define ACP_HS_RX_LINEARPOSITIONCNTR_HIGH 0x00020A8 +#define ACP_HS_RX_LINEARPOSITIONCNTR_LOW 0x00020AC +#define ACP_HS_RX_INTR_WATERMARK_SIZE 0x00020B0 +#define ACP_HS_TX_RINGBUFADDR 0x00020B4 +#define ACP_HS_TX_RINGBUFSIZE 0x00020B8 +#define ACP_HS_TX_LINKPOSITIONCNTR 0x00020BC +#define ACP_HS_TX_FIFOADDR 0x00020C0 +#define ACP_HS_TX_FIFOSIZE 0x00020C4 +#define ACP_HS_TX_DMA_SIZE 0x00020C8 +#define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x00020CC +#define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x00020D0 +#define ACP_HS_TX_INTR_WATERMARK_SIZE 0x00020D4 +#define ACP_AUDIO_RX_RINGBUFADDR ACP_I2S_RX_RINGBUFADDR +#define ACP_AUDIO_RX_RINGBUFSIZE ACP_I2S_RX_RINGBUFSIZE +#define ACP_AUDIO_RX_LINKPOSITIONCNTR ACP_I2S_RX_LINKPOSITIONCNTR +#define ACP_AUDIO_RX_FIFOADDR ACP_I2S_RX_FIFOADDR +#define ACP_AUDIO_RX_FIFOSIZE ACP_I2S_RX_FIFOSIZE +#define ACP_AUDIO_RX_DMA_SIZE ACP_I2S_RX_DMA_SIZE +#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH +#define ACP_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_I2S_RX_LINEARPOSITIONCNTR_LOW +#define ACP_AUDIO_RX_INTR_WATERMARK_SIZE ACP_I2S_RX_INTR_WATERMARK_SIZE +#define ACP_AUDIO_TX_RINGBUFADDR ACP_I2S_TX_RINGBUFADDR +#define ACP_AUDIO_TX_RINGBUFSIZE ACP_I2S_TX_RINGBUFSIZE +#define ACP_AUDIO_TX_LINKPOSITIONCNTR ACP_I2S_TX_LINKPOSITIONCNTR +#define ACP_AUDIO_TX_FIFOADDR ACP_I2S_TX_FIFOADDR +#define ACP_AUDIO_TX_FIFOSIZE ACP_I2S_TX_FIFOSIZE +#define ACP_AUDIO_TX_DMA_SIZE ACP_I2S_TX_DMA_SIZE +#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH +#define ACP_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_I2S_TX_LINEARPOSITIONCNTR_LOW +#define ACP_AUDIO_TX_INTR_WATERMARK_SIZE ACP_I2S_TX_INTR_WATERMARK_SIZE + +/* Registers from ACP_I2S_TDM block */ +#define ACP_I2STDM_IER 0x0002400 +#define ACP_I2STDM_IRER 0x0002404 +#define ACP_I2STDM_RXFRMT 0x0002408 +#define ACP_I2STDM_ITER 0x000240C +#define ACP_I2STDM_TXFRMT 0x0002410 +#define ACP_I2STDM0_MSTRCLKGEN 0x0002414 +#define ACP_I2STDM1_MSTRCLKGEN 0x0002418 +#define ACP_I2STDM2_MSTRCLKGEN 0x000241C +#define ACP_I2STDM_REFCLKGEN 0x0002420 + +/* Registers from ACP_BT_TDM block */ +#define ACP_BTTDM_IER 0x0002800 +#define ACP_BTTDM_IRER 0x0002804 +#define ACP_BTTDM_RXFRMT 0x0002808 +#define ACP_BTTDM_ITER 0x000280C +#define ACP_BTTDM_TXFRMT 0x0002810 +#define ACP_HSTDM_IER 0x0002814 +#define ACP_HSTDM_IRER 0x0002818 +#define ACP_HSTDM_RXFRMT 0x000281C +#define ACP_HSTDM_ITER 0x0002820 +#define ACP_HSTDM_TXFRMT 0x0002824 + +/* Registers from ACP_WOV block */ +#define ACP_WOV_PDM_ENABLE 0x0002C04 +#define ACP_WOV_PDM_DMA_ENABLE 0x0002C08 +#define ACP_WOV_RX_RINGBUFADDR 0x0002C0C +#define ACP_WOV_RX_RINGBUFSIZE 0x0002C10 +#define ACP_WOV_RX_LINKPOSITIONCNTR 0x0002C14 +#define ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH 0x0002C18 +#define ACP_WOV_RX_LINEARPOSITIONCNTR_LOW 0x0002C1C +#define ACP_WOV_RX_INTR_WATERMARK_SIZE 0x0002C20 +#define ACP_WOV_PDM_FIFO_FLUSH 0x0002C24 +#define ACP_WOV_PDM_NO_OF_CHANNELS 0x0002C28 +#define ACP_WOV_PDM_DECIMATION_FACTOR 0x0002C2C +#define ACP_WOV_PDM_VAD_CTRL 0x0002C30 +#define ACP_WOV_WAKE 0x0002C54 +#define ACP_WOV_BUFFER_STATUS 0x0002C58 +#define ACP_WOV_MISC_CTRL 0x0002C5C +#define ACP_WOV_CLK_CTRL 0x0002C60 +#define ACP_PDM_VAD_DYNAMIC_CLK_GATING_EN 0x0002C64 +#define ACP_WOV_ERROR_STATUS_REGISTER 0x0002C68 +#define ACP_PDM_CLKDIV 0x0002C6C + +/* Registers from ACP_SW_SWCLK block */ +#define ACP_SW_EN 0x0003000 +#define ACP_SW_EN_STATUS 0x0003004 +#define ACP_SW_FRAMESIZE 0x0003008 +#define ACP_SW_SSP_COUNTER 0x000300C +#define ACP_SW_AUDIO_TX_EN 0x0003010 +#define ACP_SW_AUDIO_TX_EN_STATUS 0x0003014 +#define ACP_SW_AUDIO_TX_FRAME_FORMAT 0x0003018 +#define ACP_SW_AUDIO_TX_SAMPLEINTERVAL 0x000301C +#define ACP_SW_AUDIO_TX_HCTRL_DP0 0x0003020 +#define ACP_SW_AUDIO_TX_HCTRL_DP1 0x0003024 +#define ACP_SW_AUDIO_TX_HCTRL_DP2 0x0003028 +#define ACP_SW_AUDIO_TX_HCTRL_DP3 0x000302C +#define ACP_SW_AUDIO_TX_OFFSET_DP0 0x0003030 +#define ACP_SW_AUDIO_TX_OFFSET_DP1 0x0003034 +#define ACP_SW_AUDIO_TX_OFFSET_DP2 0x0003038 +#define ACP_SW_AUDIO_TX_OFFSET_DP3 0x000303C +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP0 0x0003040 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP1 0x0003044 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP2 0x0003048 +#define ACP_SW_AUDIO_TX_CHANNEL_ENABLE_DP3 0x000304C +#define ACP_SW_BT_TX_EN 0x0003050 +#define ACP_SW_BT_TX_EN_STATUS 0x0003054 +#define ACP_SW_BT_TX_FRAME_FORMAT 0x0003058 +#define ACP_SW_BT_TX_SAMPLEINTERVAL 0x000305C +#define ACP_SW_BT_TX_HCTRL 0x0003060 +#define ACP_SW_BT_TX_OFFSET 0x0003064 +#define ACP_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003068 +#define ACP_SW_HEADSET_TX_EN 0x000306C +#define ACP_SW_HEADSET_TX_EN_STATUS 0x0003070 +#define ACP_SW_HEADSET_TX_FRAME_FORMAT 0x0003074 +#define ACP_SW_HEADSET_TX_SAMPLEINTERVAL 0x0003078 +#define ACP_SW_HEADSET_TX_HCTRL 0x000307C +#define ACP_SW_HEADSET_TX_OFFSET 0x0003080 +#define ACP_SW_HEADSET_TX_CHANNEL_ENABLE_DP0 0x0003084 +#define ACP_SW_AUDIO_RX_EN 0x0003088 +#define ACP_SW_AUDIO_RX_EN_STATUS 0x000308C +#define ACP_SW_AUDIO_RX_FRAME_FORMAT 0x0003090 +#define ACP_SW_AUDIO_RX_SAMPLEINTERVAL 0x0003094 +#define ACP_SW_AUDIO_RX_HCTRL_DP0 0x0003098 +#define ACP_SW_AUDIO_RX_HCTRL_DP1 0x000309C +#define ACP_SW_AUDIO_RX_HCTRL_DP2 0x0003100 +#define ACP_SW_AUDIO_RX_HCTRL_DP3 0x0003104 +#define ACP_SW_AUDIO_RX_OFFSET_DP0 0x0003108 +#define ACP_SW_AUDIO_RX_OFFSET_DP1 0x000310C +#define ACP_SW_AUDIO_RX_OFFSET_DP2 0x0003110 +#define ACP_SW_AUDIO_RX_OFFSET_DP3 0x0003114 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP0 0x0003118 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP1 0x000311C +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP2 0x0003120 +#define ACP_SW_AUDIO_RX_CHANNEL_ENABLE_DP3 0x0003124 +#define ACP_SW_BT_RX_EN 0x0003128 +#define ACP_SW_BT_RX_EN_STATUS 0x000312C +#define ACP_SW_BT_RX_FRAME_FORMAT 0x0003130 +#define ACP_SW_BT_RX_SAMPLEINTERVAL 0x0003134 +#define ACP_SW_BT_RX_HCTRL 0x0003138 +#define ACP_SW_BT_RX_OFFSET 0x000313C +#define ACP_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003140 +#define ACP_SW_HEADSET_RX_EN 0x0003144 +#define ACP_SW_HEADSET_RX_EN_STATUS 0x0003148 +#define ACP_SW_HEADSET_RX_FRAME_FORMAT 0x000314C +#define ACP_SW_HEADSET_RX_SAMPLEINTERVAL 0x0003150 +#define ACP_SW_HEADSET_RX_HCTRL 0x0003154 +#define ACP_SW_HEADSET_RX_OFFSET 0x0003158 +#define ACP_SW_HEADSET_RX_CHANNEL_ENABLE_DP0 0x000315C +#define ACP_SW_BPT_PORT_EN 0x0003160 +#define ACP_SW_BPT_PORT_EN_STATUS 0x0003164 +#define ACP_SW_BPT_PORT_FRAME_FORMAT 0x0003168 +#define ACP_SW_BPT_PORT_SAMPLEINTERVAL 0x000316C +#define ACP_SW_BPT_PORT_HCTRL 0x0003170 +#define ACP_SW_BPT_PORT_OFFSET 0x0003174 +#define ACP_SW_BPT_PORT_CHANNEL_ENABLE 0x0003178 +#define ACP_SW_BPT_PORT_FIRST_BYTE_ADDR 0x000317C +#define ACP_SW_CLK_RESUME_CTRL 0x0003180 +#define ACP_SW_CLK_RESUME_DELAY_CNTR 0x0003184 +#define ACP_SW_BUS_RESET_CTRL 0x0003188 +#define ACP_SW_PRBS_ERR_STATUS 0x000318C +#define SW_IMM_CMD_UPPER_WORD 0x0003230 +#define SW_IMM_CMD_LOWER_QWORD 0x0003234 +#define SW_IMM_RESP_UPPER_WORD 0x0003238 +#define SW_IMM_RESP_LOWER_QWORD 0x000323C +#define SW_IMM_CMD_STS 0x0003240 +#define SW_BRA_BASE_ADDRESS 0x0003244 +#define SW_BRA_TRANSFER_SIZE 0x0003248 +#define SW_BRA_DMA_BUSY 0x000324C +#define SW_BRA_RESP 0x0003250 +#define SW_BRA_RESP_FRAME_ADDR 0x0003254 +#define SW_BRA_CURRENT_TRANSFER_SIZE 0x0003258 +#define SW_STATE_CHANGE_STATUS_0TO7 0x000325C +#define SW_STATE_CHANGE_STATUS_8TO11 0x0003260 +#define SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003264 +#define SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003268 +#define SW_CLK_FREQUENCY_CTRL 0x000326C +#define SW_ERROR_INTR_MASK 0x0003270 +#define SW_PHY_TEST_MODE_DATA_OFF 0x0003274 + +/* Registers from ACP_P1_AUDIO_BUFFERS block */ +#define ACP_P1_I2S_RX_RINGBUFADDR 0x0003A00 +#define ACP_P1_I2S_RX_RINGBUFSIZE 0x0003A04 +#define ACP_P1_I2S_RX_LINKPOSITIONCNTR 0x0003A08 +#define ACP_P1_I2S_RX_FIFOADDR 0x0003A0C +#define ACP_P1_I2S_RX_FIFOSIZE 0x0003A10 +#define ACP_P1_I2S_RX_DMA_SIZE 0x0003A14 +#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0003A18 +#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW 0x0003A1C +#define ACP_P1_I2S_RX_INTR_WATERMARK_SIZE 0x0003A20 +#define ACP_P1_I2S_TX_RINGBUFADDR 0x0003A24 +#define ACP_P1_I2S_TX_RINGBUFSIZE 0x0003A28 +#define ACP_P1_I2S_TX_LINKPOSITIONCNTR 0x0003A2C +#define ACP_P1_I2S_TX_FIFOADDR 0x0003A30 +#define ACP_P1_I2S_TX_FIFOSIZE 0x0003A34 +#define ACP_P1_I2S_TX_DMA_SIZE 0x0003A38 +#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x0003A3C +#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0003A40 +#define ACP_P1_I2S_TX_INTR_WATERMARK_SIZE 0x0003A44 +#define ACP_P1_BT_RX_RINGBUFADDR 0x0003A48 +#define ACP_P1_BT_RX_RINGBUFSIZE 0x0003A4C +#define ACP_P1_BT_RX_LINKPOSITIONCNTR 0x0003A50 +#define ACP_P1_BT_RX_FIFOADDR 0x0003A54 +#define ACP_P1_BT_RX_FIFOSIZE 0x0003A58 +#define ACP_P1_BT_RX_DMA_SIZE 0x0003A5C +#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0003A60 +#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_LOW 0x0003A64 +#define ACP_P1_BT_RX_INTR_WATERMARK_SIZE 0x0003A68 +#define ACP_P1_BT_TX_RINGBUFADDR 0x0003A6C +#define ACP_P1_BT_TX_RINGBUFSIZE 0x0003A70 +#define ACP_P1_BT_TX_LINKPOSITIONCNTR 0x0003A74 +#define ACP_P1_BT_TX_FIFOADDR 0x0003A78 +#define ACP_P1_BT_TX_FIFOSIZE 0x0003A7C +#define ACP_P1_BT_TX_DMA_SIZE 0x0003A80 +#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0003A84 +#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_LOW 0x0003A88 +#define ACP_P1_BT_TX_INTR_WATERMARK_SIZE 0x0003A8C +#define ACP_P1_HS_RX_RINGBUFADDR 0x0003A90 +#define ACP_P1_HS_RX_RINGBUFSIZE 0x0003A94 +#define ACP_P1_HS_RX_LINKPOSITIONCNTR 0x0003A98 +#define ACP_P1_HS_RX_FIFOADDR 0x0003A9C +#define ACP_P1_HS_RX_FIFOSIZE 0x0003AA0 +#define ACP_P1_HS_RX_DMA_SIZE 0x0003AA4 +#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_HIGH 0x0003AA8 +#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_LOW 0x0003AAC +#define ACP_P1_HS_RX_INTR_WATERMARK_SIZE 0x0003AB0 +#define ACP_P1_HS_TX_RINGBUFADDR 0x0003AB4 +#define ACP_P1_HS_TX_RINGBUFSIZE 0x0003AB8 +#define ACP_P1_HS_TX_LINKPOSITIONCNTR 0x0003ABC +#define ACP_P1_HS_TX_FIFOADDR 0x0003AC0 +#define ACP_P1_HS_TX_FIFOSIZE 0x0003AC4 +#define ACP_P1_HS_TX_DMA_SIZE 0x0003AC8 +#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_HIGH 0x0003ACC +#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_LOW 0x0003AD0 +#define ACP_P1_HS_TX_INTR_WATERMARK_SIZE 0x0003AD4 +#define ACP_P1_AUDIO_RX_RINGBUFADDR ACP_P1_I2S_RX_RINGBUFADDR +#define ACP_P1_AUDIO_RX_RINGBUFSIZE ACP_P1_I2S_RX_RINGBUFSIZE +#define ACP_P1_AUDIO_RX_LINKPOSITIONCNTR ACP_P1_I2S_RX_LINKPOSITIONCNTR +#define ACP_P1_AUDIO_RX_FIFOADDR ACP_P1_I2S_RX_FIFOADDR +#define ACP_P1_AUDIO_RX_FIFOSIZE ACP_P1_I2S_RX_FIFOSIZE +#define ACP_P1_AUDIO_RX_DMA_SIZE ACP_P1_I2S_RX_DMA_SIZE +#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH +#define ACP_P1_AUDIO_RX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW +#define ACP_P1_AUDIO_RX_INTR_WATERMARK_SIZE ACP_P1_I2S_RX_INTR_WATERMARK_SIZE +#define ACP_P1_AUDIO_TX_RINGBUFADDR ACP_P1_I2S_TX_RINGBUFADDR +#define ACP_P1_AUDIO_TX_RINGBUFSIZE ACP_P1_I2S_TX_RINGBUFSIZE +#define ACP_P1_AUDIO_TX_LINKPOSITIONCNTR ACP_P1_I2S_TX_LINKPOSITIONCNTR +#define ACP_P1_AUDIO_TX_FIFOADDR ACP_P1_I2S_TX_FIFOADDR +#define ACP_P1_AUDIO_TX_FIFOSIZE ACP_P1_I2S_TX_FIFOSIZE +#define ACP_P1_AUDIO_TX_DMA_SIZE ACP_P1_I2S_TX_DMA_SIZE +#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_HIGH ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH +#define ACP_P1_AUDIO_TX_LINEARPOSITIONCNTR_LOW ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW +#define ACP_P1_AUDIO_TX_INTR_WATERMARK_SIZE ACP_P1_I2S_TX_INTR_WATERMARK_SIZE + +/* Registers from ACP_P1_SW_SWCLK block */ +#define ACP_P1_SW_EN 0x0003C00 +#define ACP_P1_SW_EN_STATUS 0x0003C04 +#define ACP_P1_SW_FRAMESIZE 0x0003C08 +#define ACP_P1_SW_SSP_COUNTER 0x0003C0C +#define ACP_P1_SW_BT_TX_EN 0x0003C50 +#define ACP_P1_SW_BT_TX_EN_STATUS 0x0003C54 +#define ACP_P1_SW_BT_TX_FRAME_FORMAT 0x0003C58 +#define ACP_P1_SW_BT_TX_SAMPLEINTERVAL 0x0003C5C +#define ACP_P1_SW_BT_TX_HCTRL 0x0003C60 +#define ACP_P1_SW_BT_TX_OFFSET 0x0003C64 +#define ACP_P1_SW_BT_TX_CHANNEL_ENABLE_DP0 0x0003C68 +#define ACP_P1_SW_BT_RX_EN 0x0003D28 +#define ACP_P1_SW_BT_RX_EN_STATUS 0x0003D2C +#define ACP_P1_SW_BT_RX_FRAME_FORMAT 0x0003D30 +#define ACP_P1_SW_BT_RX_SAMPLEINTERVAL 0x0003D34 +#define ACP_P1_SW_BT_RX_HCTRL 0x0003D38 +#define ACP_P1_SW_BT_RX_OFFSET 0x0003D3C +#define ACP_P1_SW_BT_RX_CHANNEL_ENABLE_DP0 0x0003D40 +#define ACP_P1_SW_BPT_PORT_EN 0x0003D60 +#define ACP_P1_SW_BPT_PORT_EN_STATUS 0x0003D64 +#define ACP_P1_SW_BPT_PORT_FRAME_FORMAT 0x0003D68 +#define ACP_P1_SW_BPT_PORT_SAMPLEINTERVAL 0x0003D6C +#define ACP_P1_SW_BPT_PORT_HCTRL 0x0003D70 +#define ACP_P1_SW_BPT_PORT_OFFSET 0x0003D74 +#define ACP_P1_SW_BPT_PORT_CHANNEL_ENABLE 0x0003D78 +#define ACP_P1_SW_BPT_PORT_FIRST_BYTE_ADDR 0x0003D7C +#define ACP_P1_SW_CLK_RESUME_CTRL 0x0003D80 +#define ACP_P1_SW_CLK_RESUME_DELAY_CNTR 0x0003D84 +#define ACP_P1_SW_BUS_RESET_CTRL 0x0003D88 +#define ACP_P1_SW_PRBS_ERR_STATUS 0x0003D8C + +/* Registers from ACP_P1_SW_ACLK block */ +#define P1_SW_CORB_BASE_ADDRESS 0x0003E00 +#define P1_SW_CORB_WRITE_POINTER 0x0003E04 +#define P1_SW_CORB_READ_POINTER 0x0003E08 +#define P1_SW_CORB_CONTROL 0x0003E0C +#define P1_SW_CORB_SIZE 0x0003E14 +#define P1_SW_RIRB_BASE_ADDRESS 0x0003E18 +#define P1_SW_RIRB_WRITE_POINTER 0x0003E1C +#define P1_SW_RIRB_RESPONSE_INTERRUPT_COUNT 0x0003E20 +#define P1_SW_RIRB_CONTROL 0x0003E24 +#define P1_SW_RIRB_SIZE 0x0003E28 +#define P1_SW_RIRB_FIFO_MIN_THDL 0x0003E2C +#define P1_SW_IMM_CMD_UPPER_WORD 0x0003E30 +#define P1_SW_IMM_CMD_LOWER_QWORD 0x0003E34 +#define P1_SW_IMM_RESP_UPPER_WORD 0x0003E38 +#define P1_SW_IMM_RESP_LOWER_QWORD 0x0003E3C +#define P1_SW_IMM_CMD_STS 0x0003E40 +#define P1_SW_BRA_BASE_ADDRESS 0x0003E44 +#define P1_SW_BRA_TRANSFER_SIZE 0x0003E48 +#define P1_SW_BRA_DMA_BUSY 0x0003E4C +#define P1_SW_BRA_RESP 0x0003E50 +#define P1_SW_BRA_RESP_FRAME_ADDR 0x0003E54 +#define P1_SW_BRA_CURRENT_TRANSFER_SIZE 0x0003E58 +#define P1_SW_STATE_CHANGE_STATUS_0TO7 0x0003E5C +#define P1_SW_STATE_CHANGE_STATUS_8TO11 0x0003E60 +#define P1_SW_STATE_CHANGE_STATUS_MASK_0TO7 0x0003E64 +#define P1_SW_STATE_CHANGE_STATUS_MASK_8TO11 0x0003E68 +#define P1_SW_CLK_FREQUENCY_CTRL 0x0003E6C +#define P1_SW_ERROR_INTR_MASK 0x0003E70 +#define P1_SW_PHY_TEST_MODE_DATA_OFF 0x0003E74 + +/* Registers from ACP_SCRATCH block */ +#define ACP_SCRATCH_REG_0 0x0010000 +#define ACP_SCRATCH_REG_1 0x0010004 +#define ACP_SCRATCH_REG_2 0x0010008 +#define ACP_SCRATCH_REG_3 0x001000C +#define ACP_SCRATCH_REG_4 0x0010010 +#define ACP_SCRATCH_REG_5 0x0010014 +#define ACP_SCRATCH_REG_6 0x0010018 +#define ACP_SCRATCH_REG_7 0x001001C +#define ACP_SCRATCH_REG_8 0x0010020 +#define ACP_SCRATCH_REG_9 0x0010024 +#define ACP_SCRATCH_REG_10 0x0010028 +#define ACP_SCRATCH_REG_11 0x001002C +#define ACP_SCRATCH_REG_12 0x0010030 +#define ACP_SCRATCH_REG_13 0x0010034 +#define ACP_SCRATCH_REG_14 0x0010038 +#define ACP_SCRATCH_REG_15 0x001003C +#define ACP_SCRATCH_REG_16 0x0010040 +#define ACP_SCRATCH_REG_17 0x0010044 +#define ACP_SCRATCH_REG_18 0x0010048 +#define ACP_SCRATCH_REG_19 0x001004C +#define ACP_SCRATCH_REG_20 0x0010050 +#define ACP_SCRATCH_REG_21 0x0010054 +#define ACP_SCRATCH_REG_22 0x0010058 +#define ACP_SCRATCH_REG_23 0x001005C +#define ACP_SCRATCH_REG_24 0x0010060 +#define ACP_SCRATCH_REG_25 0x0010064 +#define ACP_SCRATCH_REG_26 0x0010068 +#define ACP_SCRATCH_REG_27 0x001006C +#define ACP_SCRATCH_REG_28 0x0010070 +#define ACP_SCRATCH_REG_29 0x0010074 +#define ACP_SCRATCH_REG_30 0x0010078 +#define ACP_SCRATCH_REG_31 0x001007C +#define ACP_SCRATCH_REG_32 0x0010080 +#define ACP_SCRATCH_REG_33 0x0010084 +#define ACP_SCRATCH_REG_34 0x0010088 +#define ACP_SCRATCH_REG_35 0x001008C +#define ACP_SCRATCH_REG_36 0x0010090 +#define ACP_SCRATCH_REG_37 0x0010094 +#define ACP_SCRATCH_REG_38 0x0010098 +#define ACP_SCRATCH_REG_39 0x001009C +#define ACP_SCRATCH_REG_40 0x00100A0 +#define ACP_SCRATCH_REG_41 0x00100A4 +#define ACP_SCRATCH_REG_42 0x00100A8 +#define ACP_SCRATCH_REG_43 0x00100AC +#define ACP_SCRATCH_REG_44 0x00100B0 +#define ACP_SCRATCH_REG_45 0x00100B4 +#define ACP_SCRATCH_REG_46 0x00100B8 +#define ACP_SCRATCH_REG_47 0x00100BC +#define ACP_SCRATCH_REG_48 0x00100C0 +#define ACP_SCRATCH_REG_49 0x00100C4 +#define ACP_SCRATCH_REG_50 0x00100C8 +#define ACP_SCRATCH_REG_51 0x00100CC +#define ACP_SCRATCH_REG_52 0x00100D0 +#define ACP_SCRATCH_REG_53 0x00100D4 +#define ACP_SCRATCH_REG_54 0x00100D8 +#define ACP_SCRATCH_REG_55 0x00100DC +#define ACP_SCRATCH_REG_56 0x00100E0 +#define ACP_SCRATCH_REG_57 0x00100E4 +#define ACP_SCRATCH_REG_58 0x00100E8 +#define ACP_SCRATCH_REG_59 0x00100EC +#define ACP_SCRATCH_REG_60 0x00100F0 +#define ACP_SCRATCH_REG_61 0x00100F4 +#define ACP_SCRATCH_REG_62 0x00100F8 +#define ACP_SCRATCH_REG_63 0x00100FC +#define ACP_SCRATCH_REG_64 0x0010100 +#define ACP_SCRATCH_REG_65 0x0010104 +#define ACP_SCRATCH_REG_66 0x0010108 +#define ACP_SCRATCH_REG_67 0x001010C +#define ACP_SCRATCH_REG_68 0x0010110 +#define ACP_SCRATCH_REG_69 0x0010114 +#define ACP_SCRATCH_REG_70 0x0010118 +#define ACP_SCRATCH_REG_71 0x001011C +#define ACP_SCRATCH_REG_72 0x0010120 +#define ACP_SCRATCH_REG_73 0x0010124 +#define ACP_SCRATCH_REG_74 0x0010128 +#define ACP_SCRATCH_REG_75 0x001012C +#define ACP_SCRATCH_REG_76 0x0010130 +#define ACP_SCRATCH_REG_77 0x0010134 +#define ACP_SCRATCH_REG_78 0x0010138 +#define ACP_SCRATCH_REG_79 0x001013C +#define ACP_SCRATCH_REG_80 0x0010140 +#define ACP_SCRATCH_REG_81 0x0010144 +#define ACP_SCRATCH_REG_82 0x0010148 +#define ACP_SCRATCH_REG_83 0x001014C +#define ACP_SCRATCH_REG_84 0x0010150 +#define ACP_SCRATCH_REG_85 0x0010154 +#define ACP_SCRATCH_REG_86 0x0010158 +#define ACP_SCRATCH_REG_87 0x001015C +#define ACP_SCRATCH_REG_88 0x0010160 +#define ACP_SCRATCH_REG_89 0x0010164 +#define ACP_SCRATCH_REG_90 0x0010168 +#define ACP_SCRATCH_REG_91 0x001016C +#define ACP_SCRATCH_REG_92 0x0010170 +#define ACP_SCRATCH_REG_93 0x0010174 +#define ACP_SCRATCH_REG_94 0x0010178 +#define ACP_SCRATCH_REG_95 0x001017C +#define ACP_SCRATCH_REG_96 0x0010180 +#define ACP_SCRATCH_REG_97 0x0010184 +#define ACP_SCRATCH_REG_98 0x0010188 +#define ACP_SCRATCH_REG_99 0x001018C +#define ACP_SCRATCH_REG_100 0x0010190 +#define ACP_SCRATCH_REG_101 0x0010194 +#define ACP_SCRATCH_REG_102 0x0010198 +#define ACP_SCRATCH_REG_103 0x001019C +#define ACP_SCRATCH_REG_104 0x00101A0 +#define ACP_SCRATCH_REG_105 0x00101A4 +#define ACP_SCRATCH_REG_106 0x00101A8 +#define ACP_SCRATCH_REG_107 0x00101AC +#define ACP_SCRATCH_REG_108 0x00101B0 +#define ACP_SCRATCH_REG_109 0x00101B4 +#define ACP_SCRATCH_REG_110 0x00101B8 +#define ACP_SCRATCH_REG_111 0x00101BC +#define ACP_SCRATCH_REG_112 0x00101C0 +#define ACP_SCRATCH_REG_113 0x00101C4 +#define ACP_SCRATCH_REG_114 0x00101C8 +#define ACP_SCRATCH_REG_115 0x00101CC +#define ACP_SCRATCH_REG_116 0x00101D0 +#define ACP_SCRATCH_REG_117 0x00101D4 +#define ACP_SCRATCH_REG_118 0x00101D8 +#define ACP_SCRATCH_REG_119 0x00101DC +#define ACP_SCRATCH_REG_120 0x00101E0 +#define ACP_SCRATCH_REG_121 0x00101E4 +#define ACP_SCRATCH_REG_122 0x00101E8 +#define ACP_SCRATCH_REG_123 0x00101EC +#define ACP_SCRATCH_REG_124 0x00101F0 +#define ACP_SCRATCH_REG_125 0x00101F4 +#define ACP_SCRATCH_REG_126 0x00101F8 +#define ACP_SCRATCH_REG_127 0x00101FC +#define ACP_SCRATCH_REG_128 0x0010200 +#endif diff --git a/sound/soc/amd/Kconfig b/sound/soc/amd/Kconfig index 150786279257..c88ebd84bdd5 100644 --- a/sound/soc/amd/Kconfig +++ b/sound/soc/amd/Kconfig @@ -129,10 +129,10 @@ config SND_SOC_AMD_RPL_ACP6x If unsure select "N". config SND_SOC_AMD_PS - tristate "AMD Audio Coprocessor-v6.2 Pink Sardine support" + tristate "AMD Audio Coprocessor-v6.3 Pink Sardine support" depends on X86 && PCI && ACPI help - This option enables Audio Coprocessor i.e ACP v6.2 support on + This option enables Audio Coprocessor i.e ACP v6.3 support on AMD Pink sardine platform. By enabling this flag build will be triggered for ACP PCI driver, ACP PDM DMA driver. Say m if you have such a device. diff --git a/sound/soc/amd/ps/acp62.h b/sound/soc/amd/ps/acp62.h deleted file mode 100644 index 8b30aefa4cd0..000000000000 --- a/sound/soc/amd/ps/acp62.h +++ /dev/null @@ -1,98 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * AMD ALSA SoC PDM Driver - * - * Copyright (C) 2022 Advanced Micro Devices, Inc. All rights reserved. - */ - -#include - -#define ACP_DEVICE_ID 0x15E2 -#define ACP6x_REG_START 0x1240000 -#define ACP6x_REG_END 0x1250200 -#define ACP6x_DEVS 3 -#define ACP6x_PDM_MODE 1 - -#define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001 -#define ACP_PGFSM_CNTL_POWER_ON_MASK 1 -#define ACP_PGFSM_CNTL_POWER_OFF_MASK 0 -#define ACP_PGFSM_STATUS_MASK 3 -#define ACP_POWERED_ON 0 -#define ACP_POWER_ON_IN_PROGRESS 1 -#define ACP_POWERED_OFF 2 -#define ACP_POWER_OFF_IN_PROGRESS 3 - -#define ACP_ERROR_MASK 0x20000000 -#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF -#define PDM_DMA_STAT 0x10 - -#define PDM_DMA_INTR_MASK 0x10000 -#define ACP_ERROR_STAT 29 -#define PDM_DECIMATION_FACTOR 2 -#define ACP_PDM_CLK_FREQ_MASK 7 -#define ACP_WOV_MISC_CTRL_MASK 0x10 -#define ACP_PDM_ENABLE 1 -#define ACP_PDM_DISABLE 0 -#define ACP_PDM_DMA_EN_STATUS 2 -#define TWO_CH 2 -#define DELAY_US 5 -#define ACP_COUNTER 20000 - -#define ACP_SRAM_PTE_OFFSET 0x03800000 -#define PAGE_SIZE_4K_ENABLE 2 -#define PDM_PTE_OFFSET 0 -#define PDM_MEM_WINDOW_START 0x4000000 - -#define CAPTURE_MIN_NUM_PERIODS 4 -#define CAPTURE_MAX_NUM_PERIODS 4 -#define CAPTURE_MAX_PERIOD_SIZE 8192 -#define CAPTURE_MIN_PERIOD_SIZE 4096 - -#define MAX_BUFFER (CAPTURE_MAX_PERIOD_SIZE * CAPTURE_MAX_NUM_PERIODS) -#define MIN_BUFFER MAX_BUFFER - -/* time in ms for runtime suspend delay */ -#define ACP_SUSPEND_DELAY_MS 2000 - -enum acp_config { - ACP_CONFIG_0 = 0, - ACP_CONFIG_1, - ACP_CONFIG_2, - ACP_CONFIG_3, - ACP_CONFIG_4, - ACP_CONFIG_5, - ACP_CONFIG_6, - ACP_CONFIG_7, - ACP_CONFIG_8, - ACP_CONFIG_9, - ACP_CONFIG_10, - ACP_CONFIG_11, - ACP_CONFIG_12, - ACP_CONFIG_13, - ACP_CONFIG_14, - ACP_CONFIG_15, -}; - -struct pdm_stream_instance { - u16 num_pages; - u16 channels; - dma_addr_t dma_addr; - u64 bytescount; - void __iomem *acp62_base; -}; - -struct pdm_dev_data { - u32 pdm_irq; - void __iomem *acp62_base; - struct snd_pcm_substream *capture_stream; -}; - -static inline u32 acp62_readl(void __iomem *base_addr) -{ - return readl(base_addr); -} - -static inline void acp62_writel(u32 val, void __iomem *base_addr) -{ - writel(val, base_addr); -} diff --git a/sound/soc/amd/ps/acp63.h b/sound/soc/amd/ps/acp63.h new file mode 100644 index 000000000000..85f869c2229f --- /dev/null +++ b/sound/soc/amd/ps/acp63.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * AMD ALSA SoC PDM Driver + * + * Copyright (C) 2022 Advanced Micro Devices, Inc. All rights reserved. + */ + +#include + +#define ACP_DEVICE_ID 0x15E2 +#define ACP6x_REG_START 0x1240000 +#define ACP6x_REG_END 0x1250200 +#define ACP6x_DEVS 3 +#define ACP6x_PDM_MODE 1 + +#define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001 +#define ACP_PGFSM_CNTL_POWER_ON_MASK 1 +#define ACP_PGFSM_CNTL_POWER_OFF_MASK 0 +#define ACP_PGFSM_STATUS_MASK 3 +#define ACP_POWERED_ON 0 +#define ACP_POWER_ON_IN_PROGRESS 1 +#define ACP_POWERED_OFF 2 +#define ACP_POWER_OFF_IN_PROGRESS 3 + +#define ACP_ERROR_MASK 0x20000000 +#define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF +#define PDM_DMA_STAT 0x10 + +#define PDM_DMA_INTR_MASK 0x10000 +#define ACP_ERROR_STAT 29 +#define PDM_DECIMATION_FACTOR 2 +#define ACP_PDM_CLK_FREQ_MASK 7 +#define ACP_WOV_MISC_CTRL_MASK 0x10 +#define ACP_PDM_ENABLE 1 +#define ACP_PDM_DISABLE 0 +#define ACP_PDM_DMA_EN_STATUS 2 +#define TWO_CH 2 +#define DELAY_US 5 +#define ACP_COUNTER 20000 + +#define ACP_SRAM_PTE_OFFSET 0x03800000 +#define PAGE_SIZE_4K_ENABLE 2 +#define PDM_PTE_OFFSET 0 +#define PDM_MEM_WINDOW_START 0x4000000 + +#define CAPTURE_MIN_NUM_PERIODS 4 +#define CAPTURE_MAX_NUM_PERIODS 4 +#define CAPTURE_MAX_PERIOD_SIZE 8192 +#define CAPTURE_MIN_PERIOD_SIZE 4096 + +#define MAX_BUFFER (CAPTURE_MAX_PERIOD_SIZE * CAPTURE_MAX_NUM_PERIODS) +#define MIN_BUFFER MAX_BUFFER + +/* time in ms for runtime suspend delay */ +#define ACP_SUSPEND_DELAY_MS 2000 + +enum acp_config { + ACP_CONFIG_0 = 0, + ACP_CONFIG_1, + ACP_CONFIG_2, + ACP_CONFIG_3, + ACP_CONFIG_4, + ACP_CONFIG_5, + ACP_CONFIG_6, + ACP_CONFIG_7, + ACP_CONFIG_8, + ACP_CONFIG_9, + ACP_CONFIG_10, + ACP_CONFIG_11, + ACP_CONFIG_12, + ACP_CONFIG_13, + ACP_CONFIG_14, + ACP_CONFIG_15, +}; + +struct pdm_stream_instance { + u16 num_pages; + u16 channels; + dma_addr_t dma_addr; + u64 bytescount; + void __iomem *acp63_base; +}; + +struct pdm_dev_data { + u32 pdm_irq; + void __iomem *acp63_base; + struct snd_pcm_substream *capture_stream; +}; + +static inline u32 acp63_readl(void __iomem *base_addr) +{ + return readl(base_addr); +} + +static inline void acp63_writel(u32 val, void __iomem *base_addr) +{ + writel(val, base_addr); +} diff --git a/sound/soc/amd/ps/pci-ps.c b/sound/soc/amd/ps/pci-ps.c index dff2e2376bbf..08c4b9bef055 100644 --- a/sound/soc/amd/ps/pci-ps.c +++ b/sound/soc/amd/ps/pci-ps.c @@ -15,30 +15,30 @@ #include #include -#include "acp62.h" +#include "acp63.h" -struct acp62_dev_data { - void __iomem *acp62_base; +struct acp63_dev_data { + void __iomem *acp63_base; struct resource *res; - bool acp62_audio_mode; + bool acp63_audio_mode; struct platform_device *pdev[ACP6x_DEVS]; }; -static int acp62_power_on(void __iomem *acp_base) +static int acp63_power_on(void __iomem *acp_base) { u32 val; int timeout; - val = acp62_readl(acp_base + ACP_PGFSM_STATUS); + val = acp63_readl(acp_base + ACP_PGFSM_STATUS); if (!val) return val; if ((val & ACP_PGFSM_STATUS_MASK) != ACP_POWER_ON_IN_PROGRESS) - acp62_writel(ACP_PGFSM_CNTL_POWER_ON_MASK, acp_base + ACP_PGFSM_CONTROL); + acp63_writel(ACP_PGFSM_CNTL_POWER_ON_MASK, acp_base + ACP_PGFSM_CONTROL); timeout = 0; while (++timeout < 500) { - val = acp62_readl(acp_base + ACP_PGFSM_STATUS); + val = acp63_readl(acp_base + ACP_PGFSM_STATUS); if (!val) return 0; udelay(1); @@ -46,23 +46,23 @@ static int acp62_power_on(void __iomem *acp_base) return -ETIMEDOUT; } -static int acp62_reset(void __iomem *acp_base) +static int acp63_reset(void __iomem *acp_base) { u32 val; int timeout; - acp62_writel(1, acp_base + ACP_SOFT_RESET); + acp63_writel(1, acp_base + ACP_SOFT_RESET); timeout = 0; while (++timeout < 500) { - val = acp62_readl(acp_base + ACP_SOFT_RESET); + val = acp63_readl(acp_base + ACP_SOFT_RESET); if (val & ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK) break; cpu_relax(); } - acp62_writel(0, acp_base + ACP_SOFT_RESET); + acp63_writel(0, acp_base + ACP_SOFT_RESET); timeout = 0; while (++timeout < 500) { - val = acp62_readl(acp_base + ACP_SOFT_RESET); + val = acp63_readl(acp_base + ACP_SOFT_RESET); if (!val) return 0; cpu_relax(); @@ -70,57 +70,57 @@ static int acp62_reset(void __iomem *acp_base) return -ETIMEDOUT; } -static void acp62_enable_interrupts(void __iomem *acp_base) +static void acp63_enable_interrupts(void __iomem *acp_base) { - acp62_writel(1, acp_base + ACP_EXTERNAL_INTR_ENB); + acp63_writel(1, acp_base + ACP_EXTERNAL_INTR_ENB); } -static void acp62_disable_interrupts(void __iomem *acp_base) +static void acp63_disable_interrupts(void __iomem *acp_base) { - acp62_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base + + acp63_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base + ACP_EXTERNAL_INTR_STAT); - acp62_writel(0, acp_base + ACP_EXTERNAL_INTR_CNTL); - acp62_writel(0, acp_base + ACP_EXTERNAL_INTR_ENB); + acp63_writel(0, acp_base + ACP_EXTERNAL_INTR_CNTL); + acp63_writel(0, acp_base + ACP_EXTERNAL_INTR_ENB); } -static int acp62_init(void __iomem *acp_base, struct device *dev) +static int acp63_init(void __iomem *acp_base, struct device *dev) { int ret; - ret = acp62_power_on(acp_base); + ret = acp63_power_on(acp_base); if (ret) { dev_err(dev, "ACP power on failed\n"); return ret; } - acp62_writel(0x01, acp_base + ACP_CONTROL); - ret = acp62_reset(acp_base); + acp63_writel(0x01, acp_base + ACP_CONTROL); + ret = acp63_reset(acp_base); if (ret) { dev_err(dev, "ACP reset failed\n"); return ret; } - acp62_writel(0x03, acp_base + ACP_CLKMUX_SEL); - acp62_enable_interrupts(acp_base); + acp63_writel(0x03, acp_base + ACP_CLKMUX_SEL); + acp63_enable_interrupts(acp_base); return 0; } -static int acp62_deinit(void __iomem *acp_base, struct device *dev) +static int acp63_deinit(void __iomem *acp_base, struct device *dev) { int ret; - acp62_disable_interrupts(acp_base); - ret = acp62_reset(acp_base); + acp63_disable_interrupts(acp_base); + ret = acp63_reset(acp_base); if (ret) { dev_err(dev, "ACP reset failed\n"); return ret; } - acp62_writel(0, acp_base + ACP_CLKMUX_SEL); - acp62_writel(0, acp_base + ACP_CONTROL); + acp63_writel(0, acp_base + ACP_CLKMUX_SEL); + acp63_writel(0, acp_base + ACP_CONTROL); return 0; } -static irqreturn_t acp62_irq_handler(int irq, void *dev_id) +static irqreturn_t acp63_irq_handler(int irq, void *dev_id) { - struct acp62_dev_data *adata; + struct acp63_dev_data *adata; struct pdm_dev_data *ps_pdm_data; u32 val; @@ -128,10 +128,10 @@ static irqreturn_t acp62_irq_handler(int irq, void *dev_id) if (!adata) return IRQ_NONE; - val = acp62_readl(adata->acp62_base + ACP_EXTERNAL_INTR_STAT); + val = acp63_readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT); if (val & BIT(PDM_DMA_STAT)) { ps_pdm_data = dev_get_drvdata(&adata->pdev[0]->dev); - acp62_writel(BIT(PDM_DMA_STAT), adata->acp62_base + ACP_EXTERNAL_INTR_STAT); + acp63_writel(BIT(PDM_DMA_STAT), adata->acp63_base + ACP_EXTERNAL_INTR_STAT); if (ps_pdm_data->capture_stream) snd_pcm_period_elapsed(ps_pdm_data->capture_stream); return IRQ_HANDLED; @@ -139,10 +139,10 @@ static irqreturn_t acp62_irq_handler(int irq, void *dev_id) return IRQ_NONE; } -static int snd_acp62_probe(struct pci_dev *pci, +static int snd_acp63_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { - struct acp62_dev_data *adata; + struct acp63_dev_data *adata; struct platform_device_info pdevinfo[ACP6x_DEVS]; int index, ret; int val = 0x00; @@ -157,7 +157,7 @@ static int snd_acp62_probe(struct pci_dev *pci, case 0x63: break; default: - dev_dbg(&pci->dev, "acp62 pci device not found\n"); + dev_dbg(&pci->dev, "acp63 pci device not found\n"); return -ENODEV; } if (pci_enable_device(pci)) { @@ -170,7 +170,7 @@ static int snd_acp62_probe(struct pci_dev *pci, dev_err(&pci->dev, "pci_request_regions failed\n"); goto disable_pci; } - adata = devm_kzalloc(&pci->dev, sizeof(struct acp62_dev_data), + adata = devm_kzalloc(&pci->dev, sizeof(struct acp63_dev_data), GFP_KERNEL); if (!adata) { ret = -ENOMEM; @@ -178,18 +178,18 @@ static int snd_acp62_probe(struct pci_dev *pci, } addr = pci_resource_start(pci, 0); - adata->acp62_base = devm_ioremap(&pci->dev, addr, + adata->acp63_base = devm_ioremap(&pci->dev, addr, pci_resource_len(pci, 0)); - if (!adata->acp62_base) { + if (!adata->acp63_base) { ret = -ENOMEM; goto release_regions; } pci_set_master(pci); pci_set_drvdata(pci, adata); - ret = acp62_init(adata->acp62_base, &pci->dev); + ret = acp63_init(adata->acp63_base, &pci->dev); if (ret) goto release_regions; - val = acp62_readl(adata->acp62_base + ACP_PIN_CONFIG); + val = acp63_readl(adata->acp63_base + ACP_PIN_CONFIG); switch (val) { case ACP_CONFIG_0: case ACP_CONFIG_1: @@ -220,7 +220,7 @@ static int snd_acp62_probe(struct pci_dev *pci, adata->res->flags = IORESOURCE_MEM; adata->res->start = addr; adata->res->end = addr + (ACP6x_REG_END - ACP6x_REG_START); - adata->acp62_audio_mode = ACP6x_PDM_MODE; + adata->acp63_audio_mode = ACP6x_PDM_MODE; memset(&pdevinfo, 0, sizeof(pdevinfo)); pdevinfo[0].name = "acp_ps_pdm_dma"; @@ -248,7 +248,7 @@ static int snd_acp62_probe(struct pci_dev *pci, ret = PTR_ERR(adata->pdev[index]); goto unregister_devs; } - ret = devm_request_irq(&pci->dev, pci->irq, acp62_irq_handler, + ret = devm_request_irq(&pci->dev, pci->irq, acp63_irq_handler, irqflags, "ACP_PCI_IRQ", adata); if (ret) { dev_err(&pci->dev, "ACP PCI IRQ request failed\n"); @@ -267,7 +267,7 @@ unregister_devs: for (--index; index >= 0; index--) platform_device_unregister(adata->pdev[index]); de_init: - if (acp62_deinit(adata->acp62_base, &pci->dev)) + if (acp63_deinit(adata->acp63_base, &pci->dev)) dev_err(&pci->dev, "ACP de-init failed\n"); release_regions: pci_release_regions(pci); @@ -277,46 +277,46 @@ disable_pci: return ret; } -static int __maybe_unused snd_acp62_suspend(struct device *dev) +static int __maybe_unused snd_acp63_suspend(struct device *dev) { - struct acp62_dev_data *adata; + struct acp63_dev_data *adata; int ret; adata = dev_get_drvdata(dev); - ret = acp62_deinit(adata->acp62_base, dev); + ret = acp63_deinit(adata->acp63_base, dev); if (ret) dev_err(dev, "ACP de-init failed\n"); return ret; } -static int __maybe_unused snd_acp62_resume(struct device *dev) +static int __maybe_unused snd_acp63_resume(struct device *dev) { - struct acp62_dev_data *adata; + struct acp63_dev_data *adata; int ret; adata = dev_get_drvdata(dev); - ret = acp62_init(adata->acp62_base, dev); + ret = acp63_init(adata->acp63_base, dev); if (ret) dev_err(dev, "ACP init failed\n"); return ret; } -static const struct dev_pm_ops acp62_pm_ops = { - SET_RUNTIME_PM_OPS(snd_acp62_suspend, snd_acp62_resume, NULL) - SET_SYSTEM_SLEEP_PM_OPS(snd_acp62_suspend, snd_acp62_resume) +static const struct dev_pm_ops acp63_pm_ops = { + SET_RUNTIME_PM_OPS(snd_acp63_suspend, snd_acp63_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(snd_acp63_suspend, snd_acp63_resume) }; -static void snd_acp62_remove(struct pci_dev *pci) +static void snd_acp63_remove(struct pci_dev *pci) { - struct acp62_dev_data *adata; + struct acp63_dev_data *adata; int ret, index; adata = pci_get_drvdata(pci); - if (adata->acp62_audio_mode == ACP6x_PDM_MODE) { + if (adata->acp63_audio_mode == ACP6x_PDM_MODE) { for (index = 0; index < ACP6x_DEVS; index++) platform_device_unregister(adata->pdev[index]); } - ret = acp62_deinit(adata->acp62_base, &pci->dev); + ret = acp63_deinit(adata->acp63_base, &pci->dev); if (ret) dev_err(&pci->dev, "ACP de-init failed\n"); pm_runtime_forbid(&pci->dev); @@ -325,25 +325,25 @@ static void snd_acp62_remove(struct pci_dev *pci) pci_disable_device(pci); } -static const struct pci_device_id snd_acp62_ids[] = { +static const struct pci_device_id snd_acp63_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, ACP_DEVICE_ID), .class = PCI_CLASS_MULTIMEDIA_OTHER << 8, .class_mask = 0xffffff }, { 0, }, }; -MODULE_DEVICE_TABLE(pci, snd_acp62_ids); +MODULE_DEVICE_TABLE(pci, snd_acp63_ids); -static struct pci_driver ps_acp62_driver = { +static struct pci_driver ps_acp63_driver = { .name = KBUILD_MODNAME, - .id_table = snd_acp62_ids, - .probe = snd_acp62_probe, - .remove = snd_acp62_remove, + .id_table = snd_acp63_ids, + .probe = snd_acp63_probe, + .remove = snd_acp63_remove, .driver = { - .pm = &acp62_pm_ops, + .pm = &acp63_pm_ops, } }; -module_pci_driver(ps_acp62_driver); +module_pci_driver(ps_acp63_driver); MODULE_AUTHOR("Vijendar.Mukunda@amd.com"); MODULE_AUTHOR("Syed.SabaKareem@amd.com"); diff --git a/sound/soc/amd/ps/ps-mach.c b/sound/soc/amd/ps/ps-mach.c index b3e97093481d..3ffbe4fdafdf 100644 --- a/sound/soc/amd/ps/ps-mach.c +++ b/sound/soc/amd/ps/ps-mach.c @@ -13,11 +13,11 @@ #include #include -#include "acp62.h" +#include "acp63.h" #define DRV_NAME "acp_ps_mach" -SND_SOC_DAILINK_DEF(acp62_pdm, +SND_SOC_DAILINK_DEF(acp63_pdm, DAILINK_COMP_ARRAY(COMP_CPU("acp_ps_pdm_dma.0"))); SND_SOC_DAILINK_DEF(dmic_codec, @@ -27,31 +27,31 @@ SND_SOC_DAILINK_DEF(dmic_codec, SND_SOC_DAILINK_DEF(pdm_platform, DAILINK_COMP_ARRAY(COMP_PLATFORM("acp_ps_pdm_dma.0"))); -static struct snd_soc_dai_link acp62_dai_pdm[] = { +static struct snd_soc_dai_link acp63_dai_pdm[] = { { - .name = "acp62-dmic-capture", + .name = "acp63-dmic-capture", .stream_name = "DMIC capture", .capture_only = 1, - SND_SOC_DAILINK_REG(acp62_pdm, dmic_codec, pdm_platform), + SND_SOC_DAILINK_REG(acp63_pdm, dmic_codec, pdm_platform), }, }; -static struct snd_soc_card acp62_card = { - .name = "acp62", +static struct snd_soc_card acp63_card = { + .name = "acp63", .owner = THIS_MODULE, - .dai_link = acp62_dai_pdm, + .dai_link = acp63_dai_pdm, .num_links = 1, }; -static int acp62_probe(struct platform_device *pdev) +static int acp63_probe(struct platform_device *pdev) { - struct acp62_pdm *machine = NULL; + struct acp63_pdm *machine = NULL; struct snd_soc_card *card; int ret; - platform_set_drvdata(pdev, &acp62_card); + platform_set_drvdata(pdev, &acp63_card); card = platform_get_drvdata(pdev); - acp62_card.dev = &pdev->dev; + acp63_card.dev = &pdev->dev; snd_soc_card_set_drvdata(card, machine); ret = devm_snd_soc_register_card(&pdev->dev, card); @@ -64,15 +64,15 @@ static int acp62_probe(struct platform_device *pdev) return 0; } -static struct platform_driver acp62_mach_driver = { +static struct platform_driver acp63_mach_driver = { .driver = { .name = "acp_ps_mach", .pm = &snd_soc_pm_ops, }, - .probe = acp62_probe, + .probe = acp63_probe, }; -module_platform_driver(acp62_mach_driver); +module_platform_driver(acp63_mach_driver); MODULE_AUTHOR("Syed.SabaKareem@amd.com"); MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/amd/ps/ps-pdm-dma.c b/sound/soc/amd/ps/ps-pdm-dma.c index b207b726cd82..eea71a9d2ef1 100644 --- a/sound/soc/amd/ps/ps-pdm-dma.c +++ b/sound/soc/amd/ps/ps-pdm-dma.c @@ -14,11 +14,11 @@ #include #include -#include "acp62.h" +#include "acp63.h" #define DRV_NAME "acp_ps_pdm_dma" -static const struct snd_pcm_hardware acp62_pdm_hardware_capture = { +static const struct snd_pcm_hardware acp63_pdm_hardware_capture = { .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP | @@ -37,61 +37,61 @@ static const struct snd_pcm_hardware acp62_pdm_hardware_capture = { .periods_max = CAPTURE_MAX_NUM_PERIODS, }; -static void acp62_init_pdm_ring_buffer(u32 physical_addr, u32 buffer_size, +static void acp63_init_pdm_ring_buffer(u32 physical_addr, u32 buffer_size, u32 watermark_size, void __iomem *acp_base) { - acp62_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR); - acp62_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE); - acp62_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE); - acp62_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL); + acp63_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR); + acp63_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE); + acp63_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE); + acp63_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL); } -static void acp62_enable_pdm_clock(void __iomem *acp_base) +static void acp63_enable_pdm_clock(void __iomem *acp_base) { u32 pdm_clk_enable, pdm_ctrl; pdm_clk_enable = ACP_PDM_CLK_FREQ_MASK; pdm_ctrl = 0x00; - acp62_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL); - pdm_ctrl = acp62_readl(acp_base + ACP_WOV_MISC_CTRL); + acp63_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL); + pdm_ctrl = acp63_readl(acp_base + ACP_WOV_MISC_CTRL); pdm_ctrl |= ACP_WOV_MISC_CTRL_MASK; - acp62_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL); + acp63_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL); } -static void acp62_enable_pdm_interrupts(void __iomem *acp_base) +static void acp63_enable_pdm_interrupts(void __iomem *acp_base) { u32 ext_int_ctrl; - ext_int_ctrl = acp62_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_int_ctrl = acp63_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); ext_int_ctrl |= PDM_DMA_INTR_MASK; - acp62_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); + acp63_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); } -static void acp62_disable_pdm_interrupts(void __iomem *acp_base) +static void acp63_disable_pdm_interrupts(void __iomem *acp_base) { u32 ext_int_ctrl; - ext_int_ctrl = acp62_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_int_ctrl = acp63_readl(acp_base + ACP_EXTERNAL_INTR_CNTL); ext_int_ctrl &= ~PDM_DMA_INTR_MASK; - acp62_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); + acp63_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL); } -static bool acp62_check_pdm_dma_status(void __iomem *acp_base) +static bool acp63_check_pdm_dma_status(void __iomem *acp_base) { bool pdm_dma_status; u32 pdm_enable, pdm_dma_enable; pdm_dma_status = false; - pdm_enable = acp62_readl(acp_base + ACP_WOV_PDM_ENABLE); - pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + pdm_enable = acp63_readl(acp_base + ACP_WOV_PDM_ENABLE); + pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); if ((pdm_enable & ACP_PDM_ENABLE) && (pdm_dma_enable & ACP_PDM_DMA_EN_STATUS)) pdm_dma_status = true; return pdm_dma_status; } -static int acp62_start_pdm_dma(void __iomem *acp_base) +static int acp63_start_pdm_dma(void __iomem *acp_base) { u32 pdm_enable; u32 pdm_dma_enable; @@ -100,12 +100,12 @@ static int acp62_start_pdm_dma(void __iomem *acp_base) pdm_enable = 0x01; pdm_dma_enable = 0x01; - acp62_enable_pdm_clock(acp_base); - acp62_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); - acp62_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); + acp63_enable_pdm_clock(acp_base); + acp63_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); + acp63_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); timeout = 0; while (++timeout < ACP_COUNTER) { - pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); if ((pdm_dma_enable & 0x02) == ACP_PDM_DMA_EN_STATUS) return 0; udelay(DELAY_US); @@ -113,7 +113,7 @@ static int acp62_start_pdm_dma(void __iomem *acp_base) return -ETIMEDOUT; } -static int acp62_stop_pdm_dma(void __iomem *acp_base) +static int acp63_stop_pdm_dma(void __iomem *acp_base) { u32 pdm_enable, pdm_dma_enable; int timeout; @@ -121,14 +121,14 @@ static int acp62_stop_pdm_dma(void __iomem *acp_base) pdm_enable = 0x00; pdm_dma_enable = 0x00; - pdm_enable = acp62_readl(acp_base + ACP_WOV_PDM_ENABLE); - pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + pdm_enable = acp63_readl(acp_base + ACP_WOV_PDM_ENABLE); + pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); if (pdm_dma_enable & 0x01) { pdm_dma_enable = 0x02; - acp62_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); + acp63_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); timeout = 0; while (++timeout < ACP_COUNTER) { - pdm_dma_enable = acp62_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); if ((pdm_dma_enable & 0x02) == 0x00) break; udelay(DELAY_US); @@ -138,13 +138,13 @@ static int acp62_stop_pdm_dma(void __iomem *acp_base) } if (pdm_enable == ACP_PDM_ENABLE) { pdm_enable = ACP_PDM_DISABLE; - acp62_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); + acp63_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); } - acp62_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH); + acp63_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH); return 0; } -static void acp62_config_dma(struct pdm_stream_instance *rtd, int direction) +static void acp63_config_dma(struct pdm_stream_instance *rtd, int direction) { u16 page_idx; u32 low, high, val; @@ -154,24 +154,24 @@ static void acp62_config_dma(struct pdm_stream_instance *rtd, int direction) val = PDM_PTE_OFFSET; /* Group Enable */ - acp62_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp62_base + + acp63_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp63_base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_1); - acp62_writel(PAGE_SIZE_4K_ENABLE, rtd->acp62_base + + acp63_writel(PAGE_SIZE_4K_ENABLE, rtd->acp63_base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1); for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) { /* Load the low address of page int ACP SRAM through SRBM */ low = lower_32_bits(addr); high = upper_32_bits(addr); - acp62_writel(low, rtd->acp62_base + ACP_SCRATCH_REG_0 + val); + acp63_writel(low, rtd->acp63_base + ACP_SCRATCH_REG_0 + val); high |= BIT(31); - acp62_writel(high, rtd->acp62_base + ACP_SCRATCH_REG_0 + val + 4); + acp63_writel(high, rtd->acp63_base + ACP_SCRATCH_REG_0 + val + 4); val += 8; addr += PAGE_SIZE; } } -static int acp62_pdm_dma_open(struct snd_soc_component *component, +static int acp63_pdm_dma_open(struct snd_soc_component *component, struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime; @@ -186,7 +186,7 @@ static int acp62_pdm_dma_open(struct snd_soc_component *component, return -EINVAL; if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) - runtime->hw = acp62_pdm_hardware_capture; + runtime->hw = acp63_pdm_hardware_capture; ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); @@ -196,17 +196,17 @@ static int acp62_pdm_dma_open(struct snd_soc_component *component, return ret; } - acp62_enable_pdm_interrupts(adata->acp62_base); + acp63_enable_pdm_interrupts(adata->acp63_base); if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) adata->capture_stream = substream; - pdm_data->acp62_base = adata->acp62_base; + pdm_data->acp63_base = adata->acp63_base; runtime->private_data = pdm_data; return ret; } -static int acp62_pdm_dma_hw_params(struct snd_soc_component *component, +static int acp63_pdm_dma_hw_params(struct snd_soc_component *component, struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { @@ -220,26 +220,26 @@ static int acp62_pdm_dma_hw_params(struct snd_soc_component *component, period_bytes = params_period_bytes(params); rtd->dma_addr = substream->runtime->dma_addr; rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT); - acp62_config_dma(rtd, substream->stream); - acp62_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, size, - period_bytes, rtd->acp62_base); + acp63_config_dma(rtd, substream->stream); + acp63_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, size, + period_bytes, rtd->acp63_base); return 0; } -static u64 acp62_pdm_get_byte_count(struct pdm_stream_instance *rtd, +static u64 acp63_pdm_get_byte_count(struct pdm_stream_instance *rtd, int direction) { u32 high, low; u64 byte_count; - high = acp62_readl(rtd->acp62_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); + high = acp63_readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); byte_count = high; - low = acp62_readl(rtd->acp62_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); + low = acp63_readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); byte_count = (byte_count << 32) | low; return byte_count; } -static snd_pcm_uframes_t acp62_pdm_dma_pointer(struct snd_soc_component *comp, +static snd_pcm_uframes_t acp63_pdm_dma_pointer(struct snd_soc_component *comp, struct snd_pcm_substream *stream) { struct pdm_stream_instance *rtd; @@ -249,14 +249,14 @@ static snd_pcm_uframes_t acp62_pdm_dma_pointer(struct snd_soc_component *comp, rtd = stream->runtime->private_data; buffersize = frames_to_bytes(stream->runtime, stream->runtime->buffer_size); - bytescount = acp62_pdm_get_byte_count(rtd, stream->stream); + bytescount = acp63_pdm_get_byte_count(rtd, stream->stream); if (bytescount > rtd->bytescount) bytescount -= rtd->bytescount; pos = do_div(bytescount, buffersize); return bytes_to_frames(stream->runtime, pos); } -static int acp62_pdm_dma_new(struct snd_soc_component *component, +static int acp63_pdm_dma_new(struct snd_soc_component *component, struct snd_soc_pcm_runtime *rtd) { struct device *parent = component->dev->parent; @@ -266,19 +266,19 @@ static int acp62_pdm_dma_new(struct snd_soc_component *component, return 0; } -static int acp62_pdm_dma_close(struct snd_soc_component *component, +static int acp63_pdm_dma_close(struct snd_soc_component *component, struct snd_pcm_substream *substream) { struct pdm_dev_data *adata = dev_get_drvdata(component->dev); struct snd_pcm_runtime *runtime = substream->runtime; - acp62_disable_pdm_interrupts(adata->acp62_base); + acp63_disable_pdm_interrupts(adata->acp63_base); adata->capture_stream = NULL; kfree(runtime->private_data); return 0; } -static int acp62_pdm_dai_trigger(struct snd_pcm_substream *substream, +static int acp63_pdm_dai_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { struct pdm_stream_instance *rtd; @@ -299,20 +299,20 @@ static int acp62_pdm_dai_trigger(struct snd_pcm_substream *substream, case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - acp62_writel(ch_mask, rtd->acp62_base + ACP_WOV_PDM_NO_OF_CHANNELS); - acp62_writel(PDM_DECIMATION_FACTOR, rtd->acp62_base + + acp63_writel(ch_mask, rtd->acp63_base + ACP_WOV_PDM_NO_OF_CHANNELS); + acp63_writel(PDM_DECIMATION_FACTOR, rtd->acp63_base + ACP_WOV_PDM_DECIMATION_FACTOR); - rtd->bytescount = acp62_pdm_get_byte_count(rtd, substream->stream); - pdm_status = acp62_check_pdm_dma_status(rtd->acp62_base); + rtd->bytescount = acp63_pdm_get_byte_count(rtd, substream->stream); + pdm_status = acp63_check_pdm_dma_status(rtd->acp63_base); if (!pdm_status) - ret = acp62_start_pdm_dma(rtd->acp62_base); + ret = acp63_start_pdm_dma(rtd->acp63_base); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - pdm_status = acp62_check_pdm_dma_status(rtd->acp62_base); + pdm_status = acp63_check_pdm_dma_status(rtd->acp63_base); if (pdm_status) - ret = acp62_stop_pdm_dma(rtd->acp62_base); + ret = acp63_stop_pdm_dma(rtd->acp63_base); break; default: ret = -EINVAL; @@ -321,11 +321,11 @@ static int acp62_pdm_dai_trigger(struct snd_pcm_substream *substream, return ret; } -static const struct snd_soc_dai_ops acp62_pdm_dai_ops = { - .trigger = acp62_pdm_dai_trigger, +static const struct snd_soc_dai_ops acp63_pdm_dai_ops = { + .trigger = acp63_pdm_dai_trigger, }; -static struct snd_soc_dai_driver acp62_pdm_dai_driver = { +static struct snd_soc_dai_driver acp63_pdm_dai_driver = { .name = "acp_ps_pdm_dma.0", .capture = { .rates = SNDRV_PCM_RATE_48000, @@ -335,19 +335,19 @@ static struct snd_soc_dai_driver acp62_pdm_dai_driver = { .rate_min = 48000, .rate_max = 48000, }, - .ops = &acp62_pdm_dai_ops, + .ops = &acp63_pdm_dai_ops, }; -static const struct snd_soc_component_driver acp62_pdm_component = { +static const struct snd_soc_component_driver acp63_pdm_component = { .name = DRV_NAME, - .open = acp62_pdm_dma_open, - .close = acp62_pdm_dma_close, - .hw_params = acp62_pdm_dma_hw_params, - .pointer = acp62_pdm_dma_pointer, - .pcm_construct = acp62_pdm_dma_new, + .open = acp63_pdm_dma_open, + .close = acp63_pdm_dma_close, + .hw_params = acp63_pdm_dma_hw_params, + .pointer = acp63_pdm_dma_pointer, + .pcm_construct = acp63_pdm_dma_new, }; -static int acp62_pdm_audio_probe(struct platform_device *pdev) +static int acp63_pdm_audio_probe(struct platform_device *pdev) { struct resource *res; struct pdm_dev_data *adata; @@ -363,16 +363,16 @@ static int acp62_pdm_audio_probe(struct platform_device *pdev) if (!adata) return -ENOMEM; - adata->acp62_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); - if (!adata->acp62_base) + adata->acp63_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (!adata->acp63_base) return -ENOMEM; adata->capture_stream = NULL; dev_set_drvdata(&pdev->dev, adata); status = devm_snd_soc_register_component(&pdev->dev, - &acp62_pdm_component, - &acp62_pdm_dai_driver, 1); + &acp63_pdm_component, + &acp63_pdm_dai_driver, 1); if (status) { dev_err(&pdev->dev, "Fail to register acp pdm dai\n"); @@ -385,13 +385,13 @@ static int acp62_pdm_audio_probe(struct platform_device *pdev) return 0; } -static int acp62_pdm_audio_remove(struct platform_device *pdev) +static int acp63_pdm_audio_remove(struct platform_device *pdev) { pm_runtime_disable(&pdev->dev); return 0; } -static int __maybe_unused acp62_pdm_resume(struct device *dev) +static int __maybe_unused acp63_pdm_resume(struct device *dev) { struct pdm_dev_data *adata; struct snd_pcm_runtime *runtime; @@ -404,47 +404,47 @@ static int __maybe_unused acp62_pdm_resume(struct device *dev) rtd = runtime->private_data; period_bytes = frames_to_bytes(runtime, runtime->period_size); buffer_len = frames_to_bytes(runtime, runtime->buffer_size); - acp62_config_dma(rtd, SNDRV_PCM_STREAM_CAPTURE); - acp62_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, buffer_len, - period_bytes, adata->acp62_base); + acp63_config_dma(rtd, SNDRV_PCM_STREAM_CAPTURE); + acp63_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, buffer_len, + period_bytes, adata->acp63_base); } - acp62_enable_pdm_interrupts(adata->acp62_base); + acp63_enable_pdm_interrupts(adata->acp63_base); return 0; } -static int __maybe_unused acp62_pdm_suspend(struct device *dev) +static int __maybe_unused acp63_pdm_suspend(struct device *dev) { struct pdm_dev_data *adata; adata = dev_get_drvdata(dev); - acp62_disable_pdm_interrupts(adata->acp62_base); + acp63_disable_pdm_interrupts(adata->acp63_base); return 0; } -static int __maybe_unused acp62_pdm_runtime_resume(struct device *dev) +static int __maybe_unused acp63_pdm_runtime_resume(struct device *dev) { struct pdm_dev_data *adata; adata = dev_get_drvdata(dev); - acp62_enable_pdm_interrupts(adata->acp62_base); + acp63_enable_pdm_interrupts(adata->acp63_base); return 0; } -static const struct dev_pm_ops acp62_pdm_pm_ops = { - SET_RUNTIME_PM_OPS(acp62_pdm_suspend, acp62_pdm_runtime_resume, NULL) - SET_SYSTEM_SLEEP_PM_OPS(acp62_pdm_suspend, acp62_pdm_resume) +static const struct dev_pm_ops acp63_pdm_pm_ops = { + SET_RUNTIME_PM_OPS(acp63_pdm_suspend, acp63_pdm_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(acp63_pdm_suspend, acp63_pdm_resume) }; -static struct platform_driver acp62_pdm_dma_driver = { - .probe = acp62_pdm_audio_probe, - .remove = acp62_pdm_audio_remove, +static struct platform_driver acp63_pdm_dma_driver = { + .probe = acp63_pdm_audio_probe, + .remove = acp63_pdm_audio_remove, .driver = { .name = "acp_ps_pdm_dma", - .pm = &acp62_pdm_pm_ops, + .pm = &acp63_pdm_pm_ops, }, }; -module_platform_driver(acp62_pdm_dma_driver); +module_platform_driver(acp63_pdm_dma_driver); MODULE_AUTHOR("Syed.SabaKareem@amd.com"); MODULE_DESCRIPTION("AMD PINK SARDINE PDM Driver"); -- cgit v1.2.3-70-g09d2 From 5c065eaf445d14e70cbdb1da75e12567c7ae9b91 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Tue, 1 Nov 2022 04:21:54 +0000 Subject: ASoC: simple-card-utils: remove asoc_simple_convert_fixup() No one is using asoc_simple_convert_fixup(), we don't need to export its symbol. This patch removes it. Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/874jvj8ftp.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown --- include/sound/simple_card_utils.h | 2 -- sound/soc/generic/simple-card-utils.c | 35 +++++++++++++---------------------- 2 files changed, 13 insertions(+), 24 deletions(-) (limited to 'include/sound') diff --git a/include/sound/simple_card_utils.h b/include/sound/simple_card_utils.h index 25e049f44178..38590f1ae9ee 100644 --- a/include/sound/simple_card_utils.h +++ b/include/sound/simple_card_utils.h @@ -173,8 +173,6 @@ void asoc_simple_canonicalize_cpu(struct snd_soc_dai_link_component *cpus, void asoc_simple_clean_reference(struct snd_soc_card *card); -void asoc_simple_convert_fixup(struct asoc_simple_data *data, - struct snd_pcm_hw_params *params); void asoc_simple_parse_convert(struct device_node *np, char *prefix, struct asoc_simple_data *data); bool asoc_simple_is_convert_required(const struct asoc_simple_data *data); diff --git a/sound/soc/generic/simple-card-utils.c b/sound/soc/generic/simple-card-utils.c index be69bbc47f81..e35becce9635 100644 --- a/sound/soc/generic/simple-card-utils.c +++ b/sound/soc/generic/simple-card-utils.c @@ -41,27 +41,6 @@ static void asoc_simple_fixup_sample_fmt(struct asoc_simple_data *data, } } -void asoc_simple_convert_fixup(struct asoc_simple_data *data, - struct snd_pcm_hw_params *params) -{ - struct snd_interval *rate = hw_param_interval(params, - SNDRV_PCM_HW_PARAM_RATE); - struct snd_interval *channels = hw_param_interval(params, - SNDRV_PCM_HW_PARAM_CHANNELS); - - if (data->convert_rate) - rate->min = - rate->max = data->convert_rate; - - if (data->convert_channels) - channels->min = - channels->max = data->convert_channels; - - if (data->convert_sample_format) - asoc_simple_fixup_sample_fmt(data, params); -} -EXPORT_SYMBOL_GPL(asoc_simple_convert_fixup); - void asoc_simple_parse_convert(struct device_node *np, char *prefix, struct asoc_simple_data *data) @@ -522,8 +501,20 @@ int asoc_simple_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, { struct asoc_simple_priv *priv = snd_soc_card_get_drvdata(rtd->card); struct simple_dai_props *dai_props = simple_priv_to_props(priv, rtd->num); + struct asoc_simple_data *data = &dai_props->adata; + struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); + struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); + + if (data->convert_rate) + rate->min = + rate->max = data->convert_rate; - asoc_simple_convert_fixup(&dai_props->adata, params); + if (data->convert_channels) + channels->min = + channels->max = data->convert_channels; + + if (data->convert_sample_format) + asoc_simple_fixup_sample_fmt(data, params); return 0; } -- cgit v1.2.3-70-g09d2 From f5f8ad3fcdc49e4d794973007525ed864f93f3fb Mon Sep 17 00:00:00 2001 From: Pierre-Louis Bossart Date: Thu, 17 Nov 2022 17:21:20 -0600 Subject: ASoC: SOF: dai: move AMD_HS to end of list to restore backwards-compatibility The addition of AMD_HS breaks Mediatek platforms by using an index previously allocated to Mediatek. This is a backwards-compatibility issue and needs to be fixed. All firmware released by AMD needs to be re-generated and re-distributed. Fixes: ed2562c64b4f ("ASoC: SOF: Adding amd HS functionality to the sof core") Link: https://github.com/thesofproject/sof/issues/6615 Link: https://lore.kernel.org/alsa-devel/36a45c7a-820a-7675-d740-c0e83ae2c417@collabora.com/ Reported-by: AngeloGioacchino Del Regno Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Daniel Baluta Reviewed-by: Basavaraj Hiregoudar Reviewed-by: V sujith kumar Reddy Signed-off-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20221117232120.112639-1-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown --- include/sound/sof/dai.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/sound') diff --git a/include/sound/sof/dai.h b/include/sound/sof/dai.h index 83fd81c82e4c..9fbd3832bcdc 100644 --- a/include/sound/sof/dai.h +++ b/include/sound/sof/dai.h @@ -84,8 +84,8 @@ enum sof_ipc_dai_type { SOF_DAI_AMD_BT, /**< AMD ACP BT*/ SOF_DAI_AMD_SP, /**< AMD ACP SP */ SOF_DAI_AMD_DMIC, /**< AMD ACP DMIC */ - SOF_DAI_AMD_HS, /**< Amd HS */ SOF_DAI_MEDIATEK_AFE, /**< Mediatek AFE */ + SOF_DAI_AMD_HS, /**< Amd HS */ }; /* general purpose DAI configuration */ -- cgit v1.2.3-70-g09d2 From e45875168d19051ebf0fc4b091da6256f3ea3669 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 23 Nov 2022 16:54:24 +0000 Subject: sound: sdw: Add hw_params to SoundWire config helper function The vast majority of the current users of the SoundWire framework have almost identical code for converting from hw_params to SoundWire configuration. Whilst complex devices might require more, it is very likely that most new devices will follow the same pattern. Save a little code by factoring this out into a helper function. Signed-off-by: Charles Keepax Link: https://lore.kernel.org/r/20221123165432.594972-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown --- include/sound/sdw.h | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 include/sound/sdw.h (limited to 'include/sound') diff --git a/include/sound/sdw.h b/include/sound/sdw.h new file mode 100644 index 000000000000..6dcdb3228dba --- /dev/null +++ b/include/sound/sdw.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * linux/sound/sdw.h -- SoundWire helpers for ALSA/ASoC + * + * Copyright (c) 2022 Cirrus Logic Inc. + * + * Author: Charles Keepax + */ + +#include +#include +#include +#include + +#ifndef __INCLUDE_SOUND_SDW_H +#define __INCLUDE_SOUND_SDW_H + +/** + * snd_sdw_params_to_config() - Conversion from hw_params to SoundWire config + * + * @substream: Pointer to the PCM substream structure + * @params: Pointer to the hardware params structure + * @stream_config: Stream configuration for the SoundWire audio stream + * @port_config: Port configuration for the SoundWire audio stream + * + * This function provides a basic conversion from the hw_params structure to + * SoundWire configuration structures. The user will at a minimum need to also + * set the port number in the port config, but may also override more of the + * setup, or in the case of a complex user, not use this helper at all and + * open-code everything. + */ +static inline void snd_sdw_params_to_config(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct sdw_stream_config *stream_config, + struct sdw_port_config *port_config) +{ + stream_config->frame_rate = params_rate(params); + stream_config->ch_count = params_channels(params); + stream_config->bps = snd_pcm_format_width(params_format(params)); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + stream_config->direction = SDW_DATA_DIR_RX; + else + stream_config->direction = SDW_DATA_DIR_TX; + + port_config->ch_mask = GENMASK(stream_config->ch_count - 1, 0); +} + +#endif -- cgit v1.2.3-70-g09d2 From 75af41991955205fa0958feb587ce22b35aaa7b0 Mon Sep 17 00:00:00 2001 From: V sujith kumar Reddy Date: Tue, 29 Nov 2022 15:30:59 +0530 Subject: ASoC: SOF: Add DAI configuration support for AMD platforms. Add support for configuring sp and hs DAI from topology. Signed-off-by: V sujith kumar Reddy Link: https://lore.kernel.org/r/20221129100102.826781-1-vsujithkumar.reddy@amd.corp-partner.google.com Signed-off-by: Mark Brown --- include/sound/sof/dai-amd.h | 1 + include/sound/sof/dai.h | 2 ++ include/uapi/sound/sof/tokens.h | 5 +++++ sound/soc/sof/ipc3-pcm.c | 2 ++ sound/soc/sof/ipc3-topology.c | 36 ++++++++++++++++++++++++++++-------- sound/soc/sof/sof-audio.h | 1 + sound/soc/sof/topology.c | 10 ++++++++++ 7 files changed, 49 insertions(+), 8 deletions(-) (limited to 'include/sound') diff --git a/include/sound/sof/dai-amd.h b/include/sound/sof/dai-amd.h index 92f45c180b7c..9df7ac824efe 100644 --- a/include/sound/sof/dai-amd.h +++ b/include/sound/sof/dai-amd.h @@ -17,6 +17,7 @@ struct sof_ipc_dai_acp_params { uint32_t fsync_rate; /* FSYNC frequency in Hz */ uint32_t tdm_slots; + uint32_t tdm_mode; } __packed; /* ACPDMIC Configuration Request - SOF_IPC_DAI_AMD_CONFIG */ diff --git a/include/sound/sof/dai.h b/include/sound/sof/dai.h index 9fbd3832bcdc..3041f5805b7b 100644 --- a/include/sound/sof/dai.h +++ b/include/sound/sof/dai.h @@ -86,6 +86,8 @@ enum sof_ipc_dai_type { SOF_DAI_AMD_DMIC, /**< AMD ACP DMIC */ SOF_DAI_MEDIATEK_AFE, /**< Mediatek AFE */ SOF_DAI_AMD_HS, /**< Amd HS */ + SOF_DAI_AMD_SP_VIRTUAL, /**< AMD ACP SP VIRTUAL */ + SOF_DAI_AMD_HS_VIRTUAL, /**< AMD ACP HS VIRTUAL */ }; /* general purpose DAI configuration */ diff --git a/include/uapi/sound/sof/tokens.h b/include/uapi/sound/sof/tokens.h index f187dfbd9325..bacaf8a6317e 100644 --- a/include/uapi/sound/sof/tokens.h +++ b/include/uapi/sound/sof/tokens.h @@ -198,4 +198,9 @@ /* COPIER */ #define SOF_TKN_INTEL_COPIER_NODE_TYPE 1980 +/* ACP I2S */ +#define SOF_TKN_AMD_ACPI2S_RATE 1700 +#define SOF_TKN_AMD_ACPI2S_CH 1701 +#define SOF_TKN_AMD_ACPI2S_TDM_MODE 1702 + #endif diff --git a/sound/soc/sof/ipc3-pcm.c b/sound/soc/sof/ipc3-pcm.c index dad57bef38f6..f10bfc9bd5cb 100644 --- a/sound/soc/sof/ipc3-pcm.c +++ b/sound/soc/sof/ipc3-pcm.c @@ -336,6 +336,7 @@ static int sof_ipc3_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, channels->min, channels->max); break; case SOF_DAI_AMD_SP: + case SOF_DAI_AMD_SP_VIRTUAL: rate->min = private->dai_config->acpsp.fsync_rate; rate->max = private->dai_config->acpsp.fsync_rate; channels->min = private->dai_config->acpsp.tdm_slots; @@ -347,6 +348,7 @@ static int sof_ipc3_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, channels->min, channels->max); break; case SOF_DAI_AMD_HS: + case SOF_DAI_AMD_HS_VIRTUAL: rate->min = private->dai_config->acphs.fsync_rate; rate->max = private->dai_config->acphs.fsync_rate; channels->min = private->dai_config->acphs.tdm_slots; diff --git a/sound/soc/sof/ipc3-topology.c b/sound/soc/sof/ipc3-topology.c index 0720e1eae084..b94cc40485ed 100644 --- a/sound/soc/sof/ipc3-topology.c +++ b/sound/soc/sof/ipc3-topology.c @@ -276,6 +276,16 @@ static const struct sof_topology_token acpdmic_tokens[] = { offsetof(struct sof_ipc_dai_acpdmic_params, pdm_ch)}, }; +/* ACPI2S */ +static const struct sof_topology_token acpi2s_tokens[] = { + {SOF_TKN_AMD_ACPI2S_RATE, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, + offsetof(struct sof_ipc_dai_acp_params, fsync_rate)}, + {SOF_TKN_AMD_ACPI2S_CH, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, + offsetof(struct sof_ipc_dai_acp_params, tdm_slots)}, + {SOF_TKN_AMD_ACPI2S_TDM_MODE, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, + offsetof(struct sof_ipc_dai_acp_params, tdm_mode)}, +}; + /* Core tokens */ static const struct sof_topology_token core_tokens[] = { {SOF_TKN_COMP_CORE_ID, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, @@ -311,6 +321,7 @@ static const struct sof_token_info ipc3_token_list[SOF_TOKEN_COUNT] = { [SOF_SAI_TOKENS] = {"SAI tokens", sai_tokens, ARRAY_SIZE(sai_tokens)}, [SOF_AFE_TOKENS] = {"AFE tokens", afe_tokens, ARRAY_SIZE(afe_tokens)}, [SOF_ACPDMIC_TOKENS] = {"ACPDMIC tokens", acpdmic_tokens, ARRAY_SIZE(acpdmic_tokens)}, + [SOF_ACPI2S_TOKENS] = {"ACPI2S tokens", acpi2s_tokens, ARRAY_SIZE(acpi2s_tokens)}, }; /** @@ -1193,6 +1204,7 @@ static int sof_link_acp_sp_load(struct snd_soc_component *scomp, struct snd_sof_ struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs; struct sof_dai_private_data *private = dai->private; u32 size = sizeof(*config); + int ret; /* handle master/slave and inverted clocks */ sof_dai_set_format(hw_config, config); @@ -1201,12 +1213,15 @@ static int sof_link_acp_sp_load(struct snd_soc_component *scomp, struct snd_sof_ memset(&config->acpsp, 0, sizeof(config->acpsp)); config->hdr.size = size; - config->acpsp.fsync_rate = le32_to_cpu(hw_config->fsync_rate); - config->acpsp.tdm_slots = le32_to_cpu(hw_config->tdm_slots); + ret = sof_update_ipc_object(scomp, &config->acpsp, SOF_ACPI2S_TOKENS, slink->tuples, + slink->num_tuples, size, slink->num_hw_configs); + if (ret < 0) + return ret; - dev_info(scomp->dev, "ACP_SP config ACP%d channel %d rate %d\n", + + dev_info(scomp->dev, "ACP_SP config ACP%d channel %d rate %d tdm_mode %d\n", config->dai_index, config->acpsp.tdm_slots, - config->acpsp.fsync_rate); + config->acpsp.fsync_rate, config->acpsp.tdm_mode); dai->number_configs = 1; dai->current_config = 0; @@ -1223,6 +1238,7 @@ static int sof_link_acp_hs_load(struct snd_soc_component *scomp, struct snd_sof_ struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs; struct sof_dai_private_data *private = dai->private; u32 size = sizeof(*config); + int ret; /* Configures the DAI hardware format and inverted clocks */ sof_dai_set_format(hw_config, config); @@ -1231,12 +1247,14 @@ static int sof_link_acp_hs_load(struct snd_soc_component *scomp, struct snd_sof_ memset(&config->acphs, 0, sizeof(config->acphs)); config->hdr.size = size; - config->acphs.fsync_rate = le32_to_cpu(hw_config->fsync_rate); - config->acphs.tdm_slots = le32_to_cpu(hw_config->tdm_slots); + ret = sof_update_ipc_object(scomp, &config->acphs, SOF_ACPI2S_TOKENS, slink->tuples, + slink->num_tuples, size, slink->num_hw_configs); + if (ret < 0) + return ret; - dev_info(scomp->dev, "ACP_HS config ACP%d channel %d rate %d\n", + dev_info(scomp->dev, "ACP_HS config ACP%d channel %d rate %d tdm_mode %d\n", config->dai_index, config->acphs.tdm_slots, - config->acphs.fsync_rate); + config->acphs.fsync_rate, config->acphs.tdm_mode); dai->number_configs = 1; dai->current_config = 0; @@ -1545,9 +1563,11 @@ static int sof_ipc3_widget_setup_comp_dai(struct snd_sof_widget *swidget) ret = sof_link_acp_bt_load(scomp, slink, config, dai); break; case SOF_DAI_AMD_SP: + case SOF_DAI_AMD_SP_VIRTUAL: ret = sof_link_acp_sp_load(scomp, slink, config, dai); break; case SOF_DAI_AMD_HS: + case SOF_DAI_AMD_HS_VIRTUAL: ret = sof_link_acp_hs_load(scomp, slink, config, dai); break; case SOF_DAI_AMD_DMIC: diff --git a/sound/soc/sof/sof-audio.h b/sound/soc/sof/sof-audio.h index 1b5b3ea53a6e..29cf951e3526 100644 --- a/sound/soc/sof/sof-audio.h +++ b/sound/soc/sof/sof-audio.h @@ -248,6 +248,7 @@ enum sof_tokens { SOF_COPIER_FORMAT_TOKENS, SOF_GAIN_TOKENS, SOF_ACPDMIC_TOKENS, + SOF_ACPI2S_TOKENS, /* this should be the last */ SOF_TOKEN_COUNT, diff --git a/sound/soc/sof/topology.c b/sound/soc/sof/topology.c index 9d9fcaa2a948..c668bd9d21ec 100644 --- a/sound/soc/sof/topology.c +++ b/sound/soc/sof/topology.c @@ -289,6 +289,9 @@ static const struct sof_dai_types sof_dais[] = { {"ACPDMIC", SOF_DAI_AMD_DMIC}, {"ACPHS", SOF_DAI_AMD_HS}, {"AFE", SOF_DAI_MEDIATEK_AFE}, + {"ACPSP_VIRTUAL", SOF_DAI_AMD_SP_VIRTUAL}, + {"ACPHS_VIRTUAL", SOF_DAI_AMD_HS_VIRTUAL}, + }; static enum sof_ipc_dai_type find_dai(const char *name) @@ -1895,6 +1898,13 @@ static int sof_link_load(struct snd_soc_component *scomp, int index, struct snd_ token_id = SOF_ACPDMIC_TOKENS; num_tuples += token_list[SOF_ACPDMIC_TOKENS].count; break; + case SOF_DAI_AMD_SP: + case SOF_DAI_AMD_HS: + case SOF_DAI_AMD_SP_VIRTUAL: + case SOF_DAI_AMD_HS_VIRTUAL: + token_id = SOF_ACPI2S_TOKENS; + num_tuples += token_list[SOF_ACPI2S_TOKENS].count; + break; default: break; } -- cgit v1.2.3-70-g09d2 From f77a066f4ed307db93aafee621e2683c3bda98ce Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 30 Nov 2022 18:46:43 +0000 Subject: ASoC: hdmi-codec: Allow playback and capture to be disabled Currently the hdmi-codec driver always registers both playback and capture capabilities but for most systems there's no actual capture capability, usually HDMI is transmit only. Provide platform data which allows the users to indicate what is supported so that we don't end up advertising things to userspace that we can't actually support. In order to avoid breaking existing users the flags in platform data are a bit awkward and specify what should be disabled rather than doing the perhaps more expected thing and defaulting to not supporting capture. Reviewed-by: Russell King (Oracle) Link: https://lore.kernel.org/r/20221130184644.464820-2-broonie@kernel.org Signed-off-by: Mark Brown --- include/sound/hdmi-codec.h | 4 ++++ sound/soc/codecs/hdmi-codec.c | 30 +++++++++++++++++++++++++----- 2 files changed, 29 insertions(+), 5 deletions(-) (limited to 'include/sound') diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h index 48ad33aba393..9b162ac1e08e 100644 --- a/include/sound/hdmi-codec.h +++ b/include/sound/hdmi-codec.h @@ -124,7 +124,11 @@ struct hdmi_codec_ops { struct hdmi_codec_pdata { const struct hdmi_codec_ops *ops; uint i2s:1; + uint no_i2s_playback:1; + uint no_i2s_capture:1; uint spdif:1; + uint no_spdif_playback:1; + uint no_spdif_capture:1; int max_i2s_channels; void *data; }; diff --git a/sound/soc/codecs/hdmi-codec.c b/sound/soc/codecs/hdmi-codec.c index 0b1cdb2d6049..74cbbe16f9ae 100644 --- a/sound/soc/codecs/hdmi-codec.c +++ b/sound/soc/codecs/hdmi-codec.c @@ -816,12 +816,19 @@ static int hdmi_dai_probe(struct snd_soc_dai *dai) .source = "RX", }, }; - int ret; + int ret, i; dapm = snd_soc_component_get_dapm(dai->component); - ret = snd_soc_dapm_add_routes(dapm, route, 2); - if (ret) - return ret; + + /* One of the directions might be omitted for unidirectional DAIs */ + for (i = 0; i < ARRAY_SIZE(route); i++) { + if (!route[i].source || !route[i].sink) + continue; + + ret = snd_soc_dapm_add_routes(dapm, &route[i], 1); + if (ret) + return ret; + } daifmt = devm_kzalloc(dai->dev, sizeof(*daifmt), GFP_KERNEL); if (!daifmt) @@ -1009,11 +1016,24 @@ static int hdmi_codec_probe(struct platform_device *pdev) if (hcd->i2s) { daidrv[i] = hdmi_i2s_dai; daidrv[i].playback.channels_max = hcd->max_i2s_channels; + if (hcd->no_i2s_playback) + memset(&daidrv[i].playback, 0, + sizeof(daidrv[i].playback)); + if (hcd->no_i2s_capture) + memset(&daidrv[i].capture, 0, + sizeof(daidrv[i].capture)); i++; } - if (hcd->spdif) + if (hcd->spdif) { daidrv[i] = hdmi_spdif_dai; + if (hcd->no_spdif_playback) + memset(&daidrv[i].playback, 0, + sizeof(daidrv[i].playback)); + if (hcd->no_spdif_capture) + memset(&daidrv[i].capture, 0, + sizeof(daidrv[i].capture)); + } dev_set_drvdata(dev, hcp); -- cgit v1.2.3-70-g09d2