summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/omap2430.dtsi
blob: 832f184ae91200bf6f96e8f59f3271b3e24644ac (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
/*
 * Device Tree Source for OMAP243x SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "omap2.dtsi"

/ {
	compatible = "ti,omap2430", "ti,omap2";

	ocp {
		counter32k: counter@49020000 {
			compatible = "ti,omap-counter32k";
			reg = <0x49020000 0x20>;
			ti,hwmods = "counter_32k";
		};

		omap2430_pmx: pinmux@49002030 {
			compatible = "ti,omap2430-padconf", "pinctrl-single";
			reg = <0x49002030 0x0154>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-single,register-width = <8>;
			pinctrl-single,function-mask = <0x3f>;
		};

		gpmc: gpmc@6e000000 {
			compatible = "ti,omap2430-gpmc";
			reg = <0x6e000000 0x1000>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupts = <20>;
			gpmc,num-cs = <8>;
			gpmc,num-waitpins = <4>;
			ti,hwmods = "gpmc";
		};

		mcbsp1: mcbsp@48074000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48074000 0xff>;
			reg-names = "mpu";
			interrupts = <64>, /* OCP compliant interrupt */
				     <59>, /* TX interrupt */
				     <60>, /* RX interrupt */
				     <61>; /* RX overflow interrupt */
			interrupt-names = "common", "tx", "rx", "rx_overflow";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp1";
		};

		mcbsp2: mcbsp@48076000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48076000 0xff>;
			reg-names = "mpu";
			interrupts = <16>, /* OCP compliant interrupt */
				     <62>, /* TX interrupt */
				     <63>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp2";
		};

		mcbsp3: mcbsp@4808c000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x4808c000 0xff>;
			reg-names = "mpu";
			interrupts = <17>, /* OCP compliant interrupt */
				     <89>, /* TX interrupt */
				     <90>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp3";
		};

		mcbsp4: mcbsp@4808e000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x4808e000 0xff>;
			reg-names = "mpu";
			interrupts = <18>, /* OCP compliant interrupt */
				     <54>, /* TX interrupt */
				     <55>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp4";
		};

		mcbsp5: mcbsp@48096000 {
			compatible = "ti,omap2430-mcbsp";
			reg = <0x48096000 0xff>;
			reg-names = "mpu";
			interrupts = <19>, /* OCP compliant interrupt */
				     <81>, /* TX interrupt */
				     <82>; /* RX interrupt */
			interrupt-names = "common", "tx", "rx";
			ti,buffer-size = <128>;
			ti,hwmods = "mcbsp5";
		};

		timer1: timer@49018000 {
			compatible = "ti,omap2-timer";
			reg = <0x49018000 0x400>;
			interrupts = <37>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};
	};
};