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authornatrixaeria <upezu@student.kit.edu>2019-11-17 14:33:03 +0100
committernatrixaeria <upezu@student.kit.edu>2019-11-17 14:33:03 +0100
commitddb4f151c8e49b9e3108d2dfe7685d8fe83c42c5 (patch)
treec808dcc6ac62ffabedcd769497a5486d17181abf
parentbd2e2835d5507f6df908640a151aa1093206f075 (diff)
Disable PIC through IO port write
-rw-r--r--kernel/src/interrupts/apic.rs16
-rw-r--r--kernel/src/main.rs7
2 files changed, 16 insertions, 7 deletions
diff --git a/kernel/src/interrupts/apic.rs b/kernel/src/interrupts/apic.rs
index 14f6169..3d42ba9 100644
--- a/kernel/src/interrupts/apic.rs
+++ b/kernel/src/interrupts/apic.rs
@@ -97,11 +97,8 @@ pub struct Apic {
impl Apic {
pub fn new() -> Option<Self> {
- use core::fmt::Write;
- let mut stdout = crate::io::vga_text::OStream::new();
- stdout.clear();
-
if !is_apic() { return None; }
+ Self::disable_pic();
let mut base_apic = unsafe { Msr::new(APIC_BASE_MSR).read() };
let mut apic = Self::from_base_apic(base_apic);
@@ -113,12 +110,19 @@ impl Apic {
apic.set(ApicRegister::TaskPriority, 0);
apic.set(ApicRegister::LvtPerformanceMonitor, APIC_NMI);
- apic.set(ApicRegister::LvtLint0, 0);
- apic.set(ApicRegister::LvtLint1, 0);
+ apic.set(ApicRegister::LvtLint0, APIC_DISABLE);
+ apic.set(ApicRegister::LvtLint1, APIC_DISABLE);
Some(apic)
}
+ pub fn disable_pic() {
+ unsafe {
+ x86_64::instructions::port::PortWriteOnly::new(0xa1).write(0xffu8);
+ x86_64::instructions::port::PortWriteOnly::new(0x21).write(0xffu8);
+ }
+ }
+
fn from_base_apic(base_apic: u64) -> Self {
Self { regs:
((base_apic >> 12) & 0xfffffffff) as *mut [u32; 1024]
diff --git a/kernel/src/main.rs b/kernel/src/main.rs
index 7cfbbe3..2116838 100644
--- a/kernel/src/main.rs
+++ b/kernel/src/main.rs
@@ -19,12 +19,17 @@ pub use io::{qemu, serial, vga_text};
#[no_mangle]
extern "C" fn _start() -> ! {
kernel::init();
- x86_64::instructions::interrupts::enable();
let apic = interrupts::apic::Apic::new().expect("no APIC support");
let mut apic = unsafe { interrupts::apic::set_local_apic(apic) };
+
apic.set_timer_interrupt_handler(interrupts::apic::TimerDivideConfig::Div32, interrupts::InterruptType::Timer);
+ x86_64::instructions::interrupts::enable();
+
+ let mut stdout = OStream::new();
+ stdout.print(b"apic initialisation complete\n");
+
if cfg!(test) {
qemu::exit_qemu(qemu::QemuExitCode::Success);
}