diff options
-rw-r--r-- | kernel/src/boot.asm | 144 | ||||
-rw-r--r-- | kernel/src/long_mode_init.asm | 17 |
2 files changed, 159 insertions, 2 deletions
diff --git a/kernel/src/boot.asm b/kernel/src/boot.asm index a10b14c..e3484c1 100644 --- a/kernel/src/boot.asm +++ b/kernel/src/boot.asm @@ -1,14 +1,147 @@ global start +extern long_mode_start section .text bits 32 start: mov esp, stack_top - ; print 'OK' - mov dword [0xb8000], 0x2f4b2f4f + call check_multiboot + call check_cpuid + call check_long_mode + + call setup_page_tables + call enable_paging + ; load the 64-bit GDT + lgdt [gdt64.pointer] + jmp gdt64.code:long_mode_start + hlt +check_multiboot: + cmp eax, 0x36d76289 + jne .no_multiboot + ret +.no_multiboot + mov al, "0" + jmp error + +check_cpuid: + ; Check if CPUID is supported by attempting to flip the ID bit (bit 21) + ; in the FLAGS register. If we can flip it, CPUID is available. + + ; Copy EFLAGS in to EAX via stack + pushfd + pop eax + + ; Save the current flags + mov ecx, eax + + ; Flip the ID bit + xor eax, 1 << 21 + + ; push eax to eflags + push eax + popfd + + ; Copy EAX to FLAGS via the Stack + pushfd + pop eax + + ; Restore FLAGS from the old version stored in ECX (i.e. flipping the + ; ID bit back if it was ever flipped). + push ecx + popfd + + ; Check if the ID was changed + cmp eax, ecx + je .no_cpuid + ret +.no_cpuid: + mov al, "1" + jmp error + +check_long_mode: + ; test if extended processor info in available + mov eax, 0x80000000 ; implicit argument for cpuid + cpuid ; get highest supported argument + cmp eax, 0x80000001 ; it needs to be at least 0x80000001 + jb .no_long_mode ; if it's less, the CPU is too old for long mode + + ; extended info about long mode + mov eax, 0x80000001 ; argument for the cpuid function + cpuid ; Cpu id + test edx, 1 << 29 ; check long mode availablity + jz .no_long_mode + ret + +.no_long_mode + mov al, "2" + jmp error + +setup_page_tables: + ; map first P4 entry to P3 table + mov eax, p3_table + or eax, 0b11 ; present + writable + mov [p4_table], eax + + ; map first P3 entry to P2 table + mov eax, p2_table + or eax, 0b11 ; present + writable + mov [p3_table], eax + + ; map each P2 entry to a huge 2MiB page + mov ecx, 0 ; counter variable + mov eax, 0b10000011 ; present + writable + huge + +.map_p2_table: + ; map ecx-th P2 entry to a huge page that starts at address 2MiB*ecx + mov [p2_table + ecx ], eax ; map ecx-th entry + add eax, 0x200000 ; 2MiB + mov [p2_table + ecx + 8 ], eax ; map ecx-th entry + add eax, 0x200000 ; 2MiB + mov [p2_table + ecx + 16], eax ; map ecx-th entry + add eax, 0x200000 ; 2MiB + mov [p2_table + ecx + 24], eax ; map ecx-th entry + add eax, 0x200000 ; 2MiB + + add ecx, 32 + cmp ecx, 4096 ; if counter == 512, the whole P2 table is mapped + jne .map_p2_table ; else map the next entry + + ret + +enable_paging: + mov eax, p4_table + mov cr3, eax + + ; enable PAE-flag in cr4 (Physical Address Extension) + mov eax, cr4 + or eax, 1 << 5 + mov cr4, eax + + ; set the long mode bit in the EFER MSR (model specific register) + mov ecx, 0xC0000080 + rdmsr + or eax, 1 << 8 + wrmsr + + ; enable paging in the cr0 register + mov eax, cr0 + or eax, 1 << 31 + mov cr0, eax + + ret + +section .rodata +gdt64: + dq 0 ; zero entry +.code: equ $ - gdt64 + dq (1<<43) | (1<<44) | (1<<47) | (1<<53) ; code segment +.pointer: + dw $ - gdt64 - 1 + dq gdt64 + ; Prints 'ERR: ' and the given error code to the screen and halts ; parameter: error code letter (ascii) in al error: @@ -19,6 +152,13 @@ error: hlt section .bss +align 4096 +p4_table: + resb 4096 +p3_table: + resb 4096 +p2_table: + resb 4096 stack_bottom: resb 64 stack_top: diff --git a/kernel/src/long_mode_init.asm b/kernel/src/long_mode_init.asm new file mode 100644 index 0000000..f105388 --- /dev/null +++ b/kernel/src/long_mode_init.asm @@ -0,0 +1,17 @@ +global long_mode_start + +section .text +bits 64 +long_mode_start: + ; load 0 into all data segment registers + mov ax, 0 + mov ss, ax + mov ds, ax + mov es, ax + mov fs, ax + mov gs, ax + + ; print `Uff!` to screen + mov rax, 0x8521846683668255 + mov qword [0xb8000], rax + hlt |