diff options
| author | Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> | 2024-12-19 19:53:29 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-12-25 21:59:50 -0600 |
| commit | 35d8bc131de0f0f280f0db42499512d79f05f456 (patch) | |
| tree | 7474633e74bf0e1eb8cf3100ee4f674429e4ab32 | |
| parent | 6994c655e1252049007973fd641e6a26f94c420b (diff) | |
soc: qcom: llcc: Enable LLCC_WRCACHE at boot on X1
The Last Level Cache is split into many slices, each one of which can
be toggled on or off.
Only certain slices are recommended to be turned on unconditionally,
in order to reach optimal performance/latency/power levels.
Enable WRCACHE on X1 at boot, in accordance with internal
recommendations.
No significant performance difference is expected.
Fixes: b3cf69a43502 ("soc: qcom: llcc: Add configuration data for X1E80100")
Cc: stable@vger.kernel.org
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20241219-topic-llcc_x1e_wrcache-v3-1-b9848d9c3d63@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | drivers/soc/qcom/llcc-qcom.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 32c3bc887cef..1560db00a012 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -3004,6 +3004,7 @@ static const struct llcc_slice_config x1e80100_data[] = { .fixed_size = true, .bonus_ways = 0xfff, .cache_mode = 0, + .activate_on_init = true, }, { .usecase_id = LLCC_CAMEXP0, .slice_id = 4, |