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authorKan Liang <kan.liang@linux.intel.com>2024-11-21 10:05:26 -0800
committerPeter Zijlstra <peterz@infradead.org>2024-12-02 12:01:33 +0100
commit4e54ed496343702837ddca5f5af720161c6a5407 (patch)
tree84d3f092aba25040cdb1515872d2542961a5be72
parent40384c840ea1944d7c5a392e8975ed088ecf0b37 (diff)
perf/x86/intel: Add Arrow Lake U support
From PMU's perspective, the new Arrow Lake U is the same as the Meteor Lake. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20241121180526.2364759-1-kan.liang@linux.intel.com
-rw-r--r--arch/x86/events/intel/core.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index bb284aff7bfd..2e1e26846050 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -7135,6 +7135,7 @@ __init int intel_pmu_init(void)
case INTEL_METEORLAKE:
case INTEL_METEORLAKE_L:
+ case INTEL_ARROWLAKE_U:
intel_pmu_init_hybrid(hybrid_big_small);
x86_pmu.pebs_latency_data = cmt_latency_data;