diff options
| author | Sung Joon Kim <Sungjoon.Kim@amd.com> | 2022-12-08 13:55:45 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-12-15 12:18:20 -0500 |
| commit | 50371be6c7b7c1b40afc1e7f215d60f7f41913c4 (patch) | |
| tree | 85c21a2bc7c936c258a5b5157fb591eeff4d6c25 | |
| parent | 09ccde9191951aa979950c54fdd26e5676afa75d (diff) | |
drm/display: Add missing Adaptive Sync DPCD definitions
The missing DPCD definitions from DP2.0 spec is as follows:
DOWNSPREAD_CTRL (107h):
FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE (bit 6)
For sink devices that support Adaptive-Sync operation
and Panel Replay
DPRX_FEATURE_ENUMERATION_LIST_CONT_1 (2214h):
ADAPTIVE_SYNC_SDP_SUPPORTED (bit 0)
Bit to check sink device has Adaptive-Sync capability
AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED (bit 1)
A sink device that clears this bit will generate VSync pulse
leading edge of the HDMI output on the line count at which
Adaptive-Sync SDP is received as long as source device transmits
Adaptive-Sync SDP either in first line or first 3840 pixel cycles
of the line whichever occurs first.
VSC_EXT_SDP_FRAMEWORK_VERSION_1_SUPPORTED (bit 4)
Bit to check sink device has SDP framework version 1 capability
Signed-off-by: Sung Joon Kim <Sungjoon.Kim@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | include/drm/display/drm_dp.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index e934aab357be..ed10e6b6f99d 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -603,6 +603,7 @@ #define DP_DOWNSPREAD_CTRL 0x107 # define DP_SPREAD_AMP_0_5 (1 << 4) +# define DP_FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE (1 << 6) # define DP_MSA_TIMING_PAR_IGNORE_EN (1 << 7) /* eDP */ #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108 @@ -1105,6 +1106,11 @@ # define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */ # define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */ +#define DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1 0x2214 /* 2.0 E11 */ +# define DP_ADAPTIVE_SYNC_SDP_SUPPORTED (1 << 0) +# define DP_AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED (1 << 1) +# define DP_VSC_EXT_SDP_FRAMEWORK_VERSION_1_SUPPORTED (1 << 4) + #define DP_128B132B_SUPPORTED_LINK_RATES 0x2215 /* 2.0 */ # define DP_UHBR10 (1 << 0) # define DP_UHBR20 (1 << 1) |