diff options
| author | Robert Richter <rrichter@amd.com> | 2023-06-22 15:55:08 -0500 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-06-25 11:57:02 -0700 |
| commit | 86917c560dcf29270093768d947387ca00f729b4 (patch) | |
| tree | f5dd62fe10216928b3a1ab466f51e4f0aed488de | |
| parent | f1d0525effc4fffe821905671ea24c30a4bfa393 (diff) | |
cxl/mem: Prepare for early RCH dport component register setup
In order to move the RCH dport component register setup to cxl_pci the
base address must be stored in CXL device state (cxlds) for both
modes, RCH and VH. Store it in cxlds->component_reg_phys and use it
for endpoint creation.
Signed-off-by: Robert Richter <rrichter@amd.com>
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230622205523.85375-13-terry.bowman@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| -rw-r--r-- | drivers/cxl/mem.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 4cc461c22b8b..7638a7f8f333 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -51,7 +51,6 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, struct cxl_port *parent_port = parent_dport->port; struct cxl_dev_state *cxlds = cxlmd->cxlds; struct cxl_port *endpoint, *iter, *down; - resource_size_t component_reg_phys; int rc; /* @@ -72,11 +71,11 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, * typical register locator mechanism. */ if (parent_dport->rch && cxlds->component_reg_phys == CXL_RESOURCE_NONE) - component_reg_phys = + cxlds->component_reg_phys = cxl_rcd_component_reg_phys(&cxlmd->dev, parent_dport); - else - component_reg_phys = cxlds->component_reg_phys; - endpoint = devm_cxl_add_port(host, &cxlmd->dev, component_reg_phys, + + endpoint = devm_cxl_add_port(host, &cxlmd->dev, + cxlds->component_reg_phys, parent_dport); if (IS_ERR(endpoint)) return PTR_ERR(endpoint); |