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authorFrank Sae <Frank.Sae@motor-comm.com>2024-09-01 01:35:25 -0700
committerPaolo Abeni <pabeni@redhat.com>2024-09-05 15:21:12 +0200
commit8d878c87b5c45ae64b0aecd4aac71e210d19173f (patch)
tree558b2b1f109433f55cb1bc9fc01077ea6b5afc38
parentd0c4dd9f7ca62be949343e3f6e59ce18f7873657 (diff)
net: phy: Optimize phy speed mask to be compatible to yt8821
yt8521 and yt8531s as Gigabit transceiver use bit15:14(bit9 reserved default 0) as phy speed mask, yt8821 as 2.5G transceiver uses bit9 bit15:14 as phy speed mask. Be compatible to yt8821, reform phy speed mask and phy speed macro. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
-rw-r--r--drivers/net/phy/motorcomm.c13
1 files changed, 5 insertions, 8 deletions
diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
index 7a11fdb687cc..fe0aabe12622 100644
--- a/drivers/net/phy/motorcomm.c
+++ b/drivers/net/phy/motorcomm.c
@@ -46,12 +46,10 @@
/* Specific Status Register */
#define YTPHY_SPECIFIC_STATUS_REG 0x11
-#define YTPHY_SSR_SPEED_MODE_OFFSET 14
-
-#define YTPHY_SSR_SPEED_MODE_MASK (BIT(15) | BIT(14))
-#define YTPHY_SSR_SPEED_10M 0x0
-#define YTPHY_SSR_SPEED_100M 0x1
-#define YTPHY_SSR_SPEED_1000M 0x2
+#define YTPHY_SSR_SPEED_MASK ((0x3 << 14) | BIT(9))
+#define YTPHY_SSR_SPEED_10M ((0x0 << 14))
+#define YTPHY_SSR_SPEED_100M ((0x1 << 14))
+#define YTPHY_SSR_SPEED_1000M ((0x2 << 14))
#define YTPHY_SSR_DUPLEX_OFFSET 13
#define YTPHY_SSR_DUPLEX BIT(13)
#define YTPHY_SSR_PAGE_RECEIVED BIT(12)
@@ -1187,8 +1185,7 @@ static int yt8521_adjust_status(struct phy_device *phydev, int status,
else
duplex = DUPLEX_FULL; /* for fiber, it always DUPLEX_FULL */
- speed_mode = (status & YTPHY_SSR_SPEED_MODE_MASK) >>
- YTPHY_SSR_SPEED_MODE_OFFSET;
+ speed_mode = status & YTPHY_SSR_SPEED_MASK;
switch (speed_mode) {
case YTPHY_SSR_SPEED_10M: