diff options
| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2019-11-19 16:22:14 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2019-11-20 09:13:40 -0800 |
| commit | 93c53f2397fb584963a53fe32288384adcdd5f6c (patch) | |
| tree | 79db591cf0947abf7c721b27565413d12f6cc8e9 | |
| parent | f091d5a426447cc427680bdd3adc7773aa2867df (diff) | |
ARC: [plat-axs10x]: use pgu pll instead of fixed clock
Use PLL driver instead of fixed-clock for PGU pixel clock.
That allows us to support wider range of graphic modes.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| -rw-r--r-- | arch/arc/boot/dts/axc001.dtsi | 6 | ||||
| -rw-r--r-- | arch/arc/boot/dts/axs10x_mb.dtsi | 11 |
2 files changed, 12 insertions, 5 deletions
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi index 6ec1fcdfc0d7..79ec27c043c1 100644 --- a/arch/arc/boot/dts/axc001.dtsi +++ b/arch/arc/boot/dts/axc001.dtsi @@ -28,6 +28,12 @@ clock-frequency = <750000000>; }; + input_clk: input-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33333333>; + }; + core_intc: arc700-intc@cpu { compatible = "snps,arc700-intc"; interrupt-controller; diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi index 08bcfed6b80f..f9a5c9ddcae7 100644 --- a/arch/arc/boot/dts/axs10x_mb.dtsi +++ b/arch/arc/boot/dts/axs10x_mb.dtsi @@ -61,12 +61,13 @@ clock-frequency = <25000000>; #clock-cells = <0>; }; + }; - pguclk: pguclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <74250000>; - }; + pguclk: pguclk@10080 { + compatible = "snps,axs10x-pgu-pll-clock"; + reg = <0x10080 0x10>, <0x110 0x10>; + #clock-cells = <0>; + clocks = <&input_clk>; }; gmac: ethernet@18000 { |