diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2022-07-12 15:05:13 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-07-13 09:22:17 -0700 |
| commit | a5e4a53818ad585416a214b894fdf568443d5293 (patch) | |
| tree | f90229249138297fe64bdaa98faf23c7d60b6c08 | |
| parent | 9306b2b2dfce6931241ef804783692cee526599c (diff) | |
drm/i915: Correct ss -> steering calculation for pre-Xe_HP platforms
Accidental use of a "SLICE" macro where a "SUBSLICE" macro was intended
causes the group ID for steering to be calculated incorrectly on
pre-Xe_HP platforms.
Fixes: 9a92732f040a ("drm/i915/gt: Add general DSS steering iterator to intel_gt_mcr")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220712220513.3451794-1-matthew.d.roper@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c index f8c64ab9d3ca..e79405a45312 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c @@ -515,7 +515,7 @@ void intel_gt_mcr_get_ss_steering(struct intel_gt *gt, unsigned int dss, *group = dss / GEN_DSS_PER_GSLICE; *instance = dss % GEN_DSS_PER_GSLICE; } else { - *group = dss / GEN_MAX_HSW_SLICES; + *group = dss / GEN_MAX_SS_PER_HSW_SLICE; *instance = dss % GEN_MAX_SS_PER_HSW_SLICE; return; } |