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authorHeiko Stuebner <heiko.stuebner@bq.com>2018-11-11 22:00:47 +0100
committerLinus Walleij <linus.walleij@linaro.org>2018-11-17 13:18:53 +0100
commitada62b7c893369200992cc21de3469ed1da50e30 (patch)
tree71dd24e23a205c6f9e3d37553e614e474c20429d
parent51ff47aa4c933f17839cd31d7f349841df0a6f38 (diff)
pinctrl: rockchip: add rk3188 routes to switch between nand and emmc
The rk3188 has pins that are not handled through the regular iomuxing for handling either nand-flash or an emmc and are set through only one specifal setting. So utilize the routing function to simply do that setting depending on one of the core nand/emmc signals that are actually regular pins handled through pinctrl. Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/pinctrl-rockchip.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 246bf14c7f72..16bf21bf69a2 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -822,6 +822,26 @@ static struct rockchip_mux_route_data rk3128_mux_route_data[] = {
},
};
+static struct rockchip_mux_route_data rk3188_mux_route_data[] = {
+ {
+ /* non-iomuxed emmc/flash pins on flash-dqs */
+ .bank_num = 0,
+ .pin = 24,
+ .func = 1,
+ .route_location = ROCKCHIP_ROUTE_GRF,
+ .route_offset = 0xa0,
+ .route_val = BIT(16 + 11),
+ }, {
+ /* non-iomuxed emmc/flash pins on emmc-clk */
+ .bank_num = 0,
+ .pin = 24,
+ .func = 2,
+ .route_location = ROCKCHIP_ROUTE_GRF,
+ .route_offset = 0xa0,
+ .route_val = BIT(16 + 11) | BIT(11),
+ },
+};
+
static struct rockchip_mux_route_data rk3228_mux_route_data[] = {
{
/* pwm0-0 */
@@ -3626,6 +3646,8 @@ static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
.label = "RK3188-GPIO",
.type = RK3188,
.grf_mux_offset = 0x60,
+ .iomux_routes = rk3188_mux_route_data,
+ .niomux_routes = ARRAY_SIZE(rk3188_mux_route_data),
.pull_calc_reg = rk3188_calc_pull_reg_and_bit,
};