diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2024-05-06 13:09:04 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-05-08 12:08:46 +0300 |
| commit | c06387ab4472fc5af857d02323fc1073ff7923e0 (patch) | |
| tree | 6a57e65f578fa9c797a3a0b57525124581aad919 | |
| parent | 19e74ba7f894f5e95c1c56ebcdbe1fdfcf20b9c4 (diff) | |
drm/i915: pass dev_priv explicitly to PORT_DFT2_G4X
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PORT_DFT2_G4X register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0db8ee7b66b9660fc9fd80598257c6d36f0f506b.1714990089.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_pipe_crc.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c index 35c3dd1130ce..b3dcfee6ec0e 100644 --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c @@ -167,7 +167,7 @@ static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, * - DisplayPort scrambling: used for EMI reduction */ if (need_stable_symbols) { - u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X); + u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X(dev_priv)); tmp |= DC_BALANCE_RESET_VLV; switch (pipe) { @@ -183,7 +183,7 @@ static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, default: return -EINVAL; } - intel_de_write(dev_priv, PORT_DFT2_G4X, tmp); + intel_de_write(dev_priv, PORT_DFT2_G4X(dev_priv), tmp); } return 0; @@ -229,7 +229,7 @@ static int i9xx_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, static void vlv_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv, enum pipe pipe) { - u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X); + u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X(dev_priv)); switch (pipe) { case PIPE_A: @@ -246,7 +246,7 @@ static void vlv_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv, } if (!(tmp & PIPE_SCRAMBLE_RESET_MASK)) tmp &= ~DC_BALANCE_RESET_VLV; - intel_de_write(dev_priv, PORT_DFT2_G4X, tmp); + intel_de_write(dev_priv, PORT_DFT2_G4X(dev_priv), tmp); } static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source, diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4a88eb9cd1f8..5670eee4a498 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1479,7 +1479,7 @@ #define PORT_DFT_I9XX _MMIO(0x61150) #define DC_BALANCE_RESET (1 << 25) -#define PORT_DFT2_G4X _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61154) +#define PORT_DFT2_G4X(dev_priv) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61154) #define DC_BALANCE_RESET_VLV (1 << 31) #define PIPE_SCRAMBLE_RESET_MASK ((1 << 14) | (0x3 << 0)) #define PIPE_C_SCRAMBLE_RESET REG_BIT(14) /* chv */ |