diff options
| author | Sung Lee <sung.lee@amd.com> | 2020-02-21 14:50:55 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-03-05 00:30:45 -0500 |
| commit | ffa121419257d72ea520bf31e15d12effb50c039 (patch) | |
| tree | ed952e0a0738b333b513470595a3bf6dc08d9c57 | |
| parent | 8f174fdbe9a86c71fe61ff51c8304cbd5f0d2e14 (diff) | |
drm/amd/display: Set clock optimization required after update clocks
[WHY]
We see an issue that caused clk_optimized_required to be set true in
certain cases, causing passive flips to fail. This is because of a typo
where wm_optimized_required was set twice.
[HOW]
Set clk_optimized_required to false after updating clocks.
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 49f5af9e3016..045ba08c85b4 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1674,7 +1674,7 @@ void dcn20_optimize_bandwidth( dc->clk_mgr, context, true); - dc->wm_optimized_required = false; + dc->clk_optimized_required = false; } } |