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authorBjorn Helgaas <bhelgaas@google.com>2023-08-14 16:28:22 -0500
committerJonathan Corbet <corbet@lwn.net>2023-08-18 11:29:03 -0600
commitd56b699d76d1b352f7a3d3a0a3e91c79b8612d94 (patch)
tree2a368f3e2e17f7a516bf39e055f79d8c79a74885 /Documentation/arch/arm/ixp4xx.rst
parentebab9426cd73c45945b44344ca904b343f0ca070 (diff)
Documentation: Fix typos
Fix typos in Documentation. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20230814212822.193684-4-helgaas@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'Documentation/arch/arm/ixp4xx.rst')
-rw-r--r--Documentation/arch/arm/ixp4xx.rst4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/arch/arm/ixp4xx.rst b/Documentation/arch/arm/ixp4xx.rst
index a57235616294..17aafc610908 100644
--- a/Documentation/arch/arm/ixp4xx.rst
+++ b/Documentation/arch/arm/ixp4xx.rst
@@ -78,9 +78,9 @@ IXP4xx provides two methods of accessing PCI memory space:
1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB).
To access PCI via this space, we simply ioremap() the BAR
into the kernel and we can use the standard read[bwl]/write[bwl]
- macros. This is the preffered method due to speed but it
+ macros. This is the preferred method due to speed but it
limits the system to just 64MB of PCI memory. This can be
- problamatic if using video cards and other memory-heavy devices.
+ problematic if using video cards and other memory-heavy devices.
2) If > 64MB of memory space is required, the IXP4xx can be
configured to use indirect registers to access PCI This allows