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authorChristophe Kerello <christophe.kerello@foss.st.com>2023-03-28 19:07:11 +0200
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2023-04-03 10:19:22 +0200
commit645a603783633a9d6e2bbaaa98d4cac847d97b2c (patch)
tree92d5d7671ef250e8d9aaf47fbad81f12ed1d0563 /arch/arm/boot
parentfc8d2b21bc5d5d7a6eadaa8c2a5d2e6856689480 (diff)
ARM: dts: stm32: add FMC support on STM32MP13x SoC family
Add FMC support on STM32MP13x SoC family. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/stm32mp131.dtsi33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 9ea61687f023..7ea1fe0cd070 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -1232,6 +1232,39 @@
dma-requests = <48>;
};
+ fmc: memory-controller@58002000 {
+ compatible = "st,stm32mp1-fmc2-ebi";
+ reg = <0x58002000 0x1000>;
+ ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
+ <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
+ <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
+ <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
+ <4 0 0x80000000 0x10000000>; /* NAND */
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clocks = <&rcc FMC_K>;
+ resets = <&rcc FMC_R>;
+ status = "disabled";
+
+ nand-controller@4,0 {
+ compatible = "st,stm32mp1-fmc2-nfc";
+ reg = <4 0x00000000 0x1000>,
+ <4 0x08010000 0x1000>,
+ <4 0x08020000 0x1000>,
+ <4 0x01000000 0x1000>,
+ <4 0x09010000 0x1000>,
+ <4 0x09020000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>,
+ <&mdma 24 0x2 0x12000a08 0x0 0x0>,
+ <&mdma 25 0x2 0x12000a0a 0x0 0x0>;
+ dma-names = "tx", "rx", "ecc";
+ status = "disabled";
+ };
+ };
+
sdmmc1: mmc@58005000 {
compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x20253180>;