diff options
author | Amit Daniel Kachhap <amit.kachhap@arm.com> | 2022-11-17 07:10:35 +0100 |
---|---|---|
committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-11-28 11:57:35 +0000 |
commit | fea53546be574f2e357fa53f4a582788b20f283c (patch) | |
tree | f110f255ff0de307f0195c60be74e9fd96c387ba /arch/arm/include | |
parent | 3bda6d88489769fba5672dc66debdc1f5516c5fe (diff) |
ARM: 9274/1: Add hwcap for Speculative Store Bypassing Safe
Speculative Store Bypassing Safe(FEAT_SSBS) is a feature present in
AArch32 state for Armv8 and is represented by ID_PFR2_EL1.SSBS
identification register.
This feature denotes the presence of PSTATE.ssbs bit and hence adding a
hwcap will enable the userspace to check it before trying to set/unset
this PSTATE.
This commit adds the ID feature bit detection, and uses elf_hwcap2
accordingly.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/uapi/asm/hwcap.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index bc9e7d318e25..6b2023e39b6f 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h @@ -44,5 +44,6 @@ #define HWCAP2_SHA2 (1 << 3) #define HWCAP2_CRC32 (1 << 4) #define HWCAP2_SB (1 << 5) +#define HWCAP2_SSBS (1 << 6) #endif /* _UAPI__ASMARM_HWCAP_H */ |