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authorArnd Bergmann <arnd@arndb.de>2013-06-20 02:14:59 +0200
committerArnd Bergmann <arnd@arndb.de>2013-06-20 02:15:45 +0200
commite5051b8472c2fde91e44d906c9a2e516a10b60b2 (patch)
treeb7c27378ca981a7bcf86639db7b0cde834feb0b6 /arch/arm/mach-imx/system.c
parentc3b693d1d63444afe4fbf809d8a311b63741e503 (diff)
parent3bfbc6cd9b41f937a134ba65a4a1eefba062b9a8 (diff)
Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo: imx soc changes for 3.11: * New SoCs i.MX6 Sololite and Vybrid VF610 support * imx5 and imx6 clock fixes and additions * Update clock driver to use of_clk_init() function * Refactor restart routine mxc_restart() to get it work for DT boot as well * Clean up mxc specific ulpi access ops * imx defconfig updates * tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (29 commits) ARM: imx_v6_v7_defconfig: Enable Vybrid VF610 ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd ARM: imx_v6_v7_defconfig: Enable PWM and backlight options ARM: imx: Remove mxc specific ulpi access ops ARM: imx: add initial support for VF610 ARM: imx: add VF610 clock support ARM: imx_v6_v7_defconfig: enable parallel display ARM: imx: clk: No need to initialize phandle struct ARM: imx: irq-common: Include header to avoid sparse warning ARM: imx: Enable mx6 solo-lite support ARM: imx6: use common of_clk_init() call to initialize clocks ARM: imx6q: call of_clk_init() to register fixed rate clocks ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVE ARM: i.MX6: clk: add different DualLite MLB clock config ARM i.MX5: Add S/PDIF clocks ARM i.MX53: Add SATA clock ARM: imx6q: clk: add the eim_slow clock ARM: imx: remove MLB PLL from pllv3 ARM: imx: disable pll8_mlb in mx6q_clks ... Conflicts: arch/arm/Kconfig.debug (simple add/add conflict) Includes an update to 3.10-rc6 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/system.c')
-rw-r--r--arch/arm/mach-imx/system.c47
1 files changed, 37 insertions, 10 deletions
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c
index 695e0d73bf85..7cdc79a9657c 100644
--- a/arch/arm/mach-imx/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -21,6 +21,8 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <asm/system_misc.h>
#include <asm/proc-fns.h>
@@ -30,6 +32,7 @@
#include "hardware.h"
static void __iomem *wdog_base;
+static struct clk *wdog_clk;
/*
* Reset the system. It is called by machine_restart().
@@ -38,16 +41,13 @@ void mxc_restart(char mode, const char *cmd)
{
unsigned int wcr_enable;
- if (cpu_is_mx1()) {
- wcr_enable = (1 << 0);
- } else {
- struct clk *clk;
+ if (wdog_clk)
+ clk_enable(wdog_clk);
- clk = clk_get_sys("imx2-wdt.0", NULL);
- if (!IS_ERR(clk))
- clk_prepare_enable(clk);
+ if (cpu_is_mx1())
+ wcr_enable = (1 << 0);
+ else
wcr_enable = (1 << 2);
- }
/* Assert SRS signal */
__raw_writew(wcr_enable, wdog_base);
@@ -55,7 +55,7 @@ void mxc_restart(char mode, const char *cmd)
/* wait for reset to assert... */
mdelay(500);
- printk(KERN_ERR "Watchdog reset failed to assert reset\n");
+ pr_err("%s: Watchdog reset failed to assert reset\n", __func__);
/* delay to allow the serial port to show the message */
mdelay(50);
@@ -64,7 +64,34 @@ void mxc_restart(char mode, const char *cmd)
soft_restart(0);
}
-void mxc_arch_reset_init(void __iomem *base)
+void __init mxc_arch_reset_init(void __iomem *base)
{
wdog_base = base;
+
+ wdog_clk = clk_get_sys("imx2-wdt.0", NULL);
+ if (IS_ERR(wdog_clk)) {
+ pr_warn("%s: failed to get wdog clock\n", __func__);
+ wdog_clk = NULL;
+ return;
+ }
+
+ clk_prepare(wdog_clk);
+}
+
+void __init mxc_arch_reset_init_dt(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx21-wdt");
+ wdog_base = of_iomap(np, 0);
+ WARN_ON(!wdog_base);
+
+ wdog_clk = of_clk_get(np, 0);
+ if (IS_ERR(wdog_clk)) {
+ pr_warn("%s: failed to get wdog clock\n", __func__);
+ wdog_clk = NULL;
+ return;
+ }
+
+ clk_prepare(wdog_clk);
}