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authorShawn Guo <shawn.guo@freescale.com>2014-05-19 20:19:06 +0800
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 16:10:06 +0800
commitfffa051281f7cb2729abe584d111e064f609f2ab (patch)
treec226cbae0719d2d4e0de9c96b94f709b985e8d91 /arch/arm/mach-imx/tzic.c
parentb674cf2fb59a9df165a2c7b8ff601f438d9763d1 (diff)
ARM: imx5: tzic_init_irq() can directly be .init_irq hook
After i.MX51 supports DT only, tzic_init_irq() can figure out the tzic_base on its own. Thus, it can directly be .init_irq hook, and mx51[53]_init_irq() can be saved. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/tzic.c')
-rw-r--r--arch/arm/mach-imx/tzic.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c
index 7828af4b2022..1d4f384ca773 100644
--- a/arch/arm/mach-imx/tzic.c
+++ b/arch/arm/mach-imx/tzic.c
@@ -17,6 +17,7 @@
#include <linux/io.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
@@ -153,13 +154,16 @@ static void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs)
* interrupts. It registers the interrupt enable and disable functions
* to the kernel for each interrupt source.
*/
-void __init tzic_init_irq(void __iomem *irqbase)
+void __init tzic_init_irq(void)
{
struct device_node *np;
int irq_base;
int i;
- tzic_base = irqbase;
+ np = of_find_compatible_node(NULL, NULL, "fsl,tzic");
+ tzic_base = of_iomap(np, 0);
+ WARN_ON(!tzic_base);
+
/* put the TZIC into the reset value with
* all interrupts disabled
*/
@@ -181,7 +185,6 @@ void __init tzic_init_irq(void __iomem *irqbase)
irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id());
WARN_ON(irq_base < 0);
- np = of_find_compatible_node(NULL, NULL, "fsl,tzic");
domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0,
&irq_domain_simple_ops, NULL);
WARN_ON(!domain);