diff options
| author | Randy Dunlap <rdunlap@infradead.org> | 2023-09-25 17:35:48 -0700 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2023-09-27 11:02:14 +0200 |
| commit | 59a98f4f1e10902f94610d4cf99de86322016464 (patch) | |
| tree | 1f60229d0dc785f919cef855a590dfe8e90cf1b9 /arch/arm/mm/cache-uniphier.c | |
| parent | 5f8456b1faefb06fcf6028dced9f37aa880c779d (diff) | |
ARM: uniphier: fix cache kernel-doc warnings
Fix kernel-doc warning(s) as reported by lkp:
arch/arm/mm/cache-uniphier.c:72: warning: cannot understand function prototype: 'struct uniphier_cache_data '
cache-uniphier.c:82: warning: Function parameter or member 'way_ctrl_base' not described in 'uniphier_cache_data'
Fixes: e7ecbc057bc5 ("ARM: uniphier: add outer cache support")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Masahiro Yamada <masahiroy@kernel.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: soc@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Link: lore.kernel.org/r/202309260130.Uvwh8ceE-lkp@intel.com # fixes only one item
Link: https://lore.kernel.org/r/20230926003548.22066-1-rdunlap@infradead.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mm/cache-uniphier.c')
| -rw-r--r-- | arch/arm/mm/cache-uniphier.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-uniphier.c b/arch/arm/mm/cache-uniphier.c index ff2881458504..84a2f17ff32d 100644 --- a/arch/arm/mm/cache-uniphier.c +++ b/arch/arm/mm/cache-uniphier.c @@ -58,11 +58,13 @@ ((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE) /** - * uniphier_cache_data - UniPhier outer cache specific data + * struct uniphier_cache_data - UniPhier outer cache specific data * * @ctrl_base: virtual base address of control registers * @rev_base: virtual base address of revision registers * @op_base: virtual base address of operation registers + * @way_ctrl_base: virtual address of the way control registers for this + * SoC revision * @way_mask: each bit specifies if the way is present * @nsets: number of associativity sets * @line_size: line size in bytes |