summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/pm6350.dtsi
diff options
context:
space:
mode:
authorLuca Weiss <luca@z3ntu.xyz>2021-10-07 23:24:33 +0200
committerBjorn Andersson <bjorn.andersson@linaro.org>2021-10-23 22:07:08 -0500
commitd8a3c775d7cd6fa6ba209cf1811ba05d8c01ecb8 (patch)
treeee83b9d220221c59cb2d50456dc954be7b16a702 /arch/arm64/boot/dts/qcom/pm6350.dtsi
parent6dccaae0cbc7bf6624dc0ec0a7efcf12fc92fcea (diff)
arm64: dts: qcom: Add PM6350 PMIC
PM6350 is used in SM6350 and provides similar functionality to other Qualcomm PMICs. Add the pon node with power & volume key and the gpios. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007212444.328034-7-luca@z3ntu.xyz
Diffstat (limited to 'arch/arm64/boot/dts/qcom/pm6350.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/pm6350.dtsi54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/pm6350.dtsi b/arch/arm64/boot/dts/qcom/pm6350.dtsi
new file mode 100644
index 000000000000..c5d85064562b
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm6350.dtsi
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Luca Weiss <luca@z3ntu.xyz>
+ */
+
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+ pmic@0 {
+ compatible = "qcom,pm6350", "qcom,spmi-pmic";
+ reg = <0x0 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pm6350_pon: pon@800 {
+ compatible = "qcom,pm8998-pon";
+ reg = <0x800>;
+ mode-bootloader = <0x2>;
+ mode-recovery = <0x1>;
+
+ pm6350_pwrkey: pwrkey {
+ compatible = "qcom,pm8941-pwrkey";
+ interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
+ debounce = <15625>;
+ bias-pull-up;
+ linux,code = <KEY_POWER>;
+ };
+
+ pm6350_resin: resin {
+ compatible = "qcom,pm8941-resin";
+ interrupts = <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>;
+ debounce = <15625>;
+ bias-pull-up;
+ status = "disabled";
+ };
+ };
+
+ pm6350_gpios: gpios@c000 {
+ compatible = "qcom,pm6350-gpio";
+ reg = <0xc000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ pmic@1 {
+ compatible = "qcom,pm6350", "qcom,spmi-pmic";
+ reg = <0x1 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+};