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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2020-06-19 23:21:37 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-07-13 10:48:01 +0200
commit11a6a6a50b1c2c9439a078f1da3c9f3c3d918102 (patch)
treefc88ae4450ce997d6b3a760cbf584c43677fa0d2 /arch/arm64/boot/dts/renesas/r8a77970.dtsi
parent9d3f2e7e8716fc37ed0d851100eab9d2cf70257b (diff)
arm64: dts: renesas: r8a77970: Add RPC-IF support
Describe RPC-IF in the R8A77970 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Link: https://lore.kernel.org/r/ba8bb326-7e77-6ab7-668f-fdc22010c8ef@cogentembedded.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77970.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77970.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index bd95ecb1b40d..2b9124a5ca86 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -1039,6 +1039,23 @@
status = "disabled";
};
+ rpc: spi@ee200000 {
+ compatible = "renesas,r8a77970-rpc-if",
+ "renesas,rcar-gen3-rpc-if";
+ reg = <0 0xee200000 0 0x200>,
+ <0 0x08000000 0 0x4000000>,
+ <0 0xee208000 0 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ clock-names = "rpc";
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@f1010000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;