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authorKieran Bingham <kieran.bingham+renesas@ideasonboard.com>2022-03-09 19:06:31 +0000
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-04-04 11:06:56 +0200
commit9a4259e59694136add708608fce861a1beff9635 (patch)
tree154b9e3f3945d2f14df03a4c4e70891333c5eb78 /arch/arm64/boot/dts/renesas
parentf6a2f28ab19ca5ce5bbd3a821fe19468d7c921dc (diff)
arm64: dts: renesas: falcon-cpu: Use INTC_EX for SN65DSI86
The INTC block is a better choice for handling the interrupts on the V3U as the INTC will always be powered, while the GPIO block may be de-clocked if not in use. Further more, it may be likely to have a lower power consumption as it does not need to drive the pins. Switch the interrupt parent and interrupts definition from gpio1 to irq0 on intc_ex, and configure the PFC accordingly. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220309190631.1576372-1-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi12
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index 6af3f4f4f268..53c4a26198e3 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -192,14 +192,17 @@
clock-frequency = <400000>;
bridge@2c {
+ pinctrl-0 = <&irq0_pins>;
+ pinctrl-names = "default";
+
compatible = "ti,sn65dsi86";
reg = <0x2c>;
clocks = <&sn65dsi86_refclk>;
clock-names = "refclk";
- interrupt-parent = <&gpio1>;
- interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&intc_ex>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
vccio-supply = <&reg_1p8v>;
vpll-supply = <&reg_1p8v>;
@@ -271,6 +274,11 @@
function = "i2c6";
};
+ irq0_pins: irq0 {
+ groups = "intc_ex_irq0";
+ function = "intc_ex";
+ };
+
keys_pins: keys {
pins = "GP_6_18", "GP_6_19", "GP_6_20";
bias-pull-up;