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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-03-29 14:20:02 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-04-13 13:53:42 +0200
commita1de91f0ac71cfd3ff3dd630ab560238db05bef6 (patch)
treeb41038b8670d05e12033080730b77efc0294814b /arch/arm64/boot
parentf191fba76916dc18c41cf6183d71dbf9a1d821c8 (diff)
arm64: dts: renesas: draak: Add RPC HyperFlash device node
Add the RPC HyperFlash device node along with its partitions to the common Draak board DTS file. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/0f3d3018ecfcdce1bce67708708a6d3a98368b10.1648548339.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/renesas/draak.dtsi58
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/draak.dtsi b/arch/arm64/boot/dts/renesas/draak.dtsi
index eb0327c0df48..2a784ee6da49 100644
--- a/arch/arm64/boot/dts/renesas/draak.dtsi
+++ b/arch/arm64/boot/dts/renesas/draak.dtsi
@@ -541,6 +541,12 @@
function = "pwm1";
};
+ rpc_pins: rpc {
+ groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+ "rpc_int";
+ function = "rpc";
+ };
+
scif2_pins: scif2 {
groups = "scif2_data";
function = "scif2";
@@ -630,6 +636,58 @@
};
};
+&rpc {
+ pinctrl-0 = <&rpc_pins>;
+ pinctrl-names = "default";
+
+ /* Left disabled. To be enabled by firmware when unlocked. */
+
+ flash@0 {
+ compatible = "cypress,hyperflash", "cfi-flash";
+ reg = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootparam@0 {
+ reg = <0x00000000 0x040000>;
+ read-only;
+ };
+ bl2@40000 {
+ reg = <0x00040000 0x140000>;
+ read-only;
+ };
+ cert_header_sa6@180000 {
+ reg = <0x00180000 0x040000>;
+ read-only;
+ };
+ bl31@1c0000 {
+ reg = <0x001c0000 0x040000>;
+ read-only;
+ };
+ tee@200000 {
+ reg = <0x00200000 0x440000>;
+ read-only;
+ };
+ uboot@640000 {
+ reg = <0x00640000 0x100000>;
+ read-only;
+ };
+ dtb@740000 {
+ reg = <0x00740000 0x080000>;
+ };
+ kernel@7c0000 {
+ reg = <0x007c0000 0x1400000>;
+ };
+ user@1bc0000 {
+ reg = <0x01bc0000 0x2440000>;
+ };
+ };
+ };
+};
+
&rwdt {
timeout-sec = <60>;
status = "okay";