diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-09 11:54:01 +0200 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-19 13:53:46 +0200 |
commit | 96f7071d2b757b58e67592ea8d81f226b085feed (patch) | |
tree | 5fbd292e2ce0e8d01ddf33533d7118f47e341f1c /arch/arm64 | |
parent | 7bb9e424357b707ff5a58c99ae10f37a3cf5dbbd (diff) |
arm64: dts: renesas: white-hawk-cpu: Add Ethernet support
Describe the wiring of the first Ethernet AVB instance to the Micrel
KSZ9031RNXVB PHY.
Based on a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/50a31bc8267ab4c90bff27ef3aca1169f8ebc7ae.1662715538.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi index e382b2d5c8d4..77f0130a2f85 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi @@ -16,6 +16,7 @@ compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0"; aliases { + ethernet0 = &avb0; serial0 = &hscif0; }; @@ -96,6 +97,24 @@ }; }; +&avb0 { + pinctrl-0 = <&avb0_pins>; + pinctrl-names = "default"; + phy-handle = <&phy0>; + tx-internal-delay-ps = <2000>; + status = "okay"; + + phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio7>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; + }; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -127,6 +146,24 @@ pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; + avb0_pins: avb0 { + mux { + groups = "avb0_link", "avb0_mdio", "avb0_rgmii", + "avb0_txcrefclk"; + function = "avb0"; + }; + + pins_mdio { + groups = "avb0_mdio"; + drive-strength = <21>; + }; + + pins_mii { + groups = "avb0_rgmii"; + drive-strength = <21>; + }; + + }; hscif0_pins: hscif0 { groups = "hscif0_data"; function = "hscif0"; |