diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2021-11-27 00:54:16 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2021-11-27 00:54:16 +0100 |
commit | 2448eab44034d9603c97ca17760a53d4d6e4b60c (patch) | |
tree | 7f323cea55258e94e0c7c70b63d02c9effb00c1f /arch/hexagon/kernel/time.c | |
parent | deee705a1c9cce9c7eb699d529f1c0b3c80d339d (diff) | |
parent | 136057256686de39cc3a07c2e39ef6bc43003ff6 (diff) |
Merge tag 'v5.16-rc2' into devel
Linux 5.16-rc2 is needed because nonurgent fixes headed
for next are strongly textually dependent on a fix that
was applied for rc2.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/hexagon/kernel/time.c')
-rw-r--r-- | arch/hexagon/kernel/time.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/hexagon/kernel/time.c b/arch/hexagon/kernel/time.c index feffe527ac92..febc95714d75 100644 --- a/arch/hexagon/kernel/time.c +++ b/arch/hexagon/kernel/time.c @@ -17,9 +17,10 @@ #include <linux/of_irq.h> #include <linux/module.h> -#include <asm/timer-regs.h> #include <asm/hexagon_vm.h> +#define TIMER_ENABLE BIT(0) + /* * For the clocksource we need: * pcycle frequency (600MHz) @@ -33,6 +34,13 @@ cycles_t pcycle_freq_mhz; cycles_t thread_freq_mhz; cycles_t sleep_clk_freq; +/* + * 8x50 HDD Specs 5-8. Simulator co-sim not fixed until + * release 1.1, and then it's "adjustable" and probably not defaulted. + */ +#define RTOS_TIMER_INT 3 +#define RTOS_TIMER_REGS_ADDR 0xAB000000UL + static struct resource rtos_timer_resources[] = { { .start = RTOS_TIMER_REGS_ADDR, @@ -80,7 +88,7 @@ static int set_next_event(unsigned long delta, struct clock_event_device *evt) iowrite32(0, &rtos_timer->clear); iowrite32(delta, &rtos_timer->match); - iowrite32(1 << TIMER_ENABLE, &rtos_timer->enable); + iowrite32(TIMER_ENABLE, &rtos_timer->enable); return 0; } |