diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-03-04 15:12:36 +0000 |
|---|---|---|
| committer | Paul Burton <paul.burton@imgtec.com> | 2014-05-28 16:20:28 +0100 |
| commit | d674dd14e85c49ca0e422de53a4c2b5bf44a339a (patch) | |
| tree | 6f03b5515760bd18d0a7d31e86756f8f213d48c1 /arch/mips/mm | |
| parent | 53ed138986e1022c2b6fef7f8e9731f5bf3e6af1 (diff) | |
MIPS: uasm: add MT ASE yield instruction
This patch allows use of the MT ASE yield instruction from uasm. It will
be used by a subsequent patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/uasm-mips.c | 1 | ||||
| -rw-r--r-- | arch/mips/mm/uasm.c | 10 |
2 files changed, 10 insertions, 1 deletions
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c index c69f785753b5..4a2fc82fcd4f 100644 --- a/arch/mips/mm/uasm-mips.c +++ b/arch/mips/mm/uasm-mips.c @@ -116,6 +116,7 @@ static struct insn insn_table[] = { { insn_wait, M(cop0_op, cop_op, 0, 0, 0, wait_op), SCIMM }, { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, + { insn_yield, M(spec3_op, 0, 0, 0, 0, yield_op), RS | RD }, { insn_invalid, 0, 0 } }; diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index 46d2173e6f24..55a1fdfb76ef 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c @@ -54,7 +54,7 @@ enum opcode { insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, - insn_wait, insn_xor, insn_xori, + insn_wait, insn_xor, insn_xori, insn_yield, }; struct insn { @@ -200,6 +200,13 @@ Ip_u1u2(op) \ } \ UASM_EXPORT_SYMBOL(uasm_i##op); +#define I_u2u1(op) \ +Ip_u1u2(op) \ +{ \ + build_insn(buf, insn##op, b, a); \ +} \ +UASM_EXPORT_SYMBOL(uasm_i##op); + #define I_u1s2(op) \ Ip_u1s2(op) \ { \ @@ -279,6 +286,7 @@ I_0(_tlbwr) I_u1(_wait); I_u3u1u2(_xor) I_u2u1u3(_xori) +I_u2u1(_yield) I_u2u1msbu3(_dins); I_u2u1msb32u3(_dinsm); I_u1(_syscall); |