diff options
| author | Nicholas Piggin <npiggin@gmail.com> | 2017-04-07 11:27:44 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-04-13 23:34:32 +1000 |
| commit | 9b7ff0c6586bc0541ebcd1ff6773b11a49f1a058 (patch) | |
| tree | c7b8f96f7e244d47dd6240e0e06d6929a9bc4cbd /arch/powerpc/kernel/traps.c | |
| parent | 794464f4dea0b13dacad267c06a01fc9c24f713a (diff) | |
powerpc/64s: Add SCV FSCR bit for ISA v3.0
Add the bit definition and use it in facility_unavailable_exception() so we can
intelligently report the cause if we take a fault for SCV. This doesn't actually
enable SCV.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Drop whitespace changes to the existing entries, flush out change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/traps.c')
| -rw-r--r-- | arch/powerpc/kernel/traps.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 65bd13338722..76f6045b021b 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -1441,6 +1441,7 @@ void facility_unavailable_exception(struct pt_regs *regs) [FSCR_EBB_LG] = "EBB", [FSCR_TAR_LG] = "TAR", [FSCR_MSGP_LG] = "MSGP", + [FSCR_SCV_LG] = "SCV", }; char *facility = "unknown"; u64 value; |