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| author | Linus Walleij <linus.walleij@linaro.org> | 2014-03-14 10:26:45 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2014-03-14 10:26:45 +0100 |
| commit | 9e294427f6e427dbaf46140303acded06365f53c (patch) | |
| tree | 0669100cbd79fe8612463900171c98873d8dc454 /arch/sh/include/cpu-sh2/cpu/cache.h | |
| parent | 23600969ff137cf4c3bc9098f77e381de334e3f7 (diff) | |
| parent | fa389e220254c69ffae0d403eac4146171062d08 (diff) | |
Merge tag 'v3.14-rc6' into devel
Linux 3.14-rc6
Diffstat (limited to 'arch/sh/include/cpu-sh2/cpu/cache.h')
| -rw-r--r-- | arch/sh/include/cpu-sh2/cpu/cache.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/cpu-sh2/cpu/cache.h b/arch/sh/include/cpu-sh2/cpu/cache.h index 673515bc4135..aa1b2b9088a7 100644 --- a/arch/sh/include/cpu-sh2/cpu/cache.h +++ b/arch/sh/include/cpu-sh2/cpu/cache.h @@ -18,7 +18,7 @@ #define SH_CACHE_ASSOC 8 #if defined(CONFIG_CPU_SUBTYPE_SH7619) -#define CCR 0xffffffec +#define SH_CCR 0xffffffec #define CCR_CACHE_CE 0x01 /* Cache enable */ #define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */ |