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| author | Arnd Bergmann <arnd@arndb.de> | 2012-11-16 16:42:59 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-16 16:42:59 +0100 |
| commit | 57260e4088894de25bb1837d529708c3ec705a69 (patch) | |
| tree | e7072aed15b203197549099371db55c5d4bc3c0a /arch/sparc/include/asm/processor_64.h | |
| parent | 2d4d07b97c0b774ea9ce2a2105818208d3df7241 (diff) | |
| parent | 3d5e2abe6e265acc5e1fda810301243e9bac92b2 (diff) | |
Merge tag 'imx-fixes-rc' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes
From Sascha Hauer <s.hauer@pengutronix.de>:
ARM i.MX fixes for 3.7-rc
* tag 'imx-fixes-rc' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: imx: ehci: fix host power mask bit
ARM i.MX: fix error-valued pointer dereference in clk_register_gate2()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/sparc/include/asm/processor_64.h')
| -rw-r--r-- | arch/sparc/include/asm/processor_64.h | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h index 4e5a483122a0..721e25f0e2ea 100644 --- a/arch/sparc/include/asm/processor_64.h +++ b/arch/sparc/include/asm/processor_64.h @@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) -#define cpu_relax() barrier() +/* Please see the commentary in asm/backoff.h for a description of + * what these instructions are doing and how they have been choosen. + * To make a long story short, we are trying to yield the current cpu + * strand during busy loops. + */ +#define cpu_relax() asm volatile("\n99:\n\t" \ + "rd %%ccr, %%g0\n\t" \ + "rd %%ccr, %%g0\n\t" \ + "rd %%ccr, %%g0\n\t" \ + ".section .pause_3insn_patch,\"ax\"\n\t"\ + ".word 99b\n\t" \ + "wr %%g0, 128, %%asr27\n\t" \ + "nop\n\t" \ + "nop\n\t" \ + ".previous" \ + ::: "memory") /* Prefetch support. This is tuned for UltraSPARC-III and later. * UltraSPARC-I will treat these as nops, and UltraSPARC-II has |