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authorShihPo Hung <shihpo.hung@sifive.com>2019-06-17 12:26:17 +0800
committerPaul Walmsley <paul.walmsley@sifive.com>2019-06-17 03:44:44 -0700
commitbf587caae305ae3b4393077fb22c98478ee55755 (patch)
treeab59e43380e7b8e32b79875eb26a5c27e5046957 /arch/um/Makefile-skas
parentc35f1b87fc595807ff15d2834d241f9771497205 (diff)
riscv: mm: synchronize MMU after pte change
Because RISC-V compliant implementations can cache invalid entries in TLB, an SFENCE.VMA is necessary after changes to the page table. This patch adds an SFENCE.vma for the vmalloc_fault path. Signed-off-by: ShihPo Hung <shihpo.hung@sifive.com> [paul.walmsley@sifive.com: reversed tab->whitespace conversion, wrapped comment lines] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: linux-riscv@lists.infradead.org Cc: stable@vger.kernel.org
Diffstat (limited to 'arch/um/Makefile-skas')
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