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| author | Chang S. Bae <chang.seok.bae@intel.com> | 2021-10-21 15:55:23 -0700 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2021-10-26 10:53:02 +0200 |
| commit | 70c3f1671b0cbc386b387f1de33b7837e276a195 (patch) | |
| tree | ef68ec1e7a55192c5249d3e6b99f022569d87526 /arch/x86/include/asm/fpu/xstate.h | |
| parent | 500afbf645a040a39e1af0dba2fdf6ebf224bd47 (diff) | |
x86/fpu/xstate: Prepare XSAVE feature table for gaps in state component numbers
The kernel checks at boot time which features are available by walking a
XSAVE feature table which contains the CPUID feature bit numbers which need
to be checked whether a feature is available on a CPU or not. So far the
feature numbers have been linear, but AMX will create a gap which the
current code cannot handle.
Make the table entries explicitly indexed and adjust the loop code
accordingly to prepare for that.
No functional change.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Len Brown <len.brown@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211021225527.10184-20-chang.seok.bae@intel.com
Diffstat (limited to 'arch/x86/include/asm/fpu/xstate.h')
0 files changed, 0 insertions, 0 deletions