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| author | Linus Walleij <linus.walleij@linaro.org> | 2019-04-08 13:03:09 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-04-08 13:03:09 +0200 |
| commit | 26af34079f1d8299932303cfd2b376b9cf55a35c (patch) | |
| tree | f1a9824855fae569aa51c2109a5929715143093d /arch/x86/include/asm/processor-cyrix.h | |
| parent | 27157af66324d529b43231c12b5d1e1a3e9fa620 (diff) | |
| parent | 79a3aaa7b82e3106be97842dedfd8429248896e6 (diff) | |
Merge tag 'v5.1-rc3' into devel
Linux 5.1-rc3
Diffstat (limited to 'arch/x86/include/asm/processor-cyrix.h')
| -rw-r--r-- | arch/x86/include/asm/processor-cyrix.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/x86/include/asm/processor-cyrix.h b/arch/x86/include/asm/processor-cyrix.h index aaedd73ea2c6..df700a6cc869 100644 --- a/arch/x86/include/asm/processor-cyrix.h +++ b/arch/x86/include/asm/processor-cyrix.h @@ -3,19 +3,6 @@ * NSC/Cyrix CPU indexed register access. Must be inlined instead of * macros to ensure correct access ordering * Access order is always 0x22 (=offset), 0x23 (=value) - * - * When using the old macros a line like - * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); - * gets expanded to: - * do { - * outb((CX86_CCR2), 0x22); - * outb((({ - * outb((CX86_CCR2), 0x22); - * inb(0x23); - * }) | 0x88), 0x23); - * } while (0); - * - * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23). */ static inline u8 getCx86(u8 reg) @@ -29,11 +16,3 @@ static inline void setCx86(u8 reg, u8 data) outb(reg, 0x22); outb(data, 0x23); } - -#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); }) - -#define setCx86_old(reg, data) do { \ - outb((reg), 0x22); \ - outb((data), 0x23); \ -} while (0) - |