diff options
author | Borislav Petkov (AMD) <bp@alien8.de> | 2024-11-19 12:21:32 +0100 |
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committer | Borislav Petkov (AMD) <bp@alien8.de> | 2024-11-25 11:28:02 +0100 |
commit | f1d84b59cbb9547c243d93991acf187fdbe9fbe9 (patch) | |
tree | 660bb8806cf6f726ca3fc27c9851a38d68e768a0 /arch/x86 | |
parent | d9bb40544653cf039fe79225ec1d742183e2339a (diff) |
x86/mm: Carve out INVLPG inline asm for use by others
No functional changes.
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/ZyulbYuvrkshfsd2@antipodes
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/include/asm/tlb.h | 4 | ||||
-rw-r--r-- | arch/x86/mm/tlb.c | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/arch/x86/include/asm/tlb.h b/arch/x86/include/asm/tlb.h index 580636cdc257..4d3c9d00d6b6 100644 --- a/arch/x86/include/asm/tlb.h +++ b/arch/x86/include/asm/tlb.h @@ -34,4 +34,8 @@ static inline void __tlb_remove_table(void *table) free_page_and_swap_cache(table); } +static inline void invlpg(unsigned long addr) +{ + asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); +} #endif /* _ASM_X86_TLB_H */ diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index b0d5a644fc84..a2becb85bea7 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -20,6 +20,7 @@ #include <asm/cacheflush.h> #include <asm/apic.h> #include <asm/perf_event.h> +#include <asm/tlb.h> #include "mm_internal.h" @@ -1140,7 +1141,7 @@ STATIC_NOPV void native_flush_tlb_one_user(unsigned long addr) bool cpu_pcide; /* Flush 'addr' from the kernel PCID: */ - asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); + invlpg(addr); /* If PTI is off there is no user PCID and nothing to flush. */ if (!static_cpu_has(X86_FEATURE_PTI)) |