diff options
| author | André Draszik <andre.draszik@linaro.org> | 2024-04-30 10:49:47 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-05-03 10:36:55 +0200 |
| commit | 42e3f188b238b7fb1c42dee8b4dc4107cbb321e2 (patch) | |
| tree | dcf743d9d21538eb299d1b5998ebc99a3c909e10 /arch | |
| parent | 1665b303a00c1acb2fe126486c6256c755f0b7c4 (diff) | |
arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01]
This bus clock is needed for pinctrl register access to work. Add it.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240430-samsung-pinctrl-busclock-dts-v2-2-14fc988139dd@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/google/gs101.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 09f6b33cf5b4..878e05a865a0 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -370,6 +370,8 @@ pinctrl_peric0: pinctrl@10840000 { compatible = "google,gs101-pinctrl"; reg = <0x10840000 0x00001000>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_GPIO_PERIC0_PCLK>; + clock-names = "pclk"; interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>; }; @@ -914,6 +916,8 @@ pinctrl_peric1: pinctrl@10c40000 { compatible = "google,gs101-pinctrl"; reg = <0x10c40000 0x00001000>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK>; + clock-names = "pclk"; interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>; }; |